W3DNShaderInfo - Get shader information Verbose mode Shader: 2.frag.spv Compiling 2.frag.spv failed (23) with error: shader compilation failed due to errors Log: Shader size: 14892 bytes Parsing SPIR-V code Module Version: 1.2.0 Generator Magic Number: 0x80003 Upper bound on ids: 653 Parsed instructions: OpCapability: : Shader 1: OpExtInstImport: : GLSL.std.450 OpMemoryModel: : addressing: Logical, memory: GLSL450 4: OpEntryPoint: : main, execution model: Fragment 4: OpExecutionMode: : OriginLowerLeft OpSource: : ESSL ver 310 4: OpName: : main 12: OpName: : rot(f1; 11: OpName: : a 19: OpName: : blade(vf3;f1; 17: OpName: : p 18: OpName: : a 23: OpName: : centre(vf3; 22: OpName: : p 26: OpName: : concav(vf3; 25: OpName: : p 29: OpName: : sceneSDF(vf3; 28: OpName: : p 33: OpName: : estimateNormal(vf3; 32: OpName: : p 41: OpName: : mainImage(vf4;vf2; 39: OpName: : fragColor 40: OpName: : fragCoord 43: OpName: : c 46: OpName: : s 61: OpName: : param61 83: OpName: : param83 90: OpName: : psy 95: OpName: : ppy 99: OpName: : xs 109: OpName: : xp 146: OpName: : rad 147: OpName: : len 149: OpName: : d 178: OpName: : rad 180: OpName: : len 181: OpName: : d 215: OpName: : iTime 216: OpName: : param216 227: OpName: : param227 234: OpName: : a 237: OpName: : R 238: OpName: : param238 241: OpName: : O1 244: OpName: : O2 248: OpName: : O3 252: OpName: : O4 256: OpName: : O5 260: OpName: : O6 264: OpName: : O7 268: OpName: : z_pos 269: OpName: : d 279: OpName: : param279 280: OpName: : param280 291: OpName: : param291 292: OpName: : param292 304: OpName: : param304 305: OpName: : param305 316: OpName: : param316 317: OpName: : param317 332: OpName: : param332 333: OpName: : param333 346: OpName: : param346 347: OpName: : param347 359: OpName: : param359 360: OpName: : param360 370: OpName: : param370 379: OpName: : param379 383: OpName: : p1 386: OpName: : p2 388: OpName: : param388 392: OpName: : p3 393: OpName: : param393 397: OpName: : d_logo 446: OpName: : param446 456: OpName: : param456 467: OpName: : param467 477: OpName: : param477 488: OpName: : param488 498: OpName: : param498 505: OpName: : uv 509: OpName: : iResolution 521: OpName: : fov 523: OpName: : cam_pos 530: OpName: : ray 532: OpName: : dir 540: OpName: : light 544: OpName: : shade 545: OpName: : shade_1 548: OpName: : i 559: OpName: : dist 560: OpName: : param560 568: OpName: : n 569: OpName: : param569 572: OpName: : soft 576: OpName: : soft_s 626: OpName: : color 628: OpName: : gl_FragCoord 629: OpName: : param629 630: OpName: : param630 636: OpName: : finalColor 639: OpName: : iMouse 640: OpName: : iDate 641: OpName: : iFrame 645: OpName: : iChannelResolution 649: OpName: : iChannel0 650: OpName: : iChannel1 651: OpName: : iChannel2 652: OpName: : iChannel3 548: OpDecorate: : RelaxedPrecision 555: OpDecorate: : RelaxedPrecision 619: OpDecorate: : RelaxedPrecision 621: OpDecorate: : RelaxedPrecision 628: OpDecorate: : BuiltIn(FragCoord) 649: OpDecorate: : RelaxedPrecision 649: OpDecorate: : DescriptorSet(0) 650: OpDecorate: : RelaxedPrecision 650: OpDecorate: : DescriptorSet(0) 651: OpDecorate: : RelaxedPrecision 651: OpDecorate: : DescriptorSet(0) 652: OpDecorate: : RelaxedPrecision 652: OpDecorate: : DescriptorSet(0) 2: OpTypeVoid: Void 3: OpTypeFunction: 2 << func() 6: OpTypeFloat: Float: 32 bits 7: OpTypePointer: ???Ptr: storage class: Function 8: OpTypeVector: ???Vector2: num-elements: 2, element type id: 6 9: OpTypeMatrix: Matrix?x?: num-columns: 2, column type id: 8 10: OpTypeFunction: 9 << func(7) 14: OpTypeVector: ???Vector3: num-elements: 3, element type id: 6 15: OpTypePointer: ???Ptr: storage class: Function 16: OpTypeFunction: 6 << func(15, 7) 21: OpTypeFunction: 6 << func(15) 31: OpTypeFunction: 14 << func(15) 35: OpTypeVector: ???Vector4: num-elements: 4, element type id: 6 36: OpTypePointer: ???Ptr: storage class: Function 37: OpTypePointer: ???Ptr: storage class: Function 38: OpTypeFunction: 2 << func(36, 37) 54: OpConstant: 6 const54 = 0x3f800000 55: OpConstant: 6 const55 = 0x0 69: OpConstant: 6 const69 = 0x3e99999a 70: OpConstant: 6 const70 = 0x3cf5c28f 71: OpTypeInt: UInt: 32 bits, unsigned 72: OpConstant: 71 const72 = 0x1 80: OpConstant: 6 const80 = 0x3f19999a 93: OpConstant: 6 const93 = 0x40400000 100: OpConstant: 6 const100 = 0x3ecccccd 101: OpConstant: 6 const101 = 0xbd23d70a 107: OpConstant: 6 const107 = 0xbfc00000 110: OpConstant: 6 const110 = 0x40000000 111: OpConstant: 6 const111 = 0x3ca3d70a 117: OpConstant: 6 const117 = 0x40200000 120: OpConstant: 71 const120 = 0x0 123: OpConstant: 6 const123 = 0xc0000000 130: OpConstant: 6 const130 = 0xc0400000 131: OpConstant: 6 const131 = 0x3dcccccd 148: OpConstant: 6 const148 = 0x3f333333 156: OpConstant: 71 const156 = 0x2 179: OpConstant: 6 const179 = 0x40133333 209: OpConstant: 6 const209 = 0x41200000 214: OpTypePointer: ???Ptr: storage class: UniformConstant 215: OpVariable: 214: var215: storage class: UniformConstant 224: OpConstant: 6 const224 = 0x40266666 235: OpConstant: 6 const235 = 0x3f65c8fa 236: OpTypePointer: ???Ptr: storage class: Function 242: OpConstant: 6 const242 = 0xc0600000 243: OpConstantComposite: 8 const243 = {id:55, id:242} 329: OpConstant: 6 const329 = 0x40800000 343: OpConstant: 6 const343 = 0x40a00000 356: OpConstant: 6 const356 = 0x40c00000 384: OpConstant: 6 const384 = 0x3e4ccccd 385: OpConstantComposite: 8 const385 = {id:384, id:384} 387: OpConstant: 6 const387 = 0x40060a92 439: OpConstant: 6 const439 = 0x3d4ccccd 507: OpConstant: 6 const507 = 0x3f000000 508: OpTypePointer: ???Ptr: storage class: UniformConstant 509: OpVariable: 508: var509: storage class: UniformConstant 522: OpConstant: 6 const522 = 0x3e20d97c 541: OpConstant: 6 const541 = 0x3ed105ec 542: OpConstant: 6 const542 = 0x3f5105ec 543: OpConstantComposite: 14 const543 = {id:541, id:541, id:542} 546: OpTypeInt: Int: 32 bits, signed 547: OpTypePointer: ???Ptr: storage class: Function 549: OpConstant: 546 const549 = 0x0 556: OpConstant: 546 const556 = 0x64 557: OpTypeBool: Bool 564: OpConstant: 6 const564 = 0x3ba3d70a 579: OpConstant: 6 const579 = 0x3f4ccccd 597: OpConstant: 6 const597 = 0x461c4000 607: OpConstant: 6 const607 = 0x41f00000 612: OpConstant: 6 const612 = 0x3f35c28f 620: OpConstant: 546 const620 = 0x1 622: OpConstant: 6 const622 = 0x3f666666 623: OpConstantComposite: 35 const623 = {id:54, id:622, id:55, id:55} 627: OpTypePointer: ???Ptr: storage class: Input 628: OpVariable: 627: var628: storage class: Input 635: OpTypePointer: ???Ptr: storage class: Output 636: OpVariable: 635: var636: storage class: Output 638: OpTypePointer: ???Ptr: storage class: UniformConstant 639: OpVariable: 638: var639: storage class: UniformConstant 640: OpVariable: 638: var640: storage class: UniformConstant 641: OpVariable: 214: var641: storage class: UniformConstant 642: OpConstant: 71 const642 = 0x4 643: OpTypeArray: ???[]: length id: 642, element type id: 14 644: OpTypePointer: ???Ptr: storage class: UniformConstant 645: OpVariable: 644: var645: storage class: UniformConstant 646: OpTypeImage: Image(6): 2D, no-depth, sampled, ReadOnly 647: OpTypeSampledImage: SampledImage(646) 648: OpTypePointer: ???Ptr: storage class: UniformConstant 649: OpVariable: 648: var649: storage class: UniformConstant 650: OpVariable: 648: var650: storage class: UniformConstant 651: OpVariable: 648: var651: storage class: UniformConstant 652: OpVariable: 648: var652: storage class: UniformConstant 4: OpFunction: func4(type: 3) 5: OpLabel: 626: OpVariable: 36: var626: storage class: Function 629: OpVariable: 36: var629: storage class: Function 630: OpVariable: 37: var630: storage class: Function 631: OpLoad: 35: tmp631 << 628 632: OpVectorShuffle: 8: tmp632 << 631, 631, 0, 1 OpStore: : 632 >> 630 633: OpFunctionCall: 2: tmp633(629, 630) 634: OpLoad: 35: tmp634 << 629 OpStore: : 634 >> 626 637: OpLoad: 35: tmp637 << 626 OpStore: : 637 >> 636 OpReturn: OpFunctionEnd: 12: OpFunction: func12(type: 10) 11: OpFunctionParameter: 7: var11: storage class: Function 13: OpLabel: 43: OpVariable: 7: var43: storage class: Function 46: OpVariable: 7: var46: storage class: Function 44: OpLoad: 6: tmp44 << 11 45: OpExtInst(14): 6: tmp45 << 44 OpStore: : 45 >> 43 47: OpLoad: 6: tmp47 << 11 48: OpExtInst(13): 6: tmp48 << 47 OpStore: : 48 >> 46 49: OpLoad: 6: tmp49 << 43 50: OpLoad: 6: tmp50 << 46 51: OpLoad: 6: tmp51 << 46 52: OpFNegate: 6: tmp52 << 51 53: OpLoad: 6: tmp53 << 43 56: OpCompositeConstruct: 8: tmp56 << 49, 50 57: OpCompositeConstruct: 8: tmp57 << 52, 53 58: OpCompositeConstruct: 9: tmp58 << 56, 57 OpReturnValue: : << 58 OpFunctionEnd: 19: OpFunction: func19(type: 16) 17: OpFunctionParameter: 15: var17: storage class: Function 18: OpFunctionParameter: 7: var18: storage class: Function 20: OpLabel: 61: OpVariable: 7: var61: storage class: Function 83: OpVariable: 7: var83: storage class: Function 90: OpVariable: 7: var90: storage class: Function 95: OpVariable: 7: var95: storage class: Function 99: OpVariable: 7: var99: storage class: Function 109: OpVariable: 7: var109: storage class: Function 62: OpLoad: 6: tmp62 << 18 OpStore: : 62 >> 61 63: OpFunctionCall: 9: tmp63(61) 64: OpLoad: 14: tmp64 << 17 65: OpVectorShuffle: 8: tmp65 << 64, 64, 0, 1 66: OpVectorTimesMatrix: 8: tmp66 << 65, 63 67: OpLoad: 14: tmp67 << 17 68: OpVectorShuffle: 14: tmp68 << 67, 66, 3, 4, 2 OpStore: : 68 >> 17 73: OpAccessChain: 7: 17[72] 74: OpLoad: 6: tmp74 << 73 75: OpFMul: 6: tmp75 << 70, 74 76: OpAccessChain: 7: 17[72] 77: OpLoad: 6: tmp77 << 76 78: OpFMul: 6: tmp78 << 75, 77 79: OpFAdd: 6: tmp79 << 69, 78 81: OpExtInst(43): 6: tmp81 << 79, 69, 80 82: OpFNegate: 6: tmp82 << 81 OpStore: : 82 >> 83 84: OpFunctionCall: 9: tmp84(83) 85: OpLoad: 14: tmp85 << 17 86: OpVectorShuffle: 8: tmp86 << 85, 85, 0, 2 87: OpVectorTimesMatrix: 8: tmp87 << 86, 84 88: OpLoad: 14: tmp88 << 17 89: OpVectorShuffle: 14: tmp89 << 88, 87, 3, 1, 4 OpStore: : 89 >> 17 91: OpAccessChain: 7: 17[72] 92: OpLoad: 6: tmp92 << 91 94: OpFSub: 6: tmp94 << 92, 93 OpStore: : 94 >> 90 96: OpAccessChain: 7: 17[72] 97: OpLoad: 6: tmp97 << 96 98: OpFSub: 6: tmp98 << 97, 54 OpStore: : 98 >> 95 102: OpLoad: 6: tmp102 << 90 103: OpFMul: 6: tmp103 << 101, 102 104: OpLoad: 6: tmp104 << 90 105: OpFMul: 6: tmp105 << 103, 104 106: OpFAdd: 6: tmp106 << 100, 105 108: OpExtInst(43): 6: tmp108 << 106, 107, 54 OpStore: : 108 >> 99 112: OpLoad: 6: tmp112 << 95 113: OpFMul: 6: tmp113 << 111, 112 114: OpLoad: 6: tmp114 << 95 115: OpFMul: 6: tmp115 << 113, 114 116: OpFAdd: 6: tmp116 << 110, 115 118: OpExtInst(43): 6: tmp118 << 116, 54, 117 OpStore: : 118 >> 109 119: OpLoad: 14: tmp119 << 17 121: OpAccessChain: 7: 17[120] 122: OpLoad: 6: tmp122 << 121 124: OpLoad: 6: tmp124 << 99 125: OpFMul: 6: tmp125 << 123, 124 126: OpLoad: 6: tmp126 << 109 127: OpExtInst(43): 6: tmp127 << 122, 125, 126 128: OpAccessChain: 7: 17[72] 129: OpLoad: 6: tmp129 << 128 132: OpAccessChain: 7: 17[120] 133: OpLoad: 6: tmp133 << 132 134: OpFMul: 6: tmp134 << 131, 133 135: OpAccessChain: 7: 17[120] 136: OpLoad: 6: tmp136 << 135 137: OpFMul: 6: tmp137 << 134, 136 138: OpFSub: 6: tmp138 << 93, 137 139: OpExtInst(43): 6: tmp139 << 129, 130, 138 140: OpCompositeConstruct: 14: tmp140 << 127, 139, 55 141: OpFSub: 14: tmp141 << 119, 140 142: OpExtInst(66): 6: tmp142 << 141 143: OpFSub: 6: tmp143 << 142, 131 OpReturnValue: : << 143 OpFunctionEnd: 23: OpFunction: func23(type: 21) 22: OpFunctionParameter: 15: var22: storage class: Function 24: OpLabel: 146: OpVariable: 7: var146: storage class: Function 147: OpVariable: 7: var147: storage class: Function 149: OpVariable: 37: var149: storage class: Function OpStore: : 117 >> 146 OpStore: : 148 >> 147 150: OpLoad: 14: tmp150 << 22 151: OpVectorShuffle: 8: tmp151 << 150, 150, 0, 1 152: OpLoad: 6: tmp152 << 146 153: OpCompositeConstruct: 8: tmp153 << 152, 152 154: OpFDiv: 8: tmp154 << 151, 153 155: OpExtInst(66): 6: tmp155 << 154 157: OpAccessChain: 7: 22[156] 158: OpLoad: 6: tmp158 << 157 159: OpLoad: 6: tmp159 << 147 160: OpFDiv: 6: tmp160 << 158, 159 161: OpCompositeConstruct: 8: tmp161 << 155, 160 162: OpExtInst(4): 8: tmp162 << 161 163: OpCompositeConstruct: 8: tmp163 << 54, 54 164: OpFSub: 8: tmp164 << 162, 163 OpStore: : 164 >> 149 165: OpAccessChain: 7: 149[120] 166: OpLoad: 6: tmp166 << 165 167: OpAccessChain: 7: 149[72] 168: OpLoad: 6: tmp168 << 167 169: OpExtInst(40): 6: tmp169 << 166, 168 170: OpExtInst(37): 6: tmp170 << 169, 55 171: OpLoad: 8: tmp171 << 149 172: OpCompositeConstruct: 8: tmp172 << 55, 55 173: OpExtInst(40): 8: tmp173 << 171, 172 174: OpExtInst(66): 6: tmp174 << 173 175: OpFAdd: 6: tmp175 << 170, 174 OpReturnValue: : << 175 OpFunctionEnd: 26: OpFunction: func26(type: 21) 25: OpFunctionParameter: 15: var25: storage class: Function 27: OpLabel: 178: OpVariable: 7: var178: storage class: Function 180: OpVariable: 7: var180: storage class: Function 181: OpVariable: 37: var181: storage class: Function OpStore: : 179 >> 178 OpStore: : 148 >> 180 182: OpLoad: 14: tmp182 << 25 183: OpVectorShuffle: 8: tmp183 << 182, 182, 0, 1 184: OpLoad: 6: tmp184 << 178 185: OpCompositeConstruct: 8: tmp185 << 184, 184 186: OpFDiv: 8: tmp186 << 183, 185 187: OpExtInst(66): 6: tmp187 << 186 188: OpAccessChain: 7: 25[156] 189: OpLoad: 6: tmp189 << 188 190: OpLoad: 6: tmp190 << 180 191: OpFDiv: 6: tmp191 << 189, 190 192: OpCompositeConstruct: 8: tmp192 << 187, 191 193: OpExtInst(4): 8: tmp193 << 192 194: OpCompositeConstruct: 8: tmp194 << 54, 54 195: OpFSub: 8: tmp195 << 193, 194 OpStore: : 195 >> 181 196: OpAccessChain: 7: 181[120] 197: OpLoad: 6: tmp197 << 196 198: OpAccessChain: 7: 181[72] 199: OpLoad: 6: tmp199 << 198 200: OpExtInst(40): 6: tmp200 << 197, 199 201: OpExtInst(37): 6: tmp201 << 200, 55 202: OpLoad: 8: tmp202 << 181 203: OpCompositeConstruct: 8: tmp203 << 55, 55 204: OpExtInst(40): 8: tmp204 << 202, 203 205: OpExtInst(66): 6: tmp205 << 204 206: OpFAdd: 6: tmp206 << 201, 205 OpReturnValue: : << 206 OpFunctionEnd: 29: OpFunction: func29(type: 21) 28: OpFunctionParameter: 15: var28: storage class: Function 30: OpLabel: 216: OpVariable: 7: var216: storage class: Function 227: OpVariable: 7: var227: storage class: Function 234: OpVariable: 7: var234: storage class: Function 237: OpVariable: 236: var237: storage class: Function 238: OpVariable: 7: var238: storage class: Function 241: OpVariable: 37: var241: storage class: Function 244: OpVariable: 37: var244: storage class: Function 248: OpVariable: 37: var248: storage class: Function 252: OpVariable: 37: var252: storage class: Function 256: OpVariable: 37: var256: storage class: Function 260: OpVariable: 37: var260: storage class: Function 264: OpVariable: 37: var264: storage class: Function 268: OpVariable: 7: var268: storage class: Function 269: OpVariable: 7: var269: storage class: Function 279: OpVariable: 15: var279: storage class: Function 280: OpVariable: 7: var280: storage class: Function 291: OpVariable: 15: var291: storage class: Function 292: OpVariable: 7: var292: storage class: Function 304: OpVariable: 15: var304: storage class: Function 305: OpVariable: 7: var305: storage class: Function 316: OpVariable: 15: var316: storage class: Function 317: OpVariable: 7: var317: storage class: Function 332: OpVariable: 15: var332: storage class: Function 333: OpVariable: 7: var333: storage class: Function 346: OpVariable: 15: var346: storage class: Function 347: OpVariable: 7: var347: storage class: Function 359: OpVariable: 15: var359: storage class: Function 360: OpVariable: 7: var360: storage class: Function 370: OpVariable: 15: var370: storage class: Function 379: OpVariable: 15: var379: storage class: Function 383: OpVariable: 37: var383: storage class: Function 386: OpVariable: 37: var386: storage class: Function 388: OpVariable: 7: var388: storage class: Function 392: OpVariable: 37: var392: storage class: Function 393: OpVariable: 7: var393: storage class: Function 397: OpVariable: 7: var397: storage class: Function 210: OpAccessChain: 7: 28[156] 211: OpLoad: 6: tmp211 << 210 212: OpFAdd: 6: tmp212 << 211, 209 213: OpAccessChain: 7: 28[156] OpStore: : 212 >> 213 217: OpLoad: 6: tmp217 << 215 OpStore: : 217 >> 216 218: OpFunctionCall: 9: tmp218(216) 219: OpLoad: 14: tmp219 << 28 220: OpVectorShuffle: 8: tmp220 << 219, 219, 0, 2 221: OpVectorTimesMatrix: 8: tmp221 << 220, 218 222: OpLoad: 14: tmp222 << 28 223: OpVectorShuffle: 14: tmp223 << 222, 221, 3, 1, 4 OpStore: : 223 >> 28 225: OpLoad: 6: tmp225 << 215 226: OpFMul: 6: tmp226 << 224, 225 OpStore: : 226 >> 227 228: OpFunctionCall: 9: tmp228(227) 229: OpLoad: 14: tmp229 << 28 230: OpVectorShuffle: 8: tmp230 << 229, 229, 0, 1 231: OpVectorTimesMatrix: 8: tmp231 << 230, 228 232: OpLoad: 14: tmp232 << 28 233: OpVectorShuffle: 14: tmp233 << 232, 231, 3, 4, 2 OpStore: : 233 >> 28 OpStore: : 235 >> 234 239: OpLoad: 6: tmp239 << 234 OpStore: : 239 >> 238 240: OpFunctionCall: 9: tmp240(238) OpStore: : 240 >> 237 OpStore: : 243 >> 241 245: OpLoad: 9: tmp245 << 237 246: OpLoad: 8: tmp246 << 241 247: OpMatrixTimesVector: 8: tmp247 << 245, 246 OpStore: : 247 >> 244 249: OpLoad: 9: tmp249 << 237 250: OpLoad: 8: tmp250 << 244 251: OpMatrixTimesVector: 8: tmp251 << 249, 250 OpStore: : 251 >> 248 253: OpLoad: 9: tmp253 << 237 254: OpLoad: 8: tmp254 << 248 255: OpMatrixTimesVector: 8: tmp255 << 253, 254 OpStore: : 255 >> 252 257: OpLoad: 9: tmp257 << 237 258: OpLoad: 8: tmp258 << 252 259: OpMatrixTimesVector: 8: tmp259 << 257, 258 OpStore: : 259 >> 256 261: OpLoad: 9: tmp261 << 237 262: OpLoad: 8: tmp262 << 256 263: OpMatrixTimesVector: 8: tmp263 << 261, 262 OpStore: : 263 >> 260 265: OpLoad: 9: tmp265 << 237 266: OpLoad: 8: tmp266 << 260 267: OpMatrixTimesVector: 8: tmp267 << 265, 266 OpStore: : 267 >> 264 OpStore: : 55 >> 268 270: OpLoad: 14: tmp270 << 28 271: OpLoad: 8: tmp271 << 241 272: OpLoad: 6: tmp272 << 268 273: OpCompositeExtract: 6: tmp273 << 271, 0 274: OpCompositeExtract: 6: tmp274 << 271, 1 275: OpCompositeConstruct: 14: tmp275 << 273, 274, 272 276: OpFAdd: 14: tmp276 << 270, 275 277: OpLoad: 6: tmp277 << 234 278: OpFMul: 6: tmp278 << 55, 277 OpStore: : 276 >> 279 OpStore: : 278 >> 280 281: OpFunctionCall: 6: tmp281(279, 280) 282: OpLoad: 14: tmp282 << 28 283: OpLoad: 8: tmp283 << 244 284: OpLoad: 6: tmp284 << 268 285: OpCompositeExtract: 6: tmp285 << 283, 0 286: OpCompositeExtract: 6: tmp286 << 283, 1 287: OpCompositeConstruct: 14: tmp287 << 285, 286, 284 288: OpFAdd: 14: tmp288 << 282, 287 289: OpLoad: 6: tmp289 << 234 290: OpFMul: 6: tmp290 << 54, 289 OpStore: : 288 >> 291 OpStore: : 290 >> 292 293: OpFunctionCall: 6: tmp293(291, 292) 294: OpExtInst(37): 6: tmp294 << 281, 293 295: OpLoad: 14: tmp295 << 28 296: OpLoad: 8: tmp296 << 248 297: OpLoad: 6: tmp297 << 268 298: OpCompositeExtract: 6: tmp298 << 296, 0 299: OpCompositeExtract: 6: tmp299 << 296, 1 300: OpCompositeConstruct: 14: tmp300 << 298, 299, 297 301: OpFAdd: 14: tmp301 << 295, 300 302: OpLoad: 6: tmp302 << 234 303: OpFMul: 6: tmp303 << 110, 302 OpStore: : 301 >> 304 OpStore: : 303 >> 305 306: OpFunctionCall: 6: tmp306(304, 305) 307: OpLoad: 14: tmp307 << 28 308: OpLoad: 8: tmp308 << 252 309: OpLoad: 6: tmp309 << 268 310: OpCompositeExtract: 6: tmp310 << 308, 0 311: OpCompositeExtract: 6: tmp311 << 308, 1 312: OpCompositeConstruct: 14: tmp312 << 310, 311, 309 313: OpFAdd: 14: tmp313 << 307, 312 314: OpLoad: 6: tmp314 << 234 315: OpFMul: 6: tmp315 << 93, 314 OpStore: : 313 >> 316 OpStore: : 315 >> 317 318: OpFunctionCall: 6: tmp318(316, 317) 319: OpExtInst(37): 6: tmp319 << 306, 318 320: OpExtInst(37): 6: tmp320 << 294, 319 OpStore: : 320 >> 269 321: OpLoad: 6: tmp321 << 269 322: OpLoad: 14: tmp322 << 28 323: OpLoad: 8: tmp323 << 256 324: OpLoad: 6: tmp324 << 268 325: OpCompositeExtract: 6: tmp325 << 323, 0 326: OpCompositeExtract: 6: tmp326 << 323, 1 327: OpCompositeConstruct: 14: tmp327 << 325, 326, 324 328: OpFAdd: 14: tmp328 << 322, 327 330: OpLoad: 6: tmp330 << 234 331: OpFMul: 6: tmp331 << 329, 330 OpStore: : 328 >> 332 OpStore: : 331 >> 333 334: OpFunctionCall: 6: tmp334(332, 333) 335: OpExtInst(37): 6: tmp335 << 321, 334 336: OpLoad: 14: tmp336 << 28 337: OpLoad: 8: tmp337 << 260 338: OpLoad: 6: tmp338 << 268 339: OpCompositeExtract: 6: tmp339 << 337, 0 340: OpCompositeExtract: 6: tmp340 << 337, 1 341: OpCompositeConstruct: 14: tmp341 << 339, 340, 338 342: OpFAdd: 14: tmp342 << 336, 341 344: OpLoad: 6: tmp344 << 234 345: OpFMul: 6: tmp345 << 343, 344 OpStore: : 342 >> 346 OpStore: : 345 >> 347 348: OpFunctionCall: 6: tmp348(346, 347) 349: OpLoad: 14: tmp349 << 28 350: OpLoad: 8: tmp350 << 264 351: OpLoad: 6: tmp351 << 268 352: OpCompositeExtract: 6: tmp352 << 350, 0 353: OpCompositeExtract: 6: tmp353 << 350, 1 354: OpCompositeConstruct: 14: tmp354 << 352, 353, 351 355: OpFAdd: 14: tmp355 << 349, 354 357: OpLoad: 6: tmp357 << 234 358: OpFMul: 6: tmp358 << 356, 357 OpStore: : 355 >> 359 OpStore: : 358 >> 360 361: OpFunctionCall: 6: tmp361(359, 360) 362: OpExtInst(37): 6: tmp362 << 348, 361 363: OpExtInst(37): 6: tmp363 << 335, 362 OpStore: : 363 >> 269 364: OpLoad: 6: tmp364 << 269 365: OpLoad: 14: tmp365 << 28 366: OpLoad: 6: tmp366 << 268 367: OpFAdd: 6: tmp367 << 148, 366 368: OpCompositeConstruct: 14: tmp368 << 55, 55, 367 369: OpFAdd: 14: tmp369 << 365, 368 OpStore: : 369 >> 370 371: OpFunctionCall: 6: tmp371(370) 372: OpExtInst(37): 6: tmp372 << 364, 371 OpStore: : 372 >> 269 373: OpLoad: 6: tmp373 << 269 374: OpLoad: 14: tmp374 << 28 375: OpLoad: 6: tmp375 << 268 376: OpFAdd: 6: tmp376 << 54, 375 377: OpCompositeConstruct: 14: tmp377 << 55, 55, 376 378: OpFAdd: 14: tmp378 << 374, 377 OpStore: : 378 >> 379 380: OpFunctionCall: 6: tmp380(379) 381: OpFNegate: 6: tmp381 << 380 382: OpExtInst(40): 6: tmp382 << 373, 381 OpStore: : 382 >> 269 OpStore: : 385 >> 383 OpStore: : 387 >> 388 389: OpFunctionCall: 9: tmp389(388) 390: OpLoad: 8: tmp390 << 383 391: OpMatrixTimesVector: 8: tmp391 << 389, 390 OpStore: : 391 >> 386 OpStore: : 387 >> 393 394: OpFunctionCall: 9: tmp394(393) 395: OpLoad: 8: tmp395 << 386 396: OpMatrixTimesVector: 8: tmp396 << 394, 395 OpStore: : 396 >> 392 398: OpLoad: 14: tmp398 << 28 399: OpLoad: 8: tmp399 << 383 400: OpLoad: 6: tmp400 << 268 401: OpFAdd: 6: tmp401 << 55, 400 402: OpCompositeExtract: 6: tmp402 << 399, 0 403: OpCompositeExtract: 6: tmp403 << 399, 1 404: OpCompositeConstruct: 14: tmp404 << 402, 403, 401 405: OpFAdd: 14: tmp405 << 398, 404 406: OpExtInst(66): 6: tmp406 << 405 407: OpFSub: 6: tmp407 << 406, 384 408: OpLoad: 14: tmp408 << 28 409: OpLoad: 8: tmp409 << 386 410: OpLoad: 6: tmp410 << 268 411: OpFAdd: 6: tmp411 << 55, 410 412: OpCompositeExtract: 6: tmp412 << 409, 0 413: OpCompositeExtract: 6: tmp413 << 409, 1 414: OpCompositeConstruct: 14: tmp414 << 412, 413, 411 415: OpFAdd: 14: tmp415 << 408, 414 416: OpExtInst(66): 6: tmp416 << 415 417: OpFSub: 6: tmp417 << 416, 384 418: OpExtInst(37): 6: tmp418 << 407, 417 419: OpLoad: 14: tmp419 << 28 420: OpLoad: 8: tmp420 << 392 421: OpLoad: 6: tmp421 << 268 422: OpFAdd: 6: tmp422 << 55, 421 423: OpCompositeExtract: 6: tmp423 << 420, 0 424: OpCompositeExtract: 6: tmp424 << 420, 1 425: OpCompositeConstruct: 14: tmp425 << 423, 424, 422 426: OpFAdd: 14: tmp426 << 419, 425 427: OpExtInst(66): 6: tmp427 << 426 428: OpFSub: 6: tmp428 << 427, 384 429: OpExtInst(37): 6: tmp429 << 418, 428 OpStore: : 429 >> 397 430: OpLoad: 6: tmp430 << 269 431: OpLoad: 6: tmp431 << 397 432: OpFNegate: 6: tmp432 << 431 433: OpExtInst(40): 6: tmp433 << 430, 432 OpStore: : 433 >> 269 434: OpLoad: 6: tmp434 << 269 OpReturnValue: : << 434 OpFunctionEnd: 33: OpFunction: func33(type: 31) 32: OpFunctionParameter: 15: var32: storage class: Function 34: OpLabel: 446: OpVariable: 15: var446: storage class: Function 456: OpVariable: 15: var456: storage class: Function 467: OpVariable: 15: var467: storage class: Function 477: OpVariable: 15: var477: storage class: Function 488: OpVariable: 15: var488: storage class: Function 498: OpVariable: 15: var498: storage class: Function 437: OpAccessChain: 7: 32[120] 438: OpLoad: 6: tmp438 << 437 440: OpFAdd: 6: tmp440 << 438, 439 441: OpAccessChain: 7: 32[72] 442: OpLoad: 6: tmp442 << 441 443: OpAccessChain: 7: 32[156] 444: OpLoad: 6: tmp444 << 443 445: OpCompositeConstruct: 14: tmp445 << 440, 442, 444 OpStore: : 445 >> 446 447: OpFunctionCall: 6: tmp447(446) 448: OpAccessChain: 7: 32[120] 449: OpLoad: 6: tmp449 << 448 450: OpFSub: 6: tmp450 << 449, 439 451: OpAccessChain: 7: 32[72] 452: OpLoad: 6: tmp452 << 451 453: OpAccessChain: 7: 32[156] 454: OpLoad: 6: tmp454 << 453 455: OpCompositeConstruct: 14: tmp455 << 450, 452, 454 OpStore: : 455 >> 456 457: OpFunctionCall: 6: tmp457(456) 458: OpFSub: 6: tmp458 << 447, 457 459: OpAccessChain: 7: 32[120] 460: OpLoad: 6: tmp460 << 459 461: OpAccessChain: 7: 32[72] 462: OpLoad: 6: tmp462 << 461 463: OpFAdd: 6: tmp463 << 462, 439 464: OpAccessChain: 7: 32[156] 465: OpLoad: 6: tmp465 << 464 466: OpCompositeConstruct: 14: tmp466 << 460, 463, 465 OpStore: : 466 >> 467 468: OpFunctionCall: 6: tmp468(467) 469: OpAccessChain: 7: 32[120] 470: OpLoad: 6: tmp470 << 469 471: OpAccessChain: 7: 32[72] 472: OpLoad: 6: tmp472 << 471 473: OpFSub: 6: tmp473 << 472, 439 474: OpAccessChain: 7: 32[156] 475: OpLoad: 6: tmp475 << 474 476: OpCompositeConstruct: 14: tmp476 << 470, 473, 475 OpStore: : 476 >> 477 478: OpFunctionCall: 6: tmp478(477) 479: OpFSub: 6: tmp479 << 468, 478 480: OpAccessChain: 7: 32[120] 481: OpLoad: 6: tmp481 << 480 482: OpAccessChain: 7: 32[72] 483: OpLoad: 6: tmp483 << 482 484: OpAccessChain: 7: 32[156] 485: OpLoad: 6: tmp485 << 484 486: OpFAdd: 6: tmp486 << 485, 439 487: OpCompositeConstruct: 14: tmp487 << 481, 483, 486 OpStore: : 487 >> 488 489: OpFunctionCall: 6: tmp489(488) 490: OpAccessChain: 7: 32[120] 491: OpLoad: 6: tmp491 << 490 492: OpAccessChain: 7: 32[72] 493: OpLoad: 6: tmp493 << 492 494: OpAccessChain: 7: 32[156] 495: OpLoad: 6: tmp495 << 494 496: OpFSub: 6: tmp496 << 495, 439 497: OpCompositeConstruct: 14: tmp497 << 491, 493, 496 OpStore: : 497 >> 498 499: OpFunctionCall: 6: tmp499(498) 500: OpFSub: 6: tmp500 << 489, 499 501: OpCompositeConstruct: 14: tmp501 << 458, 479, 500 502: OpExtInst(69): 14: tmp502 << 501 OpReturnValue: : << 502 OpFunctionEnd: 41: OpFunction: func41(type: 38) 39: OpFunctionParameter: 36: var39: storage class: Function 40: OpFunctionParameter: 37: var40: storage class: Function 42: OpLabel: 505: OpVariable: 37: var505: storage class: Function 521: OpVariable: 7: var521: storage class: Function 523: OpVariable: 15: var523: storage class: Function 530: OpVariable: 15: var530: storage class: Function 532: OpVariable: 15: var532: storage class: Function 540: OpVariable: 15: var540: storage class: Function 544: OpVariable: 7: var544: storage class: Function 545: OpVariable: 7: var545: storage class: Function 548: OpVariable: 547: var548: storage class: Function 559: OpVariable: 7: var559: storage class: Function 560: OpVariable: 15: var560: storage class: Function 568: OpVariable: 15: var568: storage class: Function 569: OpVariable: 15: var569: storage class: Function 572: OpVariable: 7: var572: storage class: Function 576: OpVariable: 7: var576: storage class: Function 506: OpLoad: 8: tmp506 << 40 510: OpLoad: 14: tmp510 << 509 511: OpVectorShuffle: 8: tmp511 << 510, 510, 0, 1 512: OpVectorTimesScalar: 8: tmp512 << 511, 507 513: OpFSub: 8: tmp513 << 506, 512 OpStore: : 513 >> 505 514: OpAccessChain: 214: 509[72] 515: OpLoad: 6: tmp515 << 514 516: OpFDiv: 6: tmp516 << 110, 515 517: OpLoad: 8: tmp517 << 505 518: OpVectorTimesScalar: 8: tmp518 << 517, 516 OpStore: : 518 >> 505 519: OpLoad: 8: tmp519 << 505 520: OpVectorTimesScalar: 8: tmp520 << 519, 329 OpStore: : 520 >> 505 OpStore: : 522 >> 521 524: OpLoad: 6: tmp524 << 521 525: OpExtInst(15): 6: tmp525 << 524 526: OpFDiv: 6: tmp526 << 54, 525 527: OpFAdd: 6: tmp527 << 54, 526 528: OpFMul: 6: tmp528 << 54, 527 529: OpCompositeConstruct: 14: tmp529 << 55, 55, 528 OpStore: : 529 >> 523 531: OpLoad: 14: tmp531 << 523 OpStore: : 531 >> 530 533: OpLoad: 8: tmp533 << 505 534: OpCompositeExtract: 6: tmp534 << 533, 0 535: OpCompositeExtract: 6: tmp535 << 533, 1 536: OpCompositeConstruct: 14: tmp536 << 534, 535, 55 537: OpLoad: 14: tmp537 << 523 538: OpFSub: 14: tmp538 << 536, 537 539: OpExtInst(69): 14: tmp539 << 538 OpStore: : 539 >> 532 OpStore: : 543 >> 540 OpStore: : 55 >> 544 OpStore: : 55 >> 545 OpStore: : 549 >> 548 OpBranch: to 550 550: OpLabel: OpLoopMerge: (merge: 552, continue: 553) OpBranch: to 554 554: OpLabel: 555: OpLoad: 546: tmp555 << 548 558: OpSLessThan: 557: tmp558 << 555, 556 OpBranchConditional: if(558) then branch to 551, else branch to 552 551: OpLabel: 561: OpLoad: 14: tmp561 << 530 OpStore: : 561 >> 560 562: OpFunctionCall: 6: tmp562(560) OpStore: : 562 >> 559 563: OpLoad: 6: tmp563 << 559 565: OpFOrdLessThan: 557: tmp565 << 563, 564 OpSelectionMerge: (merge: 567) OpBranchConditional: if(565) then branch to 566, else branch to 604 566: OpLabel: 570: OpLoad: 14: tmp570 << 530 OpStore: : 570 >> 569 571: OpFunctionCall: 14: tmp571(569) OpStore: : 571 >> 568 573: OpLoad: 14: tmp573 << 540 574: OpLoad: 14: tmp574 << 568 575: OpDot: 6: tmp575 << 573, 574 OpStore: : 575 >> 572 577: OpLoad: 6: tmp577 << 572 578: OpFSub: 6: tmp578 << 577, 54 OpStore: : 578 >> 576 580: OpLoad: 6: tmp580 << 572 581: OpFMul: 6: tmp581 << 579, 580 582: OpLoad: 6: tmp582 << 544 583: OpFAdd: 6: tmp583 << 582, 581 OpStore: : 583 >> 544 584: OpLoad: 6: tmp584 << 572 585: OpFNegate: 6: tmp585 << 584 586: OpLoad: 6: tmp586 << 572 587: OpFMul: 6: tmp587 << 585, 586 588: OpFMul: 6: tmp588 << 587, 209 589: OpExtInst(27): 6: tmp589 << 588 590: OpExtInst(43): 6: tmp590 << 589, 55, 54 591: OpLoad: 6: tmp591 << 544 592: OpFAdd: 6: tmp592 << 591, 590 OpStore: : 592 >> 544 593: OpLoad: 6: tmp593 << 576 594: OpFNegate: 6: tmp594 << 593 595: OpLoad: 6: tmp595 << 576 596: OpFMul: 6: tmp596 << 594, 595 598: OpFMul: 6: tmp598 << 596, 597 599: OpExtInst(27): 6: tmp599 << 598 600: OpExtInst(43): 6: tmp600 << 599, 55, 54 601: OpLoad: 6: tmp601 << 544 602: OpFAdd: 6: tmp602 << 601, 600 OpStore: : 602 >> 544 OpBranch: to 552 604: OpLabel: 605: OpLoad: 14: tmp605 << 530 606: OpExtInst(66): 6: tmp606 << 605 608: OpFOrdGreaterThan: 557: tmp608 << 606, 607 OpSelectionMerge: (merge: 610) OpBranchConditional: if(608) then branch to 609, else branch to 610 609: OpLabel: OpBranch: to 552 610: OpLabel: OpBranch: to 567 567: OpLabel: 613: OpLoad: 14: tmp613 << 532 614: OpVectorTimesScalar: 14: tmp614 << 613, 612 615: OpLoad: 6: tmp615 << 559 616: OpVectorTimesScalar: 14: tmp616 << 614, 615 617: OpLoad: 14: tmp617 << 530 618: OpFAdd: 14: tmp618 << 617, 616 OpStore: : 618 >> 530 OpBranch: to 553 553: OpLabel: 619: OpLoad: 546: tmp619 << 548 621: OpIAdd: 546: tmp621 << 619, 620 OpStore: : 621 >> 548 OpBranch: to 550 552: OpLabel: 624: OpLoad: 6: tmp624 << 544 625: OpVectorTimesScalar: 35: tmp625 << 623, 624 OpStore: : 625 >> 39 OpReturn: OpFunctionEnd: Linking the instructions Initial Disassembly: Module Info: OpSource: : ESSL ver 310 1: OpExtInstImport: : GLSL.std.450 OpMemoryModel: : addressing: Logical, memory: GLSL450 Capabilities: OpCapability: : Shader Inputs: 628: OpVariable: FloatVector4*: gl_FragCoord: storage class: Input Decorators: BuiltIn(FragCoord) Outputs: 636: OpVariable: FloatVector4*: finalColor: storage class: Output Uniform Constants: 215: OpVariable: Float*: iTime: storage class: UniformConstant 509: OpVariable: FloatVector3*: iResolution: storage class: UniformConstant 639: OpVariable: FloatVector4*: iMouse: storage class: UniformConstant 640: OpVariable: FloatVector4*: iDate: storage class: UniformConstant 641: OpVariable: Float*: iFrame: storage class: UniformConstant 645: OpVariable: FloatVector3[4]*: iChannelResolution: storage class: UniformConstant Textures: 649: OpVariable: SampledImage(Image(Float))*: iChannel0: storage class: UniformConstant Decorators: RelaxedPrecision, DescriptorSet(0) 650: OpVariable: SampledImage(Image(Float))*: iChannel1: storage class: UniformConstant Decorators: RelaxedPrecision, DescriptorSet(0) 651: OpVariable: SampledImage(Image(Float))*: iChannel2: storage class: UniformConstant Decorators: RelaxedPrecision, DescriptorSet(0) 652: OpVariable: SampledImage(Image(Float))*: iChannel3: storage class: UniformConstant Decorators: RelaxedPrecision, DescriptorSet(0) Entry Points: 4: OpEntryPoint: : main, execution model: Fragment, Function: Void main(), OriginLowerLeft Constants: 54: OpConstant: Float const54 = 1 55: OpConstant: Float const55 = 0 69: OpConstant: Float const69 = 0.3 70: OpConstant: Float const70 = 0.03 72: OpConstant: UInt const72 = 1 80: OpConstant: Float const80 = 0.6 93: OpConstant: Float const93 = 3 100: OpConstant: Float const100 = 0.4 101: OpConstant: Float const101 = -0.04 107: OpConstant: Float const107 = -1.5 110: OpConstant: Float const110 = 2 111: OpConstant: Float const111 = 0.02 117: OpConstant: Float const117 = 2.5 120: OpConstant: UInt const120 = 0 123: OpConstant: Float const123 = -2 130: OpConstant: Float const130 = -3 131: OpConstant: Float const131 = 0.1 148: OpConstant: Float const148 = 0.7 156: OpConstant: UInt const156 = 2 179: OpConstant: Float const179 = 2.3 209: OpConstant: Float const209 = 10 224: OpConstant: Float const224 = 2.6 235: OpConstant: Float const235 = 0.897598 242: OpConstant: Float const242 = -3.5 243: OpConstantComposite: FloatVector2 const243 = {0, -3.5} 329: OpConstant: Float const329 = 4 343: OpConstant: Float const343 = 5 356: OpConstant: Float const356 = 6 384: OpConstant: Float const384 = 0.2 385: OpConstantComposite: FloatVector2 const385 = {0.2, 0.2} 387: OpConstant: Float const387 = 2.0944 439: OpConstant: Float const439 = 0.05 507: OpConstant: Float const507 = 0.5 522: OpConstant: Float const522 = 0.15708 541: OpConstant: Float const541 = 0.408248 542: OpConstant: Float const542 = 0.816497 543: OpConstantComposite: FloatVector3 const543 = {0.408248, 0.408248, 0.816497} 549: OpConstant: Int const549 = 0 556: OpConstant: Int const556 = 100 564: OpConstant: Float const564 = 0.005 579: OpConstant: Float const579 = 0.8 597: OpConstant: Float const597 = 10000 607: OpConstant: Float const607 = 30 612: OpConstant: Float const612 = 0.71 620: OpConstant: Int const620 = 1 622: OpConstant: Float const622 = 0.9 623: OpConstantComposite: FloatVector4 const623 = {1, 0.9, 0, 0} 642: OpConstant: UInt const642 = 4 Disassembled Code: 4: OpFunction: Void main() 626: OpVariable: FloatVector4*: color: storage class: Function 629: OpVariable: FloatVector4*: param629: storage class: Function 630: OpVariable: FloatVector2*: param630: storage class: Function 5: lb5: 631: OpLoad: FloatVector4: tmp631 << gl_FragCoord 632: OpVectorShuffle: FloatVector2: tmp632 << tmp631, tmp631, 0, 1 OpStore: : tmp632 >> param630 633: OpFunctionCall: Void: mainImage(vf4;vf2;(param629, param630) 634: OpLoad: FloatVector4: tmp634 << param629 OpStore: : tmp634 >> color 637: OpLoad: FloatVector4: tmp637 << color OpStore: : tmp637 >> finalColor OpReturn: 12: OpFunction: FloatMatrix2x2 rot(f1;(Float* a) 43: OpVariable: Float*: c: storage class: Function 46: OpVariable: Float*: s: storage class: Function 13: lb13: 44: OpLoad: Float: tmp44 << a 45: OpExtInst(Cos): Float: tmp45 << tmp44 OpStore: : tmp45 >> c 47: OpLoad: Float: tmp47 << a 48: OpExtInst(Sin): Float: tmp48 << tmp47 OpStore: : tmp48 >> s 49: OpLoad: Float: tmp49 << c 50: OpLoad: Float: tmp50 << s 51: OpLoad: Float: tmp51 << s 52: OpFNegate: Float: tmp52 << tmp51 53: OpLoad: Float: tmp53 << c 56: OpCompositeConstruct: FloatVector2: tmp56 << tmp49, tmp50 57: OpCompositeConstruct: FloatVector2: tmp57 << tmp52, tmp53 58: OpCompositeConstruct: FloatMatrix2x2: tmp58 << tmp56, tmp57 OpReturnValue: : << tmp58 19: OpFunction: Float blade(vf3;f1;(FloatVector3* p, Float* a) 61: OpVariable: Float*: param61: storage class: Function 83: OpVariable: Float*: param83: storage class: Function 90: OpVariable: Float*: psy: storage class: Function 95: OpVariable: Float*: ppy: storage class: Function 99: OpVariable: Float*: xs: storage class: Function 109: OpVariable: Float*: xp: storage class: Function 20: lb20: 62: OpLoad: Float: tmp62 << a OpStore: : tmp62 >> param61 63: OpFunctionCall: FloatMatrix2x2: rot(f1;(param61) 64: OpLoad: FloatVector3: tmp64 << p 65: OpVectorShuffle: FloatVector2: tmp65 << tmp64, tmp64, 0, 1 66: OpVectorTimesMatrix: FloatVector2: tmp66 << tmp65, rot(f1; 67: OpLoad: FloatVector3: tmp67 << p 68: OpVectorShuffle: FloatVector3: tmp68 << tmp67, tmp66, 3, 4, 2 OpStore: : tmp68 >> p 73: OpAccessChain: Float*: p[1] 74: OpLoad: Float: tmp74 << p[1] 75: OpFMul: Float: tmp75 << const70, tmp74 76: OpAccessChain: Float*: p[1] 77: OpLoad: Float: tmp77 << p[1] 78: OpFMul: Float: tmp78 << tmp75, tmp77 79: OpFAdd: Float: tmp79 << const69, tmp78 81: OpExtInst(FClamp): Float: tmp81 << tmp79, const69, const80 82: OpFNegate: Float: tmp82 << tmp81 OpStore: : tmp82 >> param83 84: OpFunctionCall: FloatMatrix2x2: rot(f1;(param83) 85: OpLoad: FloatVector3: tmp85 << p 86: OpVectorShuffle: FloatVector2: tmp86 << tmp85, tmp85, 0, 2 87: OpVectorTimesMatrix: FloatVector2: tmp87 << tmp86, rot(f1; 88: OpLoad: FloatVector3: tmp88 << p 89: OpVectorShuffle: FloatVector3: tmp89 << tmp88, tmp87, 3, 1, 4 OpStore: : tmp89 >> p 91: OpAccessChain: Float*: p[1] 92: OpLoad: Float: tmp92 << p[1] 94: OpFSub: Float: tmp94 << tmp92, const93 OpStore: : tmp94 >> psy 96: OpAccessChain: Float*: p[1] 97: OpLoad: Float: tmp97 << p[1] 98: OpFSub: Float: tmp98 << tmp97, const54 OpStore: : tmp98 >> ppy 102: OpLoad: Float: tmp102 << psy 103: OpFMul: Float: tmp103 << const101, tmp102 104: OpLoad: Float: tmp104 << psy 105: OpFMul: Float: tmp105 << tmp103, tmp104 106: OpFAdd: Float: tmp106 << const100, tmp105 108: OpExtInst(FClamp): Float: tmp108 << tmp106, const107, const54 OpStore: : tmp108 >> xs 112: OpLoad: Float: tmp112 << ppy 113: OpFMul: Float: tmp113 << const111, tmp112 114: OpLoad: Float: tmp114 << ppy 115: OpFMul: Float: tmp115 << tmp113, tmp114 116: OpFAdd: Float: tmp116 << const110, tmp115 118: OpExtInst(FClamp): Float: tmp118 << tmp116, const54, const117 OpStore: : tmp118 >> xp 119: OpLoad: FloatVector3: tmp119 << p 121: OpAccessChain: Float*: p[0] 122: OpLoad: Float: tmp122 << p[0] 124: OpLoad: Float: tmp124 << xs 125: OpFMul: Float: tmp125 << const123, tmp124 126: OpLoad: Float: tmp126 << xp 127: OpExtInst(FClamp): Float: tmp127 << tmp122, tmp125, tmp126 128: OpAccessChain: Float*: p[1] 129: OpLoad: Float: tmp129 << p[1] 132: OpAccessChain: Float*: p[0] 133: OpLoad: Float: tmp133 << p[0] 134: OpFMul: Float: tmp134 << const131, tmp133 135: OpAccessChain: Float*: p[0] 136: OpLoad: Float: tmp136 << p[0] 137: OpFMul: Float: tmp137 << tmp134, tmp136 138: OpFSub: Float: tmp138 << const93, tmp137 139: OpExtInst(FClamp): Float: tmp139 << tmp129, const130, tmp138 140: OpCompositeConstruct: FloatVector3: tmp140 << tmp127, tmp139, const55 141: OpFSub: FloatVector3: tmp141 << tmp119, tmp140 142: OpExtInst(Length): Float: tmp142 << tmp141 143: OpFSub: Float: tmp143 << tmp142, const131 OpReturnValue: : << tmp143 23: OpFunction: Float centre(vf3;(FloatVector3* p) 146: OpVariable: Float*: rad: storage class: Function 147: OpVariable: Float*: len: storage class: Function 149: OpVariable: FloatVector2*: d: storage class: Function 24: lb24: OpStore: : const117 >> rad OpStore: : const148 >> len 150: OpLoad: FloatVector3: tmp150 << p 151: OpVectorShuffle: FloatVector2: tmp151 << tmp150, tmp150, 0, 1 152: OpLoad: Float: tmp152 << rad 153: OpCompositeConstruct: FloatVector2: tmp153 << tmp152, tmp152 154: OpFDiv: FloatVector2: tmp154 << tmp151, tmp153 155: OpExtInst(Length): Float: tmp155 << tmp154 157: OpAccessChain: Float*: p[2] 158: OpLoad: Float: tmp158 << p[2] 159: OpLoad: Float: tmp159 << len 160: OpFDiv: Float: tmp160 << tmp158, tmp159 161: OpCompositeConstruct: FloatVector2: tmp161 << tmp155, tmp160 162: OpExtInst(FAbs): FloatVector2: tmp162 << tmp161 163: OpCompositeConstruct: FloatVector2: tmp163 << const54, const54 164: OpFSub: FloatVector2: tmp164 << tmp162, tmp163 OpStore: : tmp164 >> d 165: OpAccessChain: Float*: d[0] 166: OpLoad: Float: tmp166 << d[0] 167: OpAccessChain: Float*: d[1] 168: OpLoad: Float: tmp168 << d[1] 169: OpExtInst(FMax): Float: tmp169 << tmp166, tmp168 170: OpExtInst(FMin): Float: tmp170 << tmp169, const55 171: OpLoad: FloatVector2: tmp171 << d 172: OpCompositeConstruct: FloatVector2: tmp172 << const55, const55 173: OpExtInst(FMax): FloatVector2: tmp173 << tmp171, tmp172 174: OpExtInst(Length): Float: tmp174 << tmp173 175: OpFAdd: Float: tmp175 << tmp170, tmp174 OpReturnValue: : << tmp175 26: OpFunction: Float concav(vf3;(FloatVector3* p) 178: OpVariable: Float*: rad: storage class: Function 180: OpVariable: Float*: len: storage class: Function 181: OpVariable: FloatVector2*: d: storage class: Function 27: lb27: OpStore: : const179 >> rad OpStore: : const148 >> len 182: OpLoad: FloatVector3: tmp182 << p 183: OpVectorShuffle: FloatVector2: tmp183 << tmp182, tmp182, 0, 1 184: OpLoad: Float: tmp184 << rad 185: OpCompositeConstruct: FloatVector2: tmp185 << tmp184, tmp184 186: OpFDiv: FloatVector2: tmp186 << tmp183, tmp185 187: OpExtInst(Length): Float: tmp187 << tmp186 188: OpAccessChain: Float*: p[2] 189: OpLoad: Float: tmp189 << p[2] 190: OpLoad: Float: tmp190 << len 191: OpFDiv: Float: tmp191 << tmp189, tmp190 192: OpCompositeConstruct: FloatVector2: tmp192 << tmp187, tmp191 193: OpExtInst(FAbs): FloatVector2: tmp193 << tmp192 194: OpCompositeConstruct: FloatVector2: tmp194 << const54, const54 195: OpFSub: FloatVector2: tmp195 << tmp193, tmp194 OpStore: : tmp195 >> d 196: OpAccessChain: Float*: d[0] 197: OpLoad: Float: tmp197 << d[0] 198: OpAccessChain: Float*: d[1] 199: OpLoad: Float: tmp199 << d[1] 200: OpExtInst(FMax): Float: tmp200 << tmp197, tmp199 201: OpExtInst(FMin): Float: tmp201 << tmp200, const55 202: OpLoad: FloatVector2: tmp202 << d 203: OpCompositeConstruct: FloatVector2: tmp203 << const55, const55 204: OpExtInst(FMax): FloatVector2: tmp204 << tmp202, tmp203 205: OpExtInst(Length): Float: tmp205 << tmp204 206: OpFAdd: Float: tmp206 << tmp201, tmp205 OpReturnValue: : << tmp206 29: OpFunction: Float sceneSDF(vf3;(FloatVector3* p) 216: OpVariable: Float*: param216: storage class: Function 227: OpVariable: Float*: param227: storage class: Function 234: OpVariable: Float*: a: storage class: Function 237: OpVariable: FloatMatrix2x2*: R: storage class: Function 238: OpVariable: Float*: param238: storage class: Function 241: OpVariable: FloatVector2*: O1: storage class: Function 244: OpVariable: FloatVector2*: O2: storage class: Function 248: OpVariable: FloatVector2*: O3: storage class: Function 252: OpVariable: FloatVector2*: O4: storage class: Function 256: OpVariable: FloatVector2*: O5: storage class: Function 260: OpVariable: FloatVector2*: O6: storage class: Function 264: OpVariable: FloatVector2*: O7: storage class: Function 268: OpVariable: Float*: z_pos: storage class: Function 269: OpVariable: Float*: d: storage class: Function 279: OpVariable: FloatVector3*: param279: storage class: Function 280: OpVariable: Float*: param280: storage class: Function 291: OpVariable: FloatVector3*: param291: storage class: Function 292: OpVariable: Float*: param292: storage class: Function 304: OpVariable: FloatVector3*: param304: storage class: Function 305: OpVariable: Float*: param305: storage class: Function 316: OpVariable: FloatVector3*: param316: storage class: Function 317: OpVariable: Float*: param317: storage class: Function 332: OpVariable: FloatVector3*: param332: storage class: Function 333: OpVariable: Float*: param333: storage class: Function 346: OpVariable: FloatVector3*: param346: storage class: Function 347: OpVariable: Float*: param347: storage class: Function 359: OpVariable: FloatVector3*: param359: storage class: Function 360: OpVariable: Float*: param360: storage class: Function 370: OpVariable: FloatVector3*: param370: storage class: Function 379: OpVariable: FloatVector3*: param379: storage class: Function 383: OpVariable: FloatVector2*: p1: storage class: Function 386: OpVariable: FloatVector2*: p2: storage class: Function 388: OpVariable: Float*: param388: storage class: Function 392: OpVariable: FloatVector2*: p3: storage class: Function 393: OpVariable: Float*: param393: storage class: Function 397: OpVariable: Float*: d_logo: storage class: Function 30: lb30: 210: OpAccessChain: Float*: p[2] 211: OpLoad: Float: tmp211 << p[2] 212: OpFAdd: Float: tmp212 << tmp211, const209 213: OpAccessChain: Float*: p[2] OpStore: : tmp212 >> p[2] 217: OpLoad: Float: tmp217 << iTime OpStore: : tmp217 >> param216 218: OpFunctionCall: FloatMatrix2x2: rot(f1;(param216) 219: OpLoad: FloatVector3: tmp219 << p 220: OpVectorShuffle: FloatVector2: tmp220 << tmp219, tmp219, 0, 2 221: OpVectorTimesMatrix: FloatVector2: tmp221 << tmp220, rot(f1; 222: OpLoad: FloatVector3: tmp222 << p 223: OpVectorShuffle: FloatVector3: tmp223 << tmp222, tmp221, 3, 1, 4 OpStore: : tmp223 >> p 225: OpLoad: Float: tmp225 << iTime 226: OpFMul: Float: tmp226 << const224, tmp225 OpStore: : tmp226 >> param227 228: OpFunctionCall: FloatMatrix2x2: rot(f1;(param227) 229: OpLoad: FloatVector3: tmp229 << p 230: OpVectorShuffle: FloatVector2: tmp230 << tmp229, tmp229, 0, 1 231: OpVectorTimesMatrix: FloatVector2: tmp231 << tmp230, rot(f1; 232: OpLoad: FloatVector3: tmp232 << p 233: OpVectorShuffle: FloatVector3: tmp233 << tmp232, tmp231, 3, 4, 2 OpStore: : tmp233 >> p OpStore: : const235 >> a 239: OpLoad: Float: tmp239 << a OpStore: : tmp239 >> param238 240: OpFunctionCall: FloatMatrix2x2: rot(f1;(param238) OpStore: : rot(f1; >> R OpStore: : const243 >> O1 245: OpLoad: FloatMatrix2x2: tmp245 << R 246: OpLoad: FloatVector2: tmp246 << O1 247: OpMatrixTimesVector: FloatVector2: tmp247 << tmp245, tmp246 OpStore: : tmp247 >> O2 249: OpLoad: FloatMatrix2x2: tmp249 << R 250: OpLoad: FloatVector2: tmp250 << O2 251: OpMatrixTimesVector: FloatVector2: tmp251 << tmp249, tmp250 OpStore: : tmp251 >> O3 253: OpLoad: FloatMatrix2x2: tmp253 << R 254: OpLoad: FloatVector2: tmp254 << O3 255: OpMatrixTimesVector: FloatVector2: tmp255 << tmp253, tmp254 OpStore: : tmp255 >> O4 257: OpLoad: FloatMatrix2x2: tmp257 << R 258: OpLoad: FloatVector2: tmp258 << O4 259: OpMatrixTimesVector: FloatVector2: tmp259 << tmp257, tmp258 OpStore: : tmp259 >> O5 261: OpLoad: FloatMatrix2x2: tmp261 << R 262: OpLoad: FloatVector2: tmp262 << O5 263: OpMatrixTimesVector: FloatVector2: tmp263 << tmp261, tmp262 OpStore: : tmp263 >> O6 265: OpLoad: FloatMatrix2x2: tmp265 << R 266: OpLoad: FloatVector2: tmp266 << O6 267: OpMatrixTimesVector: FloatVector2: tmp267 << tmp265, tmp266 OpStore: : tmp267 >> O7 OpStore: : const55 >> z_pos 270: OpLoad: FloatVector3: tmp270 << p 271: OpLoad: FloatVector2: tmp271 << O1 272: OpLoad: Float: tmp272 << z_pos 273: OpCompositeExtract: Float: tmp273 << tmp271, 0 274: OpCompositeExtract: Float: tmp274 << tmp271, 1 275: OpCompositeConstruct: FloatVector3: tmp275 << tmp273, tmp274, tmp272 276: OpFAdd: FloatVector3: tmp276 << tmp270, tmp275 277: OpLoad: Float: tmp277 << a 278: OpFMul: Float: tmp278 << const55, tmp277 OpStore: : tmp276 >> param279 OpStore: : tmp278 >> param280 281: OpFunctionCall: Float: blade(vf3;f1;(param279, param280) 282: OpLoad: FloatVector3: tmp282 << p 283: OpLoad: FloatVector2: tmp283 << O2 284: OpLoad: Float: tmp284 << z_pos 285: OpCompositeExtract: Float: tmp285 << tmp283, 0 286: OpCompositeExtract: Float: tmp286 << tmp283, 1 287: OpCompositeConstruct: FloatVector3: tmp287 << tmp285, tmp286, tmp284 288: OpFAdd: FloatVector3: tmp288 << tmp282, tmp287 289: OpLoad: Float: tmp289 << a 290: OpFMul: Float: tmp290 << const54, tmp289 OpStore: : tmp288 >> param291 OpStore: : tmp290 >> param292 293: OpFunctionCall: Float: blade(vf3;f1;(param291, param292) 294: OpExtInst(FMin): Float: tmp294 << blade(vf3;f1;, blade(vf3;f1; 295: OpLoad: FloatVector3: tmp295 << p 296: OpLoad: FloatVector2: tmp296 << O3 297: OpLoad: Float: tmp297 << z_pos 298: OpCompositeExtract: Float: tmp298 << tmp296, 0 299: OpCompositeExtract: Float: tmp299 << tmp296, 1 300: OpCompositeConstruct: FloatVector3: tmp300 << tmp298, tmp299, tmp297 301: OpFAdd: FloatVector3: tmp301 << tmp295, tmp300 302: OpLoad: Float: tmp302 << a 303: OpFMul: Float: tmp303 << const110, tmp302 OpStore: : tmp301 >> param304 OpStore: : tmp303 >> param305 306: OpFunctionCall: Float: blade(vf3;f1;(param304, param305) 307: OpLoad: FloatVector3: tmp307 << p 308: OpLoad: FloatVector2: tmp308 << O4 309: OpLoad: Float: tmp309 << z_pos 310: OpCompositeExtract: Float: tmp310 << tmp308, 0 311: OpCompositeExtract: Float: tmp311 << tmp308, 1 312: OpCompositeConstruct: FloatVector3: tmp312 << tmp310, tmp311, tmp309 313: OpFAdd: FloatVector3: tmp313 << tmp307, tmp312 314: OpLoad: Float: tmp314 << a 315: OpFMul: Float: tmp315 << const93, tmp314 OpStore: : tmp313 >> param316 OpStore: : tmp315 >> param317 318: OpFunctionCall: Float: blade(vf3;f1;(param316, param317) 319: OpExtInst(FMin): Float: tmp319 << blade(vf3;f1;, blade(vf3;f1; 320: OpExtInst(FMin): Float: tmp320 << tmp294, tmp319 OpStore: : tmp320 >> d 321: OpLoad: Float: tmp321 << d 322: OpLoad: FloatVector3: tmp322 << p 323: OpLoad: FloatVector2: tmp323 << O5 324: OpLoad: Float: tmp324 << z_pos 325: OpCompositeExtract: Float: tmp325 << tmp323, 0 326: OpCompositeExtract: Float: tmp326 << tmp323, 1 327: OpCompositeConstruct: FloatVector3: tmp327 << tmp325, tmp326, tmp324 328: OpFAdd: FloatVector3: tmp328 << tmp322, tmp327 330: OpLoad: Float: tmp330 << a 331: OpFMul: Float: tmp331 << const329, tmp330 OpStore: : tmp328 >> param332 OpStore: : tmp331 >> param333 334: OpFunctionCall: Float: blade(vf3;f1;(param332, param333) 335: OpExtInst(FMin): Float: tmp335 << tmp321, blade(vf3;f1; 336: OpLoad: FloatVector3: tmp336 << p 337: OpLoad: FloatVector2: tmp337 << O6 338: OpLoad: Float: tmp338 << z_pos 339: OpCompositeExtract: Float: tmp339 << tmp337, 0 340: OpCompositeExtract: Float: tmp340 << tmp337, 1 341: OpCompositeConstruct: FloatVector3: tmp341 << tmp339, tmp340, tmp338 342: OpFAdd: FloatVector3: tmp342 << tmp336, tmp341 344: OpLoad: Float: tmp344 << a 345: OpFMul: Float: tmp345 << const343, tmp344 OpStore: : tmp342 >> param346 OpStore: : tmp345 >> param347 348: OpFunctionCall: Float: blade(vf3;f1;(param346, param347) 349: OpLoad: FloatVector3: tmp349 << p 350: OpLoad: FloatVector2: tmp350 << O7 351: OpLoad: Float: tmp351 << z_pos 352: OpCompositeExtract: Float: tmp352 << tmp350, 0 353: OpCompositeExtract: Float: tmp353 << tmp350, 1 354: OpCompositeConstruct: FloatVector3: tmp354 << tmp352, tmp353, tmp351 355: OpFAdd: FloatVector3: tmp355 << tmp349, tmp354 357: OpLoad: Float: tmp357 << a 358: OpFMul: Float: tmp358 << const356, tmp357 OpStore: : tmp355 >> param359 OpStore: : tmp358 >> param360 361: OpFunctionCall: Float: blade(vf3;f1;(param359, param360) 362: OpExtInst(FMin): Float: tmp362 << blade(vf3;f1;, blade(vf3;f1; 363: OpExtInst(FMin): Float: tmp363 << tmp335, tmp362 OpStore: : tmp363 >> d 364: OpLoad: Float: tmp364 << d 365: OpLoad: FloatVector3: tmp365 << p 366: OpLoad: Float: tmp366 << z_pos 367: OpFAdd: Float: tmp367 << const148, tmp366 368: OpCompositeConstruct: FloatVector3: tmp368 << const55, const55, tmp367 369: OpFAdd: FloatVector3: tmp369 << tmp365, tmp368 OpStore: : tmp369 >> param370 371: OpFunctionCall: Float: centre(vf3;(param370) 372: OpExtInst(FMin): Float: tmp372 << tmp364, centre(vf3; OpStore: : tmp372 >> d 373: OpLoad: Float: tmp373 << d 374: OpLoad: FloatVector3: tmp374 << p 375: OpLoad: Float: tmp375 << z_pos 376: OpFAdd: Float: tmp376 << const54, tmp375 377: OpCompositeConstruct: FloatVector3: tmp377 << const55, const55, tmp376 378: OpFAdd: FloatVector3: tmp378 << tmp374, tmp377 OpStore: : tmp378 >> param379 380: OpFunctionCall: Float: concav(vf3;(param379) 381: OpFNegate: Float: tmp381 << concav(vf3; 382: OpExtInst(FMax): Float: tmp382 << tmp373, tmp381 OpStore: : tmp382 >> d OpStore: : const385 >> p1 OpStore: : const387 >> param388 389: OpFunctionCall: FloatMatrix2x2: rot(f1;(param388) 390: OpLoad: FloatVector2: tmp390 << p1 391: OpMatrixTimesVector: FloatVector2: tmp391 << rot(f1;, tmp390 OpStore: : tmp391 >> p2 OpStore: : const387 >> param393 394: OpFunctionCall: FloatMatrix2x2: rot(f1;(param393) 395: OpLoad: FloatVector2: tmp395 << p2 396: OpMatrixTimesVector: FloatVector2: tmp396 << rot(f1;, tmp395 OpStore: : tmp396 >> p3 398: OpLoad: FloatVector3: tmp398 << p 399: OpLoad: FloatVector2: tmp399 << p1 400: OpLoad: Float: tmp400 << z_pos 401: OpFAdd: Float: tmp401 << const55, tmp400 402: OpCompositeExtract: Float: tmp402 << tmp399, 0 403: OpCompositeExtract: Float: tmp403 << tmp399, 1 404: OpCompositeConstruct: FloatVector3: tmp404 << tmp402, tmp403, tmp401 405: OpFAdd: FloatVector3: tmp405 << tmp398, tmp404 406: OpExtInst(Length): Float: tmp406 << tmp405 407: OpFSub: Float: tmp407 << tmp406, const384 408: OpLoad: FloatVector3: tmp408 << p 409: OpLoad: FloatVector2: tmp409 << p2 410: OpLoad: Float: tmp410 << z_pos 411: OpFAdd: Float: tmp411 << const55, tmp410 412: OpCompositeExtract: Float: tmp412 << tmp409, 0 413: OpCompositeExtract: Float: tmp413 << tmp409, 1 414: OpCompositeConstruct: FloatVector3: tmp414 << tmp412, tmp413, tmp411 415: OpFAdd: FloatVector3: tmp415 << tmp408, tmp414 416: OpExtInst(Length): Float: tmp416 << tmp415 417: OpFSub: Float: tmp417 << tmp416, const384 418: OpExtInst(FMin): Float: tmp418 << tmp407, tmp417 419: OpLoad: FloatVector3: tmp419 << p 420: OpLoad: FloatVector2: tmp420 << p3 421: OpLoad: Float: tmp421 << z_pos 422: OpFAdd: Float: tmp422 << const55, tmp421 423: OpCompositeExtract: Float: tmp423 << tmp420, 0 424: OpCompositeExtract: Float: tmp424 << tmp420, 1 425: OpCompositeConstruct: FloatVector3: tmp425 << tmp423, tmp424, tmp422 426: OpFAdd: FloatVector3: tmp426 << tmp419, tmp425 427: OpExtInst(Length): Float: tmp427 << tmp426 428: OpFSub: Float: tmp428 << tmp427, const384 429: OpExtInst(FMin): Float: tmp429 << tmp418, tmp428 OpStore: : tmp429 >> d_logo 430: OpLoad: Float: tmp430 << d 431: OpLoad: Float: tmp431 << d_logo 432: OpFNegate: Float: tmp432 << tmp431 433: OpExtInst(FMax): Float: tmp433 << tmp430, tmp432 OpStore: : tmp433 >> d 434: OpLoad: Float: tmp434 << d OpReturnValue: : << tmp434 33: OpFunction: FloatVector3 estimateNormal(vf3;(FloatVector3* p) 446: OpVariable: FloatVector3*: param446: storage class: Function 456: OpVariable: FloatVector3*: param456: storage class: Function 467: OpVariable: FloatVector3*: param467: storage class: Function 477: OpVariable: FloatVector3*: param477: storage class: Function 488: OpVariable: FloatVector3*: param488: storage class: Function 498: OpVariable: FloatVector3*: param498: storage class: Function 34: lb34: 437: OpAccessChain: Float*: p[0] 438: OpLoad: Float: tmp438 << p[0] 440: OpFAdd: Float: tmp440 << tmp438, const439 441: OpAccessChain: Float*: p[1] 442: OpLoad: Float: tmp442 << p[1] 443: OpAccessChain: Float*: p[2] 444: OpLoad: Float: tmp444 << p[2] 445: OpCompositeConstruct: FloatVector3: tmp445 << tmp440, tmp442, tmp444 OpStore: : tmp445 >> param446 447: OpFunctionCall: Float: sceneSDF(vf3;(param446) 448: OpAccessChain: Float*: p[0] 449: OpLoad: Float: tmp449 << p[0] 450: OpFSub: Float: tmp450 << tmp449, const439 451: OpAccessChain: Float*: p[1] 452: OpLoad: Float: tmp452 << p[1] 453: OpAccessChain: Float*: p[2] 454: OpLoad: Float: tmp454 << p[2] 455: OpCompositeConstruct: FloatVector3: tmp455 << tmp450, tmp452, tmp454 OpStore: : tmp455 >> param456 457: OpFunctionCall: Float: sceneSDF(vf3;(param456) 458: OpFSub: Float: tmp458 << sceneSDF(vf3;, sceneSDF(vf3; 459: OpAccessChain: Float*: p[0] 460: OpLoad: Float: tmp460 << p[0] 461: OpAccessChain: Float*: p[1] 462: OpLoad: Float: tmp462 << p[1] 463: OpFAdd: Float: tmp463 << tmp462, const439 464: OpAccessChain: Float*: p[2] 465: OpLoad: Float: tmp465 << p[2] 466: OpCompositeConstruct: FloatVector3: tmp466 << tmp460, tmp463, tmp465 OpStore: : tmp466 >> param467 468: OpFunctionCall: Float: sceneSDF(vf3;(param467) 469: OpAccessChain: Float*: p[0] 470: OpLoad: Float: tmp470 << p[0] 471: OpAccessChain: Float*: p[1] 472: OpLoad: Float: tmp472 << p[1] 473: OpFSub: Float: tmp473 << tmp472, const439 474: OpAccessChain: Float*: p[2] 475: OpLoad: Float: tmp475 << p[2] 476: OpCompositeConstruct: FloatVector3: tmp476 << tmp470, tmp473, tmp475 OpStore: : tmp476 >> param477 478: OpFunctionCall: Float: sceneSDF(vf3;(param477) 479: OpFSub: Float: tmp479 << sceneSDF(vf3;, sceneSDF(vf3; 480: OpAccessChain: Float*: p[0] 481: OpLoad: Float: tmp481 << p[0] 482: OpAccessChain: Float*: p[1] 483: OpLoad: Float: tmp483 << p[1] 484: OpAccessChain: Float*: p[2] 485: OpLoad: Float: tmp485 << p[2] 486: OpFAdd: Float: tmp486 << tmp485, const439 487: OpCompositeConstruct: FloatVector3: tmp487 << tmp481, tmp483, tmp486 OpStore: : tmp487 >> param488 489: OpFunctionCall: Float: sceneSDF(vf3;(param488) 490: OpAccessChain: Float*: p[0] 491: OpLoad: Float: tmp491 << p[0] 492: OpAccessChain: Float*: p[1] 493: OpLoad: Float: tmp493 << p[1] 494: OpAccessChain: Float*: p[2] 495: OpLoad: Float: tmp495 << p[2] 496: OpFSub: Float: tmp496 << tmp495, const439 497: OpCompositeConstruct: FloatVector3: tmp497 << tmp491, tmp493, tmp496 OpStore: : tmp497 >> param498 499: OpFunctionCall: Float: sceneSDF(vf3;(param498) 500: OpFSub: Float: tmp500 << sceneSDF(vf3;, sceneSDF(vf3; 501: OpCompositeConstruct: FloatVector3: tmp501 << tmp458, tmp479, tmp500 502: OpExtInst(Normalize): FloatVector3: tmp502 << tmp501 OpReturnValue: : << tmp502 41: OpFunction: Void mainImage(vf4;vf2;(FloatVector4* fragColor, FloatVector2* fragCoord) 505: OpVariable: FloatVector2*: uv: storage class: Function 521: OpVariable: Float*: fov: storage class: Function 523: OpVariable: FloatVector3*: cam_pos: storage class: Function 530: OpVariable: FloatVector3*: ray: storage class: Function 532: OpVariable: FloatVector3*: dir: storage class: Function 540: OpVariable: FloatVector3*: light: storage class: Function 544: OpVariable: Float*: shade: storage class: Function 545: OpVariable: Float*: shade_1: storage class: Function 548: OpVariable: Int*: i: storage class: Function Decorators: RelaxedPrecision 559: OpVariable: Float*: dist: storage class: Function 560: OpVariable: FloatVector3*: param560: storage class: Function 568: OpVariable: FloatVector3*: n: storage class: Function 569: OpVariable: FloatVector3*: param569: storage class: Function 572: OpVariable: Float*: soft: storage class: Function 576: OpVariable: Float*: soft_s: storage class: Function 42: lb42: 506: OpLoad: FloatVector2: tmp506 << fragCoord 510: OpLoad: FloatVector3: tmp510 << iResolution 511: OpVectorShuffle: FloatVector2: tmp511 << tmp510, tmp510, 0, 1 512: OpVectorTimesScalar: FloatVector2: tmp512 << tmp511, const507 513: OpFSub: FloatVector2: tmp513 << tmp506, tmp512 OpStore: : tmp513 >> uv 514: OpAccessChain: Float*: iResolution[1] 515: OpLoad: Float: tmp515 << iResolution[1] 516: OpFDiv: Float: tmp516 << const110, tmp515 517: OpLoad: FloatVector2: tmp517 << uv 518: OpVectorTimesScalar: FloatVector2: tmp518 << tmp517, tmp516 OpStore: : tmp518 >> uv 519: OpLoad: FloatVector2: tmp519 << uv 520: OpVectorTimesScalar: FloatVector2: tmp520 << tmp519, const329 OpStore: : tmp520 >> uv OpStore: : const522 >> fov 524: OpLoad: Float: tmp524 << fov 525: OpExtInst(Tan): Float: tmp525 << tmp524 526: OpFDiv: Float: tmp526 << const54, tmp525 527: OpFAdd: Float: tmp527 << const54, tmp526 528: OpFMul: Float: tmp528 << const54, tmp527 529: OpCompositeConstruct: FloatVector3: tmp529 << const55, const55, tmp528 OpStore: : tmp529 >> cam_pos 531: OpLoad: FloatVector3: tmp531 << cam_pos OpStore: : tmp531 >> ray 533: OpLoad: FloatVector2: tmp533 << uv 534: OpCompositeExtract: Float: tmp534 << tmp533, 0 535: OpCompositeExtract: Float: tmp535 << tmp533, 1 536: OpCompositeConstruct: FloatVector3: tmp536 << tmp534, tmp535, const55 537: OpLoad: FloatVector3: tmp537 << cam_pos 538: OpFSub: FloatVector3: tmp538 << tmp536, tmp537 539: OpExtInst(Normalize): FloatVector3: tmp539 << tmp538 OpStore: : tmp539 >> dir OpStore: : const543 >> light OpStore: : const55 >> shade OpStore: : const55 >> shade_1 OpStore: : const549 >> i OpBranch: to lb550 550: lb550: OpLoopMerge: (merge: lb552, continue: lb553) OpBranch: to lb554 554: lb554: 555: OpLoad: Int: tmp555 << i Decorators: RelaxedPrecision 558: OpSLessThan: Bool: tmp558 << tmp555, const556 OpBranchConditional: if(tmp558) then branch to lb551, else branch to lb552 551: lb551: 561: OpLoad: FloatVector3: tmp561 << ray OpStore: : tmp561 >> param560 562: OpFunctionCall: Float: sceneSDF(vf3;(param560) OpStore: : sceneSDF(vf3; >> dist 563: OpLoad: Float: tmp563 << dist 565: OpFOrdLessThan: Bool: tmp565 << tmp563, const564 OpSelectionMerge: (merge: lb567) OpBranchConditional: if(tmp565) then branch to lb566, else branch to lb604 566: lb566: 570: OpLoad: FloatVector3: tmp570 << ray OpStore: : tmp570 >> param569 571: OpFunctionCall: FloatVector3: estimateNormal(vf3;(param569) OpStore: : estimateNormal(vf3; >> n 573: OpLoad: FloatVector3: tmp573 << light 574: OpLoad: FloatVector3: tmp574 << n 575: OpDot: Float: tmp575 << tmp573, tmp574 OpStore: : tmp575 >> soft 577: OpLoad: Float: tmp577 << soft 578: OpFSub: Float: tmp578 << tmp577, const54 OpStore: : tmp578 >> soft_s 580: OpLoad: Float: tmp580 << soft 581: OpFMul: Float: tmp581 << const579, tmp580 582: OpLoad: Float: tmp582 << shade 583: OpFAdd: Float: tmp583 << tmp582, tmp581 OpStore: : tmp583 >> shade 584: OpLoad: Float: tmp584 << soft 585: OpFNegate: Float: tmp585 << tmp584 586: OpLoad: Float: tmp586 << soft 587: OpFMul: Float: tmp587 << tmp585, tmp586 588: OpFMul: Float: tmp588 << tmp587, const209 589: OpExtInst(Exp): Float: tmp589 << tmp588 590: OpExtInst(FClamp): Float: tmp590 << tmp589, const55, const54 591: OpLoad: Float: tmp591 << shade 592: OpFAdd: Float: tmp592 << tmp591, tmp590 OpStore: : tmp592 >> shade 593: OpLoad: Float: tmp593 << soft_s 594: OpFNegate: Float: tmp594 << tmp593 595: OpLoad: Float: tmp595 << soft_s 596: OpFMul: Float: tmp596 << tmp594, tmp595 598: OpFMul: Float: tmp598 << tmp596, const597 599: OpExtInst(Exp): Float: tmp599 << tmp598 600: OpExtInst(FClamp): Float: tmp600 << tmp599, const55, const54 601: OpLoad: Float: tmp601 << shade 602: OpFAdd: Float: tmp602 << tmp601, tmp600 OpStore: : tmp602 >> shade OpBranch: to lb552 604: lb604: 605: OpLoad: FloatVector3: tmp605 << ray 606: OpExtInst(Length): Float: tmp606 << tmp605 608: OpFOrdGreaterThan: Bool: tmp608 << tmp606, const607 OpSelectionMerge: (merge: lb610) OpBranchConditional: if(tmp608) then branch to lb609, else branch to lb610 609: lb609: OpBranch: to lb552 610: lb610: OpBranch: to lb567 567: lb567: 613: OpLoad: FloatVector3: tmp613 << dir 614: OpVectorTimesScalar: FloatVector3: tmp614 << tmp613, const612 615: OpLoad: Float: tmp615 << dist 616: OpVectorTimesScalar: FloatVector3: tmp616 << tmp614, tmp615 617: OpLoad: FloatVector3: tmp617 << ray 618: OpFAdd: FloatVector3: tmp618 << tmp617, tmp616 OpStore: : tmp618 >> ray OpBranch: to lb553 553: lb553: 619: OpLoad: Int: tmp619 << i Decorators: RelaxedPrecision 621: OpIAdd: Int: tmp621 << tmp619, const620 Decorators: RelaxedPrecision OpStore: : tmp621 >> i OpBranch: to lb550 552: lb552: 624: OpLoad: Float: tmp624 << shade 625: OpVectorTimesScalar: FloatVector4: tmp625 << const623, tmp624 OpStore: : tmp625 >> fragColor OpReturn: Performing hardware-independent optimization... Variable color Variable color is redundant. Removing both it and related Load/Store instructions. Variable param629 Variable param630 Removed 1 redundant local variables from function main Variable c Variable c is redundant. Removing both it and related Load/Store instructions. Variable s Variable s is redundant. Removing both it and related Load/Store instructions. Removed 2 redundant local variables from function rot(f1; Variable param61 Variable param83 Variable psy Variable psy is redundant. Removing both it and related Load/Store instructions. Variable ppy Variable ppy is redundant. Removing both it and related Load/Store instructions. Variable xs Variable xs is redundant. Removing both it and related Load/Store instructions. Variable xp Variable xp is redundant. Removing both it and related Load/Store instructions. Removed 4 redundant local variables from function blade(vf3;f1; Variable rad Variable rad is redundant. Removing both it and related Load/Store instructions. Variable len Variable len is redundant. Removing both it and related Load/Store instructions. Variable d Variable d is redundant. Removing both it and related Load/Store instructions. Removed 3 redundant local variables from function centre(vf3; Variable rad Variable rad is redundant. Removing both it and related Load/Store instructions. Variable len Variable len is redundant. Removing both it and related Load/Store instructions. Variable d Variable d is redundant. Removing both it and related Load/Store instructions. Removed 3 redundant local variables from function concav(vf3; Variable param216 Variable param227 Variable a Variable a is redundant. Removing both it and related Load/Store instructions. Variable R Variable R is redundant. Removing both it and related Load/Store instructions. Variable param238 Variable O1 Variable O1 is redundant. Removing both it and related Load/Store instructions. Variable O2 Variable O2 is redundant. Removing both it and related Load/Store instructions. Variable O3 Variable O3 is redundant. Removing both it and related Load/Store instructions. Variable O4 Variable O4 is redundant. Removing both it and related Load/Store instructions. Variable O5 Variable O5 is redundant. Removing both it and related Load/Store instructions. Variable O6 Variable O6 is redundant. Removing both it and related Load/Store instructions. Variable O7 Variable O7 is redundant. Removing both it and related Load/Store instructions. Variable z_pos Variable z_pos is redundant. Removing both it and related Load/Store instructions. Variable d Variable param279 Variable param280 Variable param291 Variable param292 Variable param304 Variable param305 Variable param316 Variable param317 Variable param332 Variable param333 Variable param346 Variable param347 Variable param359 Variable param360 Variable param370 Variable param379 Variable p1 Variable p1 is redundant. Removing both it and related Load/Store instructions. Variable p2 Variable p2 is redundant. Removing both it and related Load/Store instructions. Variable param388 Variable p3 Variable p3 is redundant. Removing both it and related Load/Store instructions. Variable param393 Variable d_logo Variable d_logo is redundant. Removing both it and related Load/Store instructions. Removed 14 redundant local variables from function sceneSDF(vf3; Variable param446 Variable param456 Variable param467 Variable param477 Variable param488 Variable param498 Variable uv Variable fov Variable fov is redundant. Removing both it and related Load/Store instructions. Variable cam_pos Variable cam_pos is redundant. Removing both it and related Load/Store instructions. Variable ray Variable dir Variable dir is redundant. Removing both it and related Load/Store instructions. Variable light Variable light is redundant. Removing both it and related Load/Store instructions. Variable shade Variable shade_1 Variable shade_1 is redundant. Removing both it and related Load/Store instructions. Variable i Variable dist Variable dist is redundant. Removing both it and related Load/Store instructions. Variable param560 Variable n Variable n is redundant. Removing both it and related Load/Store instructions. Variable param569 Variable soft Variable soft is redundant. Removing both it and related Load/Store instructions. Variable soft_s Variable soft_s is redundant. Removing both it and related Load/Store instructions. Removed 9 redundant local variables from function mainImage(vf4;vf2; Optimization done. Optimized Disassembly: Module Info: OpSource: : ESSL ver 310 1: OpExtInstImport: : GLSL.std.450 OpMemoryModel: : addressing: Logical, memory: GLSL450 Capabilities: OpCapability: : Shader Inputs: 628: OpVariable: FloatVector4*: gl_FragCoord: storage class: Input Decorators: BuiltIn(FragCoord) Outputs: 636: OpVariable: FloatVector4*: finalColor: storage class: Output Uniform Constants: 215: OpVariable: Float*: iTime: storage class: UniformConstant 509: OpVariable: FloatVector3*: iResolution: storage class: UniformConstant 639: OpVariable: FloatVector4*: iMouse: storage class: UniformConstant 640: OpVariable: FloatVector4*: iDate: storage class: UniformConstant 641: OpVariable: Float*: iFrame: storage class: UniformConstant 645: OpVariable: FloatVector3[4]*: iChannelResolution: storage class: UniformConstant Textures: 649: OpVariable: SampledImage(Image(Float))*: iChannel0: storage class: UniformConstant Decorators: RelaxedPrecision, DescriptorSet(0) 650: OpVariable: SampledImage(Image(Float))*: iChannel1: storage class: UniformConstant Decorators: RelaxedPrecision, DescriptorSet(0) 651: OpVariable: SampledImage(Image(Float))*: iChannel2: storage class: UniformConstant Decorators: RelaxedPrecision, DescriptorSet(0) 652: OpVariable: SampledImage(Image(Float))*: iChannel3: storage class: UniformConstant Decorators: RelaxedPrecision, DescriptorSet(0) Entry Points: 4: OpEntryPoint: : main, execution model: Fragment, Function: Void main(), OriginLowerLeft Constants: 54: OpConstant: Float const54 = 1 55: OpConstant: Float const55 = 0 69: OpConstant: Float const69 = 0.3 70: OpConstant: Float const70 = 0.03 72: OpConstant: UInt const72 = 1 80: OpConstant: Float const80 = 0.6 93: OpConstant: Float const93 = 3 100: OpConstant: Float const100 = 0.4 101: OpConstant: Float const101 = -0.04 107: OpConstant: Float const107 = -1.5 110: OpConstant: Float const110 = 2 111: OpConstant: Float const111 = 0.02 117: OpConstant: Float const117 = 2.5 120: OpConstant: UInt const120 = 0 123: OpConstant: Float const123 = -2 130: OpConstant: Float const130 = -3 131: OpConstant: Float const131 = 0.1 148: OpConstant: Float const148 = 0.7 156: OpConstant: UInt const156 = 2 179: OpConstant: Float const179 = 2.3 209: OpConstant: Float const209 = 10 224: OpConstant: Float const224 = 2.6 235: OpConstant: Float const235 = 0.897598 242: OpConstant: Float const242 = -3.5 243: OpConstantComposite: FloatVector2 const243 = {0, -3.5} 329: OpConstant: Float const329 = 4 343: OpConstant: Float const343 = 5 356: OpConstant: Float const356 = 6 384: OpConstant: Float const384 = 0.2 385: OpConstantComposite: FloatVector2 const385 = {0.2, 0.2} 387: OpConstant: Float const387 = 2.0944 439: OpConstant: Float const439 = 0.05 507: OpConstant: Float const507 = 0.5 522: OpConstant: Float const522 = 0.15708 541: OpConstant: Float const541 = 0.408248 542: OpConstant: Float const542 = 0.816497 543: OpConstantComposite: FloatVector3 const543 = {0.408248, 0.408248, 0.816497} 549: OpConstant: Int const549 = 0 556: OpConstant: Int const556 = 100 564: OpConstant: Float const564 = 0.005 579: OpConstant: Float const579 = 0.8 597: OpConstant: Float const597 = 10000 607: OpConstant: Float const607 = 30 612: OpConstant: Float const612 = 0.71 620: OpConstant: Int const620 = 1 622: OpConstant: Float const622 = 0.9 623: OpConstantComposite: FloatVector4 const623 = {1, 0.9, 0, 0} 642: OpConstant: UInt const642 = 4 Disassembled Code: 4: OpFunction: Void main() 629: OpVariable: FloatVector4*: param629: storage class: Function 630: OpVariable: FloatVector2*: param630: storage class: Function 5: lb5: 631: OpLoad: FloatVector4: tmp631 << gl_FragCoord 632: OpVectorShuffle: FloatVector2: tmp632 << tmp631, tmp631, 0, 1 OpStore: : tmp632 >> param630 633: OpFunctionCall: Void: mainImage(vf4;vf2;(param629, param630) 634: OpLoad: FloatVector4: tmp634 << param629 OpStore: : tmp634 >> finalColor OpReturn: 12: OpFunction: FloatMatrix2x2 rot(f1;(Float* a) 13: lb13: 44: OpLoad: Float: tmp44 << a 45: OpExtInst(Cos): Float: tmp45 << tmp44 47: OpLoad: Float: tmp47 << a 48: OpExtInst(Sin): Float: tmp48 << tmp47 52: OpFNegate: Float: tmp52 << tmp48 56: OpCompositeConstruct: FloatVector2: tmp56 << tmp45, tmp48 57: OpCompositeConstruct: FloatVector2: tmp57 << tmp52, tmp45 58: OpCompositeConstruct: FloatMatrix2x2: tmp58 << tmp56, tmp57 OpReturnValue: : << tmp58 19: OpFunction: Float blade(vf3;f1;(FloatVector3* p, Float* a) 61: OpVariable: Float*: param61: storage class: Function 83: OpVariable: Float*: param83: storage class: Function 20: lb20: 62: OpLoad: Float: tmp62 << a OpStore: : tmp62 >> param61 63: OpFunctionCall: FloatMatrix2x2: rot(f1;(param61) 64: OpLoad: FloatVector3: tmp64 << p 65: OpVectorShuffle: FloatVector2: tmp65 << tmp64, tmp64, 0, 1 66: OpVectorTimesMatrix: FloatVector2: tmp66 << tmp65, rot(f1; 67: OpLoad: FloatVector3: tmp67 << p 68: OpVectorShuffle: FloatVector3: tmp68 << tmp67, tmp66, 3, 4, 2 OpStore: : tmp68 >> p 73: OpAccessChain: Float*: p[1] 74: OpLoad: Float: tmp74 << p[1] 75: OpFMul: Float: tmp75 << const70, tmp74 76: OpAccessChain: Float*: p[1] 77: OpLoad: Float: tmp77 << p[1] 78: OpFMul: Float: tmp78 << tmp75, tmp77 79: OpFAdd: Float: tmp79 << const69, tmp78 81: OpExtInst(FClamp): Float: tmp81 << tmp79, const69, const80 82: OpFNegate: Float: tmp82 << tmp81 OpStore: : tmp82 >> param83 84: OpFunctionCall: FloatMatrix2x2: rot(f1;(param83) 85: OpLoad: FloatVector3: tmp85 << p 86: OpVectorShuffle: FloatVector2: tmp86 << tmp85, tmp85, 0, 2 87: OpVectorTimesMatrix: FloatVector2: tmp87 << tmp86, rot(f1; 88: OpLoad: FloatVector3: tmp88 << p 89: OpVectorShuffle: FloatVector3: tmp89 << tmp88, tmp87, 3, 1, 4 OpStore: : tmp89 >> p 91: OpAccessChain: Float*: p[1] 92: OpLoad: Float: tmp92 << p[1] 94: OpFSub: Float: tmp94 << tmp92, const93 96: OpAccessChain: Float*: p[1] 97: OpLoad: Float: tmp97 << p[1] 98: OpFSub: Float: tmp98 << tmp97, const54 103: OpFMul: Float: tmp103 << const101, tmp94 105: OpFMul: Float: tmp105 << tmp103, tmp94 106: OpFAdd: Float: tmp106 << const100, tmp105 108: OpExtInst(FClamp): Float: tmp108 << tmp106, const107, const54 113: OpFMul: Float: tmp113 << const111, tmp98 115: OpFMul: Float: tmp115 << tmp113, tmp98 116: OpFAdd: Float: tmp116 << const110, tmp115 118: OpExtInst(FClamp): Float: tmp118 << tmp116, const54, const117 119: OpLoad: FloatVector3: tmp119 << p 121: OpAccessChain: Float*: p[0] 122: OpLoad: Float: tmp122 << p[0] 125: OpFMul: Float: tmp125 << const123, tmp108 127: OpExtInst(FClamp): Float: tmp127 << tmp122, tmp125, tmp118 128: OpAccessChain: Float*: p[1] 129: OpLoad: Float: tmp129 << p[1] 132: OpAccessChain: Float*: p[0] 133: OpLoad: Float: tmp133 << p[0] 134: OpFMul: Float: tmp134 << const131, tmp133 135: OpAccessChain: Float*: p[0] 136: OpLoad: Float: tmp136 << p[0] 137: OpFMul: Float: tmp137 << tmp134, tmp136 138: OpFSub: Float: tmp138 << const93, tmp137 139: OpExtInst(FClamp): Float: tmp139 << tmp129, const130, tmp138 140: OpCompositeConstruct: FloatVector3: tmp140 << tmp127, tmp139, const55 141: OpFSub: FloatVector3: tmp141 << tmp119, tmp140 142: OpExtInst(Length): Float: tmp142 << tmp141 143: OpFSub: Float: tmp143 << tmp142, const131 OpReturnValue: : << tmp143 23: OpFunction: Float centre(vf3;(FloatVector3* p) 24: lb24: 150: OpLoad: FloatVector3: tmp150 << p 151: OpVectorShuffle: FloatVector2: tmp151 << tmp150, tmp150, 0, 1 153: OpCompositeConstruct: FloatVector2: tmp153 << const117, const117 154: OpFDiv: FloatVector2: tmp154 << tmp151, tmp153 155: OpExtInst(Length): Float: tmp155 << tmp154 157: OpAccessChain: Float*: p[2] 158: OpLoad: Float: tmp158 << p[2] 160: OpFDiv: Float: tmp160 << tmp158, const148 161: OpCompositeConstruct: FloatVector2: tmp161 << tmp155, tmp160 162: OpExtInst(FAbs): FloatVector2: tmp162 << tmp161 163: OpCompositeConstruct: FloatVector2: tmp163 << const54, const54 164: OpFSub: FloatVector2: tmp164 << tmp162, tmp163 165: OpAccessChain: Float*: d[0] 166: OpCompositeExtract: Float: tmp166 << tmp164, 0 167: OpAccessChain: Float*: d[1] 168: OpCompositeExtract: Float: tmp168 << tmp164, 1 169: OpExtInst(FMax): Float: tmp169 << tmp166, tmp168 170: OpExtInst(FMin): Float: tmp170 << tmp169, const55 172: OpCompositeConstruct: FloatVector2: tmp172 << const55, const55 173: OpExtInst(FMax): FloatVector2: tmp173 << tmp164, tmp172 174: OpExtInst(Length): Float: tmp174 << tmp173 175: OpFAdd: Float: tmp175 << tmp170, tmp174 OpReturnValue: : << tmp175 26: OpFunction: Float concav(vf3;(FloatVector3* p) 27: lb27: 182: OpLoad: FloatVector3: tmp182 << p 183: OpVectorShuffle: FloatVector2: tmp183 << tmp182, tmp182, 0, 1 185: OpCompositeConstruct: FloatVector2: tmp185 << const179, const179 186: OpFDiv: FloatVector2: tmp186 << tmp183, tmp185 187: OpExtInst(Length): Float: tmp187 << tmp186 188: OpAccessChain: Float*: p[2] 189: OpLoad: Float: tmp189 << p[2] 191: OpFDiv: Float: tmp191 << tmp189, const148 192: OpCompositeConstruct: FloatVector2: tmp192 << tmp187, tmp191 193: OpExtInst(FAbs): FloatVector2: tmp193 << tmp192 194: OpCompositeConstruct: FloatVector2: tmp194 << const54, const54 195: OpFSub: FloatVector2: tmp195 << tmp193, tmp194 196: OpAccessChain: Float*: d[0] 197: OpCompositeExtract: Float: tmp197 << tmp195, 0 198: OpAccessChain: Float*: d[1] 199: OpCompositeExtract: Float: tmp199 << tmp195, 1 200: OpExtInst(FMax): Float: tmp200 << tmp197, tmp199 201: OpExtInst(FMin): Float: tmp201 << tmp200, const55 203: OpCompositeConstruct: FloatVector2: tmp203 << const55, const55 204: OpExtInst(FMax): FloatVector2: tmp204 << tmp195, tmp203 205: OpExtInst(Length): Float: tmp205 << tmp204 206: OpFAdd: Float: tmp206 << tmp201, tmp205 OpReturnValue: : << tmp206 29: OpFunction: Float sceneSDF(vf3;(FloatVector3* p) 216: OpVariable: Float*: param216: storage class: Function 227: OpVariable: Float*: param227: storage class: Function 238: OpVariable: Float*: param238: storage class: Function 269: OpVariable: Float*: d: storage class: Function 279: OpVariable: FloatVector3*: param279: storage class: Function 280: OpVariable: Float*: param280: storage class: Function 291: OpVariable: FloatVector3*: param291: storage class: Function 292: OpVariable: Float*: param292: storage class: Function 304: OpVariable: FloatVector3*: param304: storage class: Function 305: OpVariable: Float*: param305: storage class: Function 316: OpVariable: FloatVector3*: param316: storage class: Function 317: OpVariable: Float*: param317: storage class: Function 332: OpVariable: FloatVector3*: param332: storage class: Function 333: OpVariable: Float*: param333: storage class: Function 346: OpVariable: FloatVector3*: param346: storage class: Function 347: OpVariable: Float*: param347: storage class: Function 359: OpVariable: FloatVector3*: param359: storage class: Function 360: OpVariable: Float*: param360: storage class: Function 370: OpVariable: FloatVector3*: param370: storage class: Function 379: OpVariable: FloatVector3*: param379: storage class: Function 388: OpVariable: Float*: param388: storage class: Function 393: OpVariable: Float*: param393: storage class: Function 30: lb30: 210: OpAccessChain: Float*: p[2] 211: OpLoad: Float: tmp211 << p[2] 212: OpFAdd: Float: tmp212 << tmp211, const209 213: OpAccessChain: Float*: p[2] OpStore: : tmp212 >> p[2] 217: OpLoad: Float: tmp217 << iTime OpStore: : tmp217 >> param216 218: OpFunctionCall: FloatMatrix2x2: rot(f1;(param216) 219: OpLoad: FloatVector3: tmp219 << p 220: OpVectorShuffle: FloatVector2: tmp220 << tmp219, tmp219, 0, 2 221: OpVectorTimesMatrix: FloatVector2: tmp221 << tmp220, rot(f1; 222: OpLoad: FloatVector3: tmp222 << p 223: OpVectorShuffle: FloatVector3: tmp223 << tmp222, tmp221, 3, 1, 4 OpStore: : tmp223 >> p 225: OpLoad: Float: tmp225 << iTime 226: OpFMul: Float: tmp226 << const224, tmp225 OpStore: : tmp226 >> param227 228: OpFunctionCall: FloatMatrix2x2: rot(f1;(param227) 229: OpLoad: FloatVector3: tmp229 << p 230: OpVectorShuffle: FloatVector2: tmp230 << tmp229, tmp229, 0, 1 231: OpVectorTimesMatrix: FloatVector2: tmp231 << tmp230, rot(f1; 232: OpLoad: FloatVector3: tmp232 << p 233: OpVectorShuffle: FloatVector3: tmp233 << tmp232, tmp231, 3, 4, 2 OpStore: : tmp233 >> p OpStore: : const235 >> param238 240: OpFunctionCall: FloatMatrix2x2: rot(f1;(param238) 247: OpMatrixTimesVector: FloatVector2: tmp247 << rot(f1;, const243 251: OpMatrixTimesVector: FloatVector2: tmp251 << rot(f1;, tmp247 255: OpMatrixTimesVector: FloatVector2: tmp255 << rot(f1;, tmp251 259: OpMatrixTimesVector: FloatVector2: tmp259 << rot(f1;, tmp255 263: OpMatrixTimesVector: FloatVector2: tmp263 << rot(f1;, tmp259 267: OpMatrixTimesVector: FloatVector2: tmp267 << rot(f1;, tmp263 270: OpLoad: FloatVector3: tmp270 << p 273: OpCompositeExtract: Float: tmp273 << const243, 0 274: OpCompositeExtract: Float: tmp274 << const243, 1 275: OpCompositeConstruct: FloatVector3: tmp275 << tmp273, tmp274, const55 276: OpFAdd: FloatVector3: tmp276 << tmp270, tmp275 278: OpFMul: Float: tmp278 << const55, const235 OpStore: : tmp276 >> param279 OpStore: : tmp278 >> param280 281: OpFunctionCall: Float: blade(vf3;f1;(param279, param280) 282: OpLoad: FloatVector3: tmp282 << p 285: OpCompositeExtract: Float: tmp285 << tmp247, 0 286: OpCompositeExtract: Float: tmp286 << tmp247, 1 287: OpCompositeConstruct: FloatVector3: tmp287 << tmp285, tmp286, const55 288: OpFAdd: FloatVector3: tmp288 << tmp282, tmp287 290: OpFMul: Float: tmp290 << const54, const235 OpStore: : tmp288 >> param291 OpStore: : tmp290 >> param292 293: OpFunctionCall: Float: blade(vf3;f1;(param291, param292) 294: OpExtInst(FMin): Float: tmp294 << blade(vf3;f1;, blade(vf3;f1; 295: OpLoad: FloatVector3: tmp295 << p 298: OpCompositeExtract: Float: tmp298 << tmp251, 0 299: OpCompositeExtract: Float: tmp299 << tmp251, 1 300: OpCompositeConstruct: FloatVector3: tmp300 << tmp298, tmp299, const55 301: OpFAdd: FloatVector3: tmp301 << tmp295, tmp300 303: OpFMul: Float: tmp303 << const110, const235 OpStore: : tmp301 >> param304 OpStore: : tmp303 >> param305 306: OpFunctionCall: Float: blade(vf3;f1;(param304, param305) 307: OpLoad: FloatVector3: tmp307 << p 310: OpCompositeExtract: Float: tmp310 << tmp255, 0 311: OpCompositeExtract: Float: tmp311 << tmp255, 1 312: OpCompositeConstruct: FloatVector3: tmp312 << tmp310, tmp311, const55 313: OpFAdd: FloatVector3: tmp313 << tmp307, tmp312 315: OpFMul: Float: tmp315 << const93, const235 OpStore: : tmp313 >> param316 OpStore: : tmp315 >> param317 318: OpFunctionCall: Float: blade(vf3;f1;(param316, param317) 319: OpExtInst(FMin): Float: tmp319 << blade(vf3;f1;, blade(vf3;f1; 320: OpExtInst(FMin): Float: tmp320 << tmp294, tmp319 OpStore: : tmp320 >> d 321: OpLoad: Float: tmp321 << d 322: OpLoad: FloatVector3: tmp322 << p 325: OpCompositeExtract: Float: tmp325 << tmp259, 0 326: OpCompositeExtract: Float: tmp326 << tmp259, 1 327: OpCompositeConstruct: FloatVector3: tmp327 << tmp325, tmp326, const55 328: OpFAdd: FloatVector3: tmp328 << tmp322, tmp327 331: OpFMul: Float: tmp331 << const329, const235 OpStore: : tmp328 >> param332 OpStore: : tmp331 >> param333 334: OpFunctionCall: Float: blade(vf3;f1;(param332, param333) 335: OpExtInst(FMin): Float: tmp335 << tmp321, blade(vf3;f1; 336: OpLoad: FloatVector3: tmp336 << p 339: OpCompositeExtract: Float: tmp339 << tmp263, 0 340: OpCompositeExtract: Float: tmp340 << tmp263, 1 341: OpCompositeConstruct: FloatVector3: tmp341 << tmp339, tmp340, const55 342: OpFAdd: FloatVector3: tmp342 << tmp336, tmp341 345: OpFMul: Float: tmp345 << const343, const235 OpStore: : tmp342 >> param346 OpStore: : tmp345 >> param347 348: OpFunctionCall: Float: blade(vf3;f1;(param346, param347) 349: OpLoad: FloatVector3: tmp349 << p 352: OpCompositeExtract: Float: tmp352 << tmp267, 0 353: OpCompositeExtract: Float: tmp353 << tmp267, 1 354: OpCompositeConstruct: FloatVector3: tmp354 << tmp352, tmp353, const55 355: OpFAdd: FloatVector3: tmp355 << tmp349, tmp354 358: OpFMul: Float: tmp358 << const356, const235 OpStore: : tmp355 >> param359 OpStore: : tmp358 >> param360 361: OpFunctionCall: Float: blade(vf3;f1;(param359, param360) 362: OpExtInst(FMin): Float: tmp362 << blade(vf3;f1;, blade(vf3;f1; 363: OpExtInst(FMin): Float: tmp363 << tmp335, tmp362 OpStore: : tmp363 >> d 364: OpLoad: Float: tmp364 << d 365: OpLoad: FloatVector3: tmp365 << p 367: OpFAdd: Float: tmp367 << const148, const55 368: OpCompositeConstruct: FloatVector3: tmp368 << const55, const55, tmp367 369: OpFAdd: FloatVector3: tmp369 << tmp365, tmp368 OpStore: : tmp369 >> param370 371: OpFunctionCall: Float: centre(vf3;(param370) 372: OpExtInst(FMin): Float: tmp372 << tmp364, centre(vf3; OpStore: : tmp372 >> d 373: OpLoad: Float: tmp373 << d 374: OpLoad: FloatVector3: tmp374 << p 376: OpFAdd: Float: tmp376 << const54, const55 377: OpCompositeConstruct: FloatVector3: tmp377 << const55, const55, tmp376 378: OpFAdd: FloatVector3: tmp378 << tmp374, tmp377 OpStore: : tmp378 >> param379 380: OpFunctionCall: Float: concav(vf3;(param379) 381: OpFNegate: Float: tmp381 << concav(vf3; 382: OpExtInst(FMax): Float: tmp382 << tmp373, tmp381 OpStore: : tmp382 >> d OpStore: : const387 >> param388 389: OpFunctionCall: FloatMatrix2x2: rot(f1;(param388) 391: OpMatrixTimesVector: FloatVector2: tmp391 << rot(f1;, const385 OpStore: : const387 >> param393 394: OpFunctionCall: FloatMatrix2x2: rot(f1;(param393) 396: OpMatrixTimesVector: FloatVector2: tmp396 << rot(f1;, tmp391 398: OpLoad: FloatVector3: tmp398 << p 401: OpFAdd: Float: tmp401 << const55, const55 402: OpCompositeExtract: Float: tmp402 << const385, 0 403: OpCompositeExtract: Float: tmp403 << const385, 1 404: OpCompositeConstruct: FloatVector3: tmp404 << tmp402, tmp403, tmp401 405: OpFAdd: FloatVector3: tmp405 << tmp398, tmp404 406: OpExtInst(Length): Float: tmp406 << tmp405 407: OpFSub: Float: tmp407 << tmp406, const384 408: OpLoad: FloatVector3: tmp408 << p 411: OpFAdd: Float: tmp411 << const55, const55 412: OpCompositeExtract: Float: tmp412 << tmp391, 0 413: OpCompositeExtract: Float: tmp413 << tmp391, 1 414: OpCompositeConstruct: FloatVector3: tmp414 << tmp412, tmp413, tmp411 415: OpFAdd: FloatVector3: tmp415 << tmp408, tmp414 416: OpExtInst(Length): Float: tmp416 << tmp415 417: OpFSub: Float: tmp417 << tmp416, const384 418: OpExtInst(FMin): Float: tmp418 << tmp407, tmp417 419: OpLoad: FloatVector3: tmp419 << p 422: OpFAdd: Float: tmp422 << const55, const55 423: OpCompositeExtract: Float: tmp423 << tmp396, 0 424: OpCompositeExtract: Float: tmp424 << tmp396, 1 425: OpCompositeConstruct: FloatVector3: tmp425 << tmp423, tmp424, tmp422 426: OpFAdd: FloatVector3: tmp426 << tmp419, tmp425 427: OpExtInst(Length): Float: tmp427 << tmp426 428: OpFSub: Float: tmp428 << tmp427, const384 429: OpExtInst(FMin): Float: tmp429 << tmp418, tmp428 430: OpLoad: Float: tmp430 << d 432: OpFNegate: Float: tmp432 << tmp429 433: OpExtInst(FMax): Float: tmp433 << tmp430, tmp432 OpStore: : tmp433 >> d 434: OpLoad: Float: tmp434 << d OpReturnValue: : << tmp434 33: OpFunction: FloatVector3 estimateNormal(vf3;(FloatVector3* p) 446: OpVariable: FloatVector3*: param446: storage class: Function 456: OpVariable: FloatVector3*: param456: storage class: Function 467: OpVariable: FloatVector3*: param467: storage class: Function 477: OpVariable: FloatVector3*: param477: storage class: Function 488: OpVariable: FloatVector3*: param488: storage class: Function 498: OpVariable: FloatVector3*: param498: storage class: Function 34: lb34: 437: OpAccessChain: Float*: p[0] 438: OpLoad: Float: tmp438 << p[0] 440: OpFAdd: Float: tmp440 << tmp438, const439 441: OpAccessChain: Float*: p[1] 442: OpLoad: Float: tmp442 << p[1] 443: OpAccessChain: Float*: p[2] 444: OpLoad: Float: tmp444 << p[2] 445: OpCompositeConstruct: FloatVector3: tmp445 << tmp440, tmp442, tmp444 OpStore: : tmp445 >> param446 447: OpFunctionCall: Float: sceneSDF(vf3;(param446) 448: OpAccessChain: Float*: p[0] 449: OpLoad: Float: tmp449 << p[0] 450: OpFSub: Float: tmp450 << tmp449, const439 451: OpAccessChain: Float*: p[1] 452: OpLoad: Float: tmp452 << p[1] 453: OpAccessChain: Float*: p[2] 454: OpLoad: Float: tmp454 << p[2] 455: OpCompositeConstruct: FloatVector3: tmp455 << tmp450, tmp452, tmp454 OpStore: : tmp455 >> param456 457: OpFunctionCall: Float: sceneSDF(vf3;(param456) 458: OpFSub: Float: tmp458 << sceneSDF(vf3;, sceneSDF(vf3; 459: OpAccessChain: Float*: p[0] 460: OpLoad: Float: tmp460 << p[0] 461: OpAccessChain: Float*: p[1] 462: OpLoad: Float: tmp462 << p[1] 463: OpFAdd: Float: tmp463 << tmp462, const439 464: OpAccessChain: Float*: p[2] 465: OpLoad: Float: tmp465 << p[2] 466: OpCompositeConstruct: FloatVector3: tmp466 << tmp460, tmp463, tmp465 OpStore: : tmp466 >> param467 468: OpFunctionCall: Float: sceneSDF(vf3;(param467) 469: OpAccessChain: Float*: p[0] 470: OpLoad: Float: tmp470 << p[0] 471: OpAccessChain: Float*: p[1] 472: OpLoad: Float: tmp472 << p[1] 473: OpFSub: Float: tmp473 << tmp472, const439 474: OpAccessChain: Float*: p[2] 475: OpLoad: Float: tmp475 << p[2] 476: OpCompositeConstruct: FloatVector3: tmp476 << tmp470, tmp473, tmp475 OpStore: : tmp476 >> param477 478: OpFunctionCall: Float: sceneSDF(vf3;(param477) 479: OpFSub: Float: tmp479 << sceneSDF(vf3;, sceneSDF(vf3; 480: OpAccessChain: Float*: p[0] 481: OpLoad: Float: tmp481 << p[0] 482: OpAccessChain: Float*: p[1] 483: OpLoad: Float: tmp483 << p[1] 484: OpAccessChain: Float*: p[2] 485: OpLoad: Float: tmp485 << p[2] 486: OpFAdd: Float: tmp486 << tmp485, const439 487: OpCompositeConstruct: FloatVector3: tmp487 << tmp481, tmp483, tmp486 OpStore: : tmp487 >> param488 489: OpFunctionCall: Float: sceneSDF(vf3;(param488) 490: OpAccessChain: Float*: p[0] 491: OpLoad: Float: tmp491 << p[0] 492: OpAccessChain: Float*: p[1] 493: OpLoad: Float: tmp493 << p[1] 494: OpAccessChain: Float*: p[2] 495: OpLoad: Float: tmp495 << p[2] 496: OpFSub: Float: tmp496 << tmp495, const439 497: OpCompositeConstruct: FloatVector3: tmp497 << tmp491, tmp493, tmp496 OpStore: : tmp497 >> param498 499: OpFunctionCall: Float: sceneSDF(vf3;(param498) 500: OpFSub: Float: tmp500 << sceneSDF(vf3;, sceneSDF(vf3; 501: OpCompositeConstruct: FloatVector3: tmp501 << tmp458, tmp479, tmp500 502: OpExtInst(Normalize): FloatVector3: tmp502 << tmp501 OpReturnValue: : << tmp502 41: OpFunction: Void mainImage(vf4;vf2;(FloatVector4* fragColor, FloatVector2* fragCoord) 505: OpVariable: FloatVector2*: uv: storage class: Function 530: OpVariable: FloatVector3*: ray: storage class: Function 544: OpVariable: Float*: shade: storage class: Function 548: OpVariable: Int*: i: storage class: Function Decorators: RelaxedPrecision 560: OpVariable: FloatVector3*: param560: storage class: Function 569: OpVariable: FloatVector3*: param569: storage class: Function 42: lb42: 506: OpLoad: FloatVector2: tmp506 << fragCoord 510: OpLoad: FloatVector3: tmp510 << iResolution 511: OpVectorShuffle: FloatVector2: tmp511 << tmp510, tmp510, 0, 1 512: OpVectorTimesScalar: FloatVector2: tmp512 << tmp511, const507 513: OpFSub: FloatVector2: tmp513 << tmp506, tmp512 OpStore: : tmp513 >> uv 514: OpAccessChain: Float*: iResolution[1] 515: OpLoad: Float: tmp515 << iResolution[1] 516: OpFDiv: Float: tmp516 << const110, tmp515 517: OpLoad: FloatVector2: tmp517 << uv 518: OpVectorTimesScalar: FloatVector2: tmp518 << tmp517, tmp516 OpStore: : tmp518 >> uv 519: OpLoad: FloatVector2: tmp519 << uv 520: OpVectorTimesScalar: FloatVector2: tmp520 << tmp519, const329 OpStore: : tmp520 >> uv 525: OpExtInst(Tan): Float: tmp525 << const522 526: OpFDiv: Float: tmp526 << const54, tmp525 527: OpFAdd: Float: tmp527 << const54, tmp526 528: OpFMul: Float: tmp528 << const54, tmp527 529: OpCompositeConstruct: FloatVector3: tmp529 << const55, const55, tmp528 OpStore: : tmp529 >> ray 533: OpLoad: FloatVector2: tmp533 << uv 534: OpCompositeExtract: Float: tmp534 << tmp533, 0 535: OpCompositeExtract: Float: tmp535 << tmp533, 1 536: OpCompositeConstruct: FloatVector3: tmp536 << tmp534, tmp535, const55 538: OpFSub: FloatVector3: tmp538 << tmp536, tmp529 539: OpExtInst(Normalize): FloatVector3: tmp539 << tmp538 OpStore: : const55 >> shade OpStore: : const549 >> i OpBranch: to lb550 550: lb550: OpLoopMerge: (merge: lb552, continue: lb553) OpBranch: to lb554 554: lb554: 555: OpLoad: Int: tmp555 << i Decorators: RelaxedPrecision 558: OpSLessThan: Bool: tmp558 << tmp555, const556 OpBranchConditional: if(tmp558) then branch to lb551, else branch to lb552 551: lb551: 561: OpLoad: FloatVector3: tmp561 << ray OpStore: : tmp561 >> param560 562: OpFunctionCall: Float: sceneSDF(vf3;(param560) 565: OpFOrdLessThan: Bool: tmp565 << sceneSDF(vf3;, const564 OpSelectionMerge: (merge: lb567) OpBranchConditional: if(tmp565) then branch to lb566, else branch to lb604 566: lb566: 570: OpLoad: FloatVector3: tmp570 << ray OpStore: : tmp570 >> param569 571: OpFunctionCall: FloatVector3: estimateNormal(vf3;(param569) 575: OpDot: Float: tmp575 << const543, estimateNormal(vf3; 578: OpFSub: Float: tmp578 << tmp575, const54 581: OpFMul: Float: tmp581 << const579, tmp575 582: OpLoad: Float: tmp582 << shade 583: OpFAdd: Float: tmp583 << tmp582, tmp581 OpStore: : tmp583 >> shade 585: OpFNegate: Float: tmp585 << tmp575 587: OpFMul: Float: tmp587 << tmp585, tmp575 588: OpFMul: Float: tmp588 << tmp587, const209 589: OpExtInst(Exp): Float: tmp589 << tmp588 590: OpExtInst(FClamp): Float: tmp590 << tmp589, const55, const54 591: OpLoad: Float: tmp591 << shade 592: OpFAdd: Float: tmp592 << tmp591, tmp590 OpStore: : tmp592 >> shade 594: OpFNegate: Float: tmp594 << tmp578 596: OpFMul: Float: tmp596 << tmp594, tmp578 598: OpFMul: Float: tmp598 << tmp596, const597 599: OpExtInst(Exp): Float: tmp599 << tmp598 600: OpExtInst(FClamp): Float: tmp600 << tmp599, const55, const54 601: OpLoad: Float: tmp601 << shade 602: OpFAdd: Float: tmp602 << tmp601, tmp600 OpStore: : tmp602 >> shade OpBranch: to lb552 604: lb604: 605: OpLoad: FloatVector3: tmp605 << ray 606: OpExtInst(Length): Float: tmp606 << tmp605 608: OpFOrdGreaterThan: Bool: tmp608 << tmp606, const607 OpSelectionMerge: (merge: lb610) OpBranchConditional: if(tmp608) then branch to lb609, else branch to lb610 609: lb609: OpBranch: to lb552 610: lb610: OpBranch: to lb567 567: lb567: 614: OpVectorTimesScalar: FloatVector3: tmp614 << tmp539, const612 616: OpVectorTimesScalar: FloatVector3: tmp616 << tmp614, sceneSDF(vf3; 617: OpLoad: FloatVector3: tmp617 << ray 618: OpFAdd: FloatVector3: tmp618 << tmp617, tmp616 OpStore: : tmp618 >> ray OpBranch: to lb553 553: lb553: 619: OpLoad: Int: tmp619 << i Decorators: RelaxedPrecision 621: OpIAdd: Int: tmp621 << tmp619, const620 Decorators: RelaxedPrecision OpStore: : tmp621 >> i OpBranch: to lb550 552: lb552: 624: OpLoad: Float: tmp624 << shade 625: OpVectorTimesScalar: FloatVector4: tmp625 << const623, tmp624 OpStore: : tmp625 >> fragColor OpReturn: Generating the compiled code... Intermediate disassembly (pre optimization): Program Type: Fragment Special Input Variables: offset: unset, size: 16, FloatVector4 gl_FragCoord BuiltIn(FragCoord) Textures: offset: 0, size: 4, Float iChannel0 offset: 1, size: 4, Float iChannel1 offset: 2, size: 4, Float iChannel2 offset: 3, size: 4, Float iChannel3 Output Variables: offset: 0, size: 16, FloatVector4 finalColor Uniform Constants: offset: 0, size: 4, Float iTime offset: 4, size: 12, FloatVector3 iResolution offset: 16, size: 16, FloatVector4 iMouse offset: 32, size: 16, FloatVector4 iDate offset: 48, size: 4, Float iFrame offset: 52, size: 48, FloatVector3 iChannelResolution[4] Constants: Float const54: 1 Float const55: 0 Float const69: 0.3 Float const70: 0.03 UInt32 const72: 1 Float const80: 0.6 Float const93: 3 Float const100: 0.4 Float const101: -0.04 Float const107: -1.5 Float const110: 2 Float const111: 0.02 Float const117: 2.5 UInt32 const120: 0 Float const123: -2 Float const130: -3 Float const131: 0.1 Float const148: 0.7 UInt32 const156: 2 Float const179: 2.3 Float const209: 10 Float const224: 2.6 Float const235: 0.897598 Float const242: -3.5 FloatVector2 const243: {0, -3.5} Float const329: 4 Float const343: 5 Float const356: 6 Float const384: 0.2 FloatVector2 const385: {0.2, 0.2} Float const387: 2.0944 Float const439: 0.05 Float const507: 0.5 Float const522: 0.15708 Float const541: 0.408248 Float const542: 0.816497 FloatVector3 const543: {0.408248, 0.408248, 0.816497} Int32 const549: 0 Int32 const556: 100 Float const564: 0.005 Float const579: 0.8 Float const597: 10000 Float const607: 30 Float const612: 0.71 Int32 const620: 1 Float const622: 0.9 FloatVector4 const623: {1, 0.9, 0, 0} UInt32 const642: 4 Function Local Variables: offset: unset, size: 16, FloatVector4 main.param629 offset: unset, size: 8, FloatVector2 main.param630 offset: unset, size: 16, FloatVector4 main.fragColor offset: unset, size: 8, FloatVector2 main.fragCoord offset: unset, size: 4, Float main.a offset: unset, size: 12, FloatVector3 rot(f1;.p offset: unset, size: 4, Float rot(f1;.a offset: unset, size: 4, Float blade(vf3;f1;.param61 offset: unset, size: 4, Float blade(vf3;f1;.param83 offset: unset, size: 12, FloatVector3 blade(vf3;f1;.p offset: unset, size: 12, FloatVector3 centre(vf3;.p offset: unset, size: 12, FloatVector3 concav(vf3;.p offset: unset, size: 4, Float sceneSDF(vf3;.param216 offset: unset, size: 4, Float sceneSDF(vf3;.param227 offset: unset, size: 4, Float sceneSDF(vf3;.param238 offset: unset, size: 4, Float sceneSDF(vf3;.d offset: unset, size: 12, FloatVector3 sceneSDF(vf3;.param279 offset: unset, size: 4, Float sceneSDF(vf3;.param280 offset: unset, size: 12, FloatVector3 sceneSDF(vf3;.param291 offset: unset, size: 4, Float sceneSDF(vf3;.param292 offset: unset, size: 12, FloatVector3 sceneSDF(vf3;.param304 offset: unset, size: 4, Float sceneSDF(vf3;.param305 offset: unset, size: 12, FloatVector3 sceneSDF(vf3;.param316 offset: unset, size: 4, Float sceneSDF(vf3;.param317 offset: unset, size: 12, FloatVector3 sceneSDF(vf3;.param332 offset: unset, size: 4, Float sceneSDF(vf3;.param333 offset: unset, size: 12, FloatVector3 sceneSDF(vf3;.param346 offset: unset, size: 4, Float sceneSDF(vf3;.param347 offset: unset, size: 12, FloatVector3 sceneSDF(vf3;.param359 offset: unset, size: 4, Float sceneSDF(vf3;.param360 offset: unset, size: 12, FloatVector3 sceneSDF(vf3;.param370 offset: unset, size: 12, FloatVector3 sceneSDF(vf3;.param379 offset: unset, size: 4, Float sceneSDF(vf3;.param388 offset: unset, size: 4, Float sceneSDF(vf3;.param393 offset: unset, size: 12, FloatVector3 sceneSDF(vf3;.p offset: unset, size: 12, FloatVector3 estimateNormal(vf3;.param446 offset: unset, size: 12, FloatVector3 estimateNormal(vf3;.param456 offset: unset, size: 12, FloatVector3 estimateNormal(vf3;.param467 offset: unset, size: 12, FloatVector3 estimateNormal(vf3;.param477 offset: unset, size: 12, FloatVector3 estimateNormal(vf3;.param488 offset: unset, size: 12, FloatVector3 estimateNormal(vf3;.param498 offset: unset, size: 8, FloatVector2 mainImage(vf4;vf2;.uv offset: unset, size: 12, FloatVector3 mainImage(vf4;vf2;.ray offset: unset, size: 4, Float mainImage(vf4;vf2;.shade offset: unset, size: 4, Int32 mainImage(vf4;vf2;.i offset: unset, size: 12, FloatVector3 mainImage(vf4;vf2;.param560 offset: unset, size: 12, FloatVector3 mainImage(vf4;vf2;.param569 Instructions: V_SUB_F32 vDst(VGPR14) src0(SGPR2) src1(VGPR14) // VOP2 # Void main() Function: Void main() # lb5 Label: lb5 # 631: OpLoad: FloatVector4: tmp631 << gl_FragCoord V_MOV_B32 vDst(VGPR24) src0(VGPR13) V_MOV_B32 vDst(VGPR25) src0(VGPR14) V_MOV_B32 vDst(VGPR26) src0(VGPR15) V_MOV_B32 vDst(VGPR27) src0(VGPR16) # 632: OpVectorShuffle: FloatVector2: tmp632 << tmp631, tmp631, 0, 1 V_MOV_B32 vDst(VGPR28) src0(VGPR24) V_MOV_B32 vDst(VGPR29) src0(VGPR25) # OpStore: : tmp632 >> param630 V_MOV_B32 vDst(VGPR22) src0(VGPR28) V_MOV_B32 vDst(VGPR23) src0(VGPR29) # 633: OpFunctionCall: Void: mainImage(vf4;vf2;(param629, param630) S_ADD_U32 sDst(SGPR12) src0(LITERAL_CONST) src1(0) const: 0x12 # VGPR[18:21] S_ADD_U32 sDst(SGPR13) src0(LITERAL_CONST) src1(0) const: 0x16 # VGPR[22:23] S_MOV_B64 sDst(SGPR14) src0(EXEC) # Indirect branch to mainImage(vf4;vf2;: ??? S_GETPC_B64 sDst(SGPR10) src0(SGPR10) S_ADD_U32 sDst(SGPR10) src0(SGPR10) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR11) src0(SGPR11) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR10) src0(SGPR10) S_MOV_B64 sDst(EXEC) src0(SGPR14) # .lbl0 # 634: OpLoad: FloatVector4: tmp634 << param629 # OpStore: : tmp634 >> finalColor V_MOV_B32 vDst(VGPR30) src0(VGPR18) V_MOV_B32 vDst(VGPR31) src0(VGPR19) V_MOV_B32 vDst(VGPR32) src0(VGPR20) V_MOV_B32 vDst(VGPR33) src0(VGPR21) # OpReturn: S_ENDPGM 0 # FloatMatrix2x2 rot(f1;(Float* a) Function: FloatMatrix2x2 rot(f1;() S_MOV_B64 sDst(SGPR20) src0(EXEC) # lb13 Label: lb13 # 44: OpLoad: Float: tmp44 << a S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR19) const: 0x0 V_MOVRELS_B32 vDst(VGPR34) src0(VGPR0) # 45: OpExtInst(Cos): Float: tmp45 << tmp44 V_MUL_F32 vDst(VGPR35) src0(LITERAL_CONST) src1(VGPR34) // VOP2 const: 0x3e22f983 V_FRACT_F32 vDst(VGPR35) src0(VGPR35) V_COS_F32 vDst(VGPR35) src0(VGPR35) # 47: OpLoad: Float: tmp47 << a S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR19) const: 0x0 V_MOVRELS_B32 vDst(VGPR36) src0(VGPR0) # 48: OpExtInst(Sin): Float: tmp48 << tmp47 V_MUL_F32 vDst(VGPR37) src0(LITERAL_CONST) src1(VGPR36) // VOP2 const: 0x3e22f983 V_FRACT_F32 vDst(VGPR37) src0(VGPR37) V_SIN_F32 vDst(VGPR37) src0(VGPR37) # 52: OpFNegate: Float: tmp52 << tmp48 V_MUL_F32 vDst(VGPR38) src0(M1_0_F) src1(VGPR37) // VOP2 # 56: OpCompositeConstruct: FloatVector2: tmp56 << tmp45, tmp48 V_MOV_B32 vDst(VGPR39) src0(VGPR35) V_MOV_B32 vDst(VGPR40) src0(VGPR37) # 57: OpCompositeConstruct: FloatVector2: tmp57 << tmp52, tmp45 V_MOV_B32 vDst(VGPR41) src0(VGPR38) V_MOV_B32 vDst(VGPR42) src0(VGPR35) # 58: OpCompositeConstruct: FloatMatrix2x2: tmp58 << tmp56, tmp57 V_MOV_B32 vDst(VGPR43) src0(VGPR39) V_MOV_B32 vDst(VGPR44) src0(VGPR40) V_MOV_B32 vDst(VGPR45) src0(VGPR41) V_MOV_B32 vDst(VGPR46) src0(VGPR42) # OpReturnValue: : << tmp58 S_MOV_B32 sDst(M0) src0(SGPR18) V_MOVRELD_B32 vDst(VGPR0) src0(VGPR43) V_MOVRELD_B32 vDst(VGPR1) src0(VGPR44) V_MOVRELD_B32 vDst(VGPR2) src0(VGPR45) V_MOVRELD_B32 vDst(VGPR3) src0(VGPR46) S_SETPC_B64 sDst(SGPR16) src0(SGPR16) # Float blade(vf3;f1;(FloatVector3* p, Float* a) Function: Float blade(vf3;f1;(, Float rot(f1;.a) S_MOV_B64 sDst(SGPR28) src0(EXEC) # lb20 Label: lb20 # 62: OpLoad: Float: tmp62 << a S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR26) const: 0x0 V_MOVRELS_B32 vDst(VGPR49) src0(VGPR0) # OpStore: : tmp62 >> param61 V_MOV_B32 vDst(VGPR47) src0(VGPR49) # 63: OpFunctionCall: FloatMatrix2x2: rot(f1;(param61) S_ADD_U32 sDst(SGPR19) src0(LITERAL_CONST) src1(0) const: 0x2f # VGPR47 S_MOV_B64 sDst(SGPR30) src0(EXEC) S_MOV_B32 sDst(SGPR18) src0(LITERAL_CONST) const: 0x32 # VGPR[50:53] # Indirect branch to rot(f1;: ??? S_GETPC_B64 sDst(SGPR16) src0(SGPR16) S_ADD_U32 sDst(SGPR16) src0(SGPR16) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR17) src0(SGPR17) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR16) src0(SGPR16) S_MOV_B64 sDst(EXEC) src0(SGPR30) # .lbl1 # 64: OpLoad: FloatVector3: tmp64 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR25) const: 0x0 V_MOVRELS_B32 vDst(VGPR54) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR55) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR56) src0(VGPR2) # 65: OpVectorShuffle: FloatVector2: tmp65 << tmp64, tmp64, 0, 1 V_MOV_B32 vDst(VGPR57) src0(VGPR54) V_MOV_B32 vDst(VGPR58) src0(VGPR55) # 66: OpVectorTimesMatrix: FloatVector2: tmp66 << tmp65, rot(f1; V_MUL_F32 vDst(VGPR59) src0(VGPR57) src1(VGPR50) // VOP2 V_MUL_F32 vDst(VGPR60) src0(VGPR57) src1(VGPR52) // VOP2 V_MAC_F32 vDst(VGPR59) src0(VGPR58) src1(VGPR51) // VOP2 V_MAC_F32 vDst(VGPR60) src0(VGPR58) src1(VGPR53) // VOP2 # 67: OpLoad: FloatVector3: tmp67 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR25) const: 0x0 V_MOVRELS_B32 vDst(VGPR61) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR62) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR63) src0(VGPR2) # 68: OpVectorShuffle: FloatVector3: tmp68 << tmp67, tmp66, 3, 4, 2 V_MOV_B32 vDst(VGPR64) src0(VGPR59) V_MOV_B32 vDst(VGPR65) src0(VGPR60) V_MOV_B32 vDst(VGPR66) src0(VGPR63) # OpStore: : tmp68 >> p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR25) const: 0x0 V_MOVRELD_B32 vDst(VGPR0) src0(VGPR64) V_MOVRELD_B32 vDst(VGPR1) src0(VGPR65) V_MOVRELD_B32 vDst(VGPR2) src0(VGPR66) # 73: OpAccessChain: Float*: p[1] # 74: OpLoad: Float: tmp74 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR25) const: 0x0 V_MOVRELS_B32 vDst(VGPR67) src0(VGPR1) # 75: OpFMul: Float: tmp75 << const70, tmp74 V_MOV_B32 vDst(VGPR68) src0(LITERAL_CONST) const: 0x3cf5c28f V_MUL_F32 vDst(VGPR69) src0(VGPR68) src1(VGPR67) // VOP2 # 76: OpAccessChain: Float*: p[1] # 77: OpLoad: Float: tmp77 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR25) const: 0x0 V_MOVRELS_B32 vDst(VGPR70) src0(VGPR1) # 78: OpFMul: Float: tmp78 << tmp75, tmp77 V_MUL_F32 vDst(VGPR71) src0(VGPR69) src1(VGPR70) // VOP2 # 79: OpFAdd: Float: tmp79 << const69, tmp78 V_MOV_B32 vDst(VGPR72) src0(LITERAL_CONST) const: 0x3e99999a V_ADD_F32 vDst(VGPR73) src0(VGPR72) src1(VGPR71) // VOP2 # 81: OpExtInst(FClamp): Float: tmp81 << tmp79, const69, const80 V_MOV_B32 vDst(VGPR74) src0(LITERAL_CONST) const: 0x3e99999a V_MOV_B32 vDst(VGPR75) src0(LITERAL_CONST) const: 0x3f19999a V_MAX_F32 vDst(VGPR76) src0(VGPR73) src1(VGPR74) // VOP2 V_MIN_F32 vDst(VGPR76) src0(VGPR76) src1(VGPR75) // VOP2 # 82: OpFNegate: Float: tmp82 << tmp81 V_MUL_F32 vDst(VGPR77) src0(M1_0_F) src1(VGPR76) // VOP2 # OpStore: : tmp82 >> param83 V_MOV_B32 vDst(VGPR48) src0(VGPR77) # 84: OpFunctionCall: FloatMatrix2x2: rot(f1;(param83) S_ADD_U32 sDst(SGPR19) src0(LITERAL_CONST) src1(0) const: 0x30 # VGPR48 S_MOV_B64 sDst(SGPR32) src0(EXEC) S_MOV_B32 sDst(SGPR18) src0(LITERAL_CONST) const: 0x4e # VGPR[78:81] # Indirect branch to rot(f1;: ??? S_GETPC_B64 sDst(SGPR16) src0(SGPR16) S_ADD_U32 sDst(SGPR16) src0(SGPR16) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR17) src0(SGPR17) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR16) src0(SGPR16) S_MOV_B64 sDst(EXEC) src0(SGPR32) # .lbl2 # 85: OpLoad: FloatVector3: tmp85 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR25) const: 0x0 V_MOVRELS_B32 vDst(VGPR82) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR83) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR84) src0(VGPR2) # 86: OpVectorShuffle: FloatVector2: tmp86 << tmp85, tmp85, 0, 2 V_MOV_B32 vDst(VGPR85) src0(VGPR82) V_MOV_B32 vDst(VGPR86) src0(VGPR84) # 87: OpVectorTimesMatrix: FloatVector2: tmp87 << tmp86, rot(f1; V_MUL_F32 vDst(VGPR87) src0(VGPR85) src1(VGPR78) // VOP2 V_MUL_F32 vDst(VGPR88) src0(VGPR85) src1(VGPR80) // VOP2 V_MAC_F32 vDst(VGPR87) src0(VGPR86) src1(VGPR79) // VOP2 V_MAC_F32 vDst(VGPR88) src0(VGPR86) src1(VGPR81) // VOP2 # 88: OpLoad: FloatVector3: tmp88 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR25) const: 0x0 V_MOVRELS_B32 vDst(VGPR89) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR90) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR91) src0(VGPR2) # 89: OpVectorShuffle: FloatVector3: tmp89 << tmp88, tmp87, 3, 1, 4 V_MOV_B32 vDst(VGPR92) src0(VGPR87) V_MOV_B32 vDst(VGPR93) src0(VGPR90) V_MOV_B32 vDst(VGPR94) src0(VGPR88) # OpStore: : tmp89 >> p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR25) const: 0x0 V_MOVRELD_B32 vDst(VGPR0) src0(VGPR92) V_MOVRELD_B32 vDst(VGPR1) src0(VGPR93) V_MOVRELD_B32 vDst(VGPR2) src0(VGPR94) # 91: OpAccessChain: Float*: p[1] # 92: OpLoad: Float: tmp92 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR25) const: 0x0 V_MOVRELS_B32 vDst(VGPR95) src0(VGPR1) # 94: OpFSub: Float: tmp94 << tmp92, const93 V_MOV_B32 vDst(VGPR96) src0(LITERAL_CONST) const: 0x40400000 V_SUB_F32 vDst(VGPR97) src0(VGPR95) src1(VGPR96) // VOP2 # 96: OpAccessChain: Float*: p[1] # 97: OpLoad: Float: tmp97 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR25) const: 0x0 V_MOVRELS_B32 vDst(VGPR98) src0(VGPR1) # 98: OpFSub: Float: tmp98 << tmp97, const54 V_MOV_B32 vDst(VGPR99) src0(1_0_F) V_SUB_F32 vDst(VGPR100) src0(VGPR98) src1(VGPR99) // VOP2 # 103: OpFMul: Float: tmp103 << const101, tmp94 V_MOV_B32 vDst(VGPR101) src0(LITERAL_CONST) const: 0xbd23d70a V_MUL_F32 vDst(VGPR102) src0(VGPR101) src1(VGPR97) // VOP2 # 105: OpFMul: Float: tmp105 << tmp103, tmp94 V_MUL_F32 vDst(VGPR103) src0(VGPR102) src1(VGPR97) // VOP2 # 106: OpFAdd: Float: tmp106 << const100, tmp105 V_MOV_B32 vDst(VGPR104) src0(LITERAL_CONST) const: 0x3ecccccd V_ADD_F32 vDst(VGPR105) src0(VGPR104) src1(VGPR103) // VOP2 # 108: OpExtInst(FClamp): Float: tmp108 << tmp106, const107, const54 V_MOV_B32 vDst(VGPR106) src0(LITERAL_CONST) const: 0xbfc00000 V_MOV_B32 vDst(VGPR107) src0(1_0_F) V_MAX_F32 vDst(VGPR108) src0(VGPR105) src1(VGPR106) // VOP2 V_MIN_F32 vDst(VGPR108) src0(VGPR108) src1(VGPR107) // VOP2 # 113: OpFMul: Float: tmp113 << const111, tmp98 V_MOV_B32 vDst(VGPR109) src0(LITERAL_CONST) const: 0x3ca3d70a V_MUL_F32 vDst(VGPR110) src0(VGPR109) src1(VGPR100) // VOP2 # 115: OpFMul: Float: tmp115 << tmp113, tmp98 V_MUL_F32 vDst(VGPR111) src0(VGPR110) src1(VGPR100) // VOP2 # 116: OpFAdd: Float: tmp116 << const110, tmp115 V_ADD_F32 vDst(VGPR112) src0(2_0_F) src1(VGPR111) // VOP2 # 118: OpExtInst(FClamp): Float: tmp118 << tmp116, const54, const117 V_MOV_B32 vDst(VGPR113) src0(1_0_F) V_MOV_B32 vDst(VGPR114) src0(LITERAL_CONST) const: 0x40200000 V_MAX_F32 vDst(VGPR115) src0(VGPR112) src1(VGPR113) // VOP2 V_MIN_F32 vDst(VGPR115) src0(VGPR115) src1(VGPR114) // VOP2 # 119: OpLoad: FloatVector3: tmp119 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR25) const: 0x0 V_MOVRELS_B32 vDst(VGPR116) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR117) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR118) src0(VGPR2) # 121: OpAccessChain: Float*: p[0] # 122: OpLoad: Float: tmp122 << p[0] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR25) const: 0x0 V_MOVRELS_B32 vDst(VGPR119) src0(VGPR0) # 125: OpFMul: Float: tmp125 << const123, tmp108 V_MUL_F32 vDst(VGPR120) src0(M2_0_F) src1(VGPR108) // VOP2 # 127: OpExtInst(FClamp): Float: tmp127 << tmp122, tmp125, tmp118 V_MAX_F32 vDst(VGPR121) src0(VGPR119) src1(VGPR120) // VOP2 V_MIN_F32 vDst(VGPR121) src0(VGPR121) src1(VGPR115) // VOP2 # 128: OpAccessChain: Float*: p[1] # 129: OpLoad: Float: tmp129 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR25) const: 0x0 V_MOVRELS_B32 vDst(VGPR122) src0(VGPR1) # 132: OpAccessChain: Float*: p[0] # 133: OpLoad: Float: tmp133 << p[0] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR25) const: 0x0 V_MOVRELS_B32 vDst(VGPR123) src0(VGPR0) # 134: OpFMul: Float: tmp134 << const131, tmp133 V_MOV_B32 vDst(VGPR124) src0(LITERAL_CONST) const: 0x3dcccccd V_MUL_F32 vDst(VGPR125) src0(VGPR124) src1(VGPR123) // VOP2 # 135: OpAccessChain: Float*: p[0] # 136: OpLoad: Float: tmp136 << p[0] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR25) const: 0x0 V_MOVRELS_B32 vDst(VGPR126) src0(VGPR0) # 137: OpFMul: Float: tmp137 << tmp134, tmp136 V_MUL_F32 vDst(VGPR127) src0(VGPR125) src1(VGPR126) // VOP2 # 138: OpFSub: Float: tmp138 << const93, tmp137 V_MOV_B32 vDst(VGPR128) src0(LITERAL_CONST) const: 0x40400000 V_SUB_F32 vDst(VGPR129) src0(VGPR128) src1(VGPR127) // VOP2 # 139: OpExtInst(FClamp): Float: tmp139 << tmp129, const130, tmp138 V_MOV_B32 vDst(VGPR130) src0(LITERAL_CONST) const: 0xc0400000 V_MAX_F32 vDst(VGPR131) src0(VGPR122) src1(VGPR130) // VOP2 V_MIN_F32 vDst(VGPR131) src0(VGPR131) src1(VGPR129) // VOP2 # 140: OpCompositeConstruct: FloatVector3: tmp140 << tmp127, tmp139, const55 V_MOV_B32 vDst(VGPR132) src0(VGPR121) V_MOV_B32 vDst(VGPR133) src0(VGPR131) V_MOV_B32 vDst(VGPR135) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR134) src0(VGPR135) # 141: OpFSub: FloatVector3: tmp141 << tmp119, tmp140 V_SUB_F32 vDst(VGPR136) src0(VGPR116) src1(VGPR132) // VOP2 V_SUB_F32 vDst(VGPR137) src0(VGPR117) src1(VGPR133) // VOP2 V_SUB_F32 vDst(VGPR138) src0(VGPR118) src1(VGPR134) // VOP2 # 142: OpExtInst(Length): Float: tmp142 << tmp141 V_MUL_F32 vDst(VGPR139) src0(VGPR136) src1(VGPR136) // VOP2 V_MAC_F32 vDst(VGPR139) src0(VGPR137) src1(VGPR137) // VOP2 V_MAC_F32 vDst(VGPR139) src0(VGPR138) src1(VGPR138) // VOP2 V_SQRT_F32 vDst(VGPR139) src0(VGPR139) # 143: OpFSub: Float: tmp143 << tmp142, const131 V_MOV_B32 vDst(VGPR140) src0(LITERAL_CONST) const: 0x3dcccccd V_SUB_F32 vDst(VGPR141) src0(VGPR139) src1(VGPR140) // VOP2 # OpReturnValue: : << tmp143 S_MOV_B32 sDst(M0) src0(SGPR24) V_MOVRELD_B32 vDst(VGPR0) src0(VGPR141) S_SETPC_B64 sDst(SGPR22) src0(SGPR22) # Float centre(vf3;(FloatVector3* p) Function: Float centre(vf3;() S_MOV_B64 sDst(SGPR38) src0(EXEC) # lb24 Label: lb24 # 150: OpLoad: FloatVector3: tmp150 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR37) const: 0x0 V_MOVRELS_B32 vDst(VGPR142) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR143) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR144) src0(VGPR2) # 151: OpVectorShuffle: FloatVector2: tmp151 << tmp150, tmp150, 0, 1 V_MOV_B32 vDst(VGPR145) src0(VGPR142) V_MOV_B32 vDst(VGPR146) src0(VGPR143) # 153: OpCompositeConstruct: FloatVector2: tmp153 << const117, const117 V_MOV_B32 vDst(VGPR149) src0(LITERAL_CONST) const: 0x40200000 V_MOV_B32 vDst(VGPR147) src0(VGPR149) V_MOV_B32 vDst(VGPR150) src0(LITERAL_CONST) const: 0x40200000 V_MOV_B32 vDst(VGPR148) src0(VGPR150) # 154: OpFDiv: FloatVector2: tmp154 << tmp151, tmp153 V_RCP_F32 vDst(VGPR151) src0(VGPR147) V_RCP_F32 vDst(VGPR152) src0(VGPR148) V_MUL_F32 vDst(VGPR151) src0(VGPR145) src1(VGPR151) // VOP2 V_MUL_F32 vDst(VGPR152) src0(VGPR146) src1(VGPR152) // VOP2 V_DIV_FIXUP_F32 vDst(VGPR151) src0(VGPR151) src1(VGPR147) src2(VGPR145) abs(0) clamp(0) omod(0) neg(0) // VOP3a V_DIV_FIXUP_F32 vDst(VGPR152) src0(VGPR152) src1(VGPR148) src2(VGPR146) abs(0) clamp(0) omod(0) neg(0) // VOP3a # 155: OpExtInst(Length): Float: tmp155 << tmp154 V_MUL_F32 vDst(VGPR153) src0(VGPR151) src1(VGPR151) // VOP2 V_MAC_F32 vDst(VGPR153) src0(VGPR152) src1(VGPR152) // VOP2 V_SQRT_F32 vDst(VGPR153) src0(VGPR153) # 157: OpAccessChain: Float*: p[2] # 158: OpLoad: Float: tmp158 << p[2] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR37) const: 0x0 V_MOVRELS_B32 vDst(VGPR154) src0(VGPR2) # 160: OpFDiv: Float: tmp160 << tmp158, const148 V_MOV_B32 vDst(VGPR155) src0(LITERAL_CONST) const: 0x3f333333 V_RCP_F32 vDst(VGPR156) src0(VGPR155) V_MUL_F32 vDst(VGPR156) src0(VGPR154) src1(VGPR156) // VOP2 V_DIV_FIXUP_F32 vDst(VGPR156) src0(VGPR156) src1(VGPR155) src2(VGPR154) abs(0) clamp(0) omod(0) neg(0) // VOP3a # 161: OpCompositeConstruct: FloatVector2: tmp161 << tmp155, tmp160 V_MOV_B32 vDst(VGPR157) src0(VGPR153) V_MOV_B32 vDst(VGPR158) src0(VGPR156) # 162: OpExtInst(FAbs): FloatVector2: tmp162 << tmp161 V_ADD_F32 vDst(VGPR159) src0(VGPR157) src1(0) src2(N/A) abs(1) clamp(0) omod(0) neg(0) // VOP3a V_ADD_F32 vDst(VGPR160) src0(VGPR158) src1(0) src2(N/A) abs(1) clamp(0) omod(0) neg(0) // VOP3a # 163: OpCompositeConstruct: FloatVector2: tmp163 << const54, const54 V_MOV_B32 vDst(VGPR161) src0(1_0_F) V_MOV_B32 vDst(VGPR162) src0(1_0_F) # 164: OpFSub: FloatVector2: tmp164 << tmp162, tmp163 V_SUB_F32 vDst(VGPR163) src0(VGPR159) src1(VGPR161) // VOP2 V_SUB_F32 vDst(VGPR164) src0(VGPR160) src1(VGPR162) // VOP2 # 165: OpAccessChain: Float*: d[0] # 166: OpCompositeExtract: Float: tmp166 << tmp164, 0 V_MOV_B32 vDst(VGPR165) src0(VGPR163) # 167: OpAccessChain: Float*: d[1] # 168: OpCompositeExtract: Float: tmp168 << tmp164, 1 V_MOV_B32 vDst(VGPR166) src0(VGPR164) # 169: OpExtInst(FMax): Float: tmp169 << tmp166, tmp168 V_MAX_F32 vDst(VGPR167) src0(VGPR165) src1(VGPR166) // VOP2 # 170: OpExtInst(FMin): Float: tmp170 << tmp169, const55 V_MOV_B32 vDst(VGPR168) src0(LITERAL_CONST) const: 0x00000000 V_MIN_F32 vDst(VGPR169) src0(VGPR167) src1(VGPR168) // VOP2 # 172: OpCompositeConstruct: FloatVector2: tmp172 << const55, const55 V_MOV_B32 vDst(VGPR172) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR170) src0(VGPR172) V_MOV_B32 vDst(VGPR173) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR171) src0(VGPR173) # 173: OpExtInst(FMax): FloatVector2: tmp173 << tmp164, tmp172 V_MAX_F32 vDst(VGPR174) src0(VGPR163) src1(VGPR170) // VOP2 V_MAX_F32 vDst(VGPR175) src0(VGPR164) src1(VGPR171) // VOP2 # 174: OpExtInst(Length): Float: tmp174 << tmp173 V_MUL_F32 vDst(VGPR176) src0(VGPR174) src1(VGPR174) // VOP2 V_MAC_F32 vDst(VGPR176) src0(VGPR175) src1(VGPR175) // VOP2 V_SQRT_F32 vDst(VGPR176) src0(VGPR176) # 175: OpFAdd: Float: tmp175 << tmp170, tmp174 V_ADD_F32 vDst(VGPR177) src0(VGPR169) src1(VGPR176) // VOP2 # OpReturnValue: : << tmp175 S_MOV_B32 sDst(M0) src0(SGPR36) V_MOVRELD_B32 vDst(VGPR0) src0(VGPR177) S_SETPC_B64 sDst(SGPR34) src0(SGPR34) # Float concav(vf3;(FloatVector3* p) Function: Float concav(vf3;() S_MOV_B64 sDst(SGPR44) src0(EXEC) # lb27 Label: lb27 # 182: OpLoad: FloatVector3: tmp182 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR43) const: 0x0 V_MOVRELS_B32 vDst(VGPR178) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR179) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR180) src0(VGPR2) # 183: OpVectorShuffle: FloatVector2: tmp183 << tmp182, tmp182, 0, 1 V_MOV_B32 vDst(VGPR181) src0(VGPR178) V_MOV_B32 vDst(VGPR182) src0(VGPR179) # 185: OpCompositeConstruct: FloatVector2: tmp185 << const179, const179 V_MOV_B32 vDst(VGPR185) src0(LITERAL_CONST) const: 0x40133333 V_MOV_B32 vDst(VGPR183) src0(VGPR185) V_MOV_B32 vDst(VGPR186) src0(LITERAL_CONST) const: 0x40133333 V_MOV_B32 vDst(VGPR184) src0(VGPR186) # 186: OpFDiv: FloatVector2: tmp186 << tmp183, tmp185 V_RCP_F32 vDst(VGPR187) src0(VGPR183) V_RCP_F32 vDst(VGPR188) src0(VGPR184) V_MUL_F32 vDst(VGPR187) src0(VGPR181) src1(VGPR187) // VOP2 V_MUL_F32 vDst(VGPR188) src0(VGPR182) src1(VGPR188) // VOP2 V_DIV_FIXUP_F32 vDst(VGPR187) src0(VGPR187) src1(VGPR183) src2(VGPR181) abs(0) clamp(0) omod(0) neg(0) // VOP3a V_DIV_FIXUP_F32 vDst(VGPR188) src0(VGPR188) src1(VGPR184) src2(VGPR182) abs(0) clamp(0) omod(0) neg(0) // VOP3a # 187: OpExtInst(Length): Float: tmp187 << tmp186 V_MUL_F32 vDst(VGPR189) src0(VGPR187) src1(VGPR187) // VOP2 V_MAC_F32 vDst(VGPR189) src0(VGPR188) src1(VGPR188) // VOP2 V_SQRT_F32 vDst(VGPR189) src0(VGPR189) # 188: OpAccessChain: Float*: p[2] # 189: OpLoad: Float: tmp189 << p[2] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR43) const: 0x0 V_MOVRELS_B32 vDst(VGPR190) src0(VGPR2) # 191: OpFDiv: Float: tmp191 << tmp189, const148 V_MOV_B32 vDst(VGPR191) src0(LITERAL_CONST) const: 0x3f333333 V_RCP_F32 vDst(VGPR192) src0(VGPR191) V_MUL_F32 vDst(VGPR192) src0(VGPR190) src1(VGPR192) // VOP2 V_DIV_FIXUP_F32 vDst(VGPR192) src0(VGPR192) src1(VGPR191) src2(VGPR190) abs(0) clamp(0) omod(0) neg(0) // VOP3a # 192: OpCompositeConstruct: FloatVector2: tmp192 << tmp187, tmp191 V_MOV_B32 vDst(VGPR193) src0(VGPR189) V_MOV_B32 vDst(VGPR194) src0(VGPR192) # 193: OpExtInst(FAbs): FloatVector2: tmp193 << tmp192 V_ADD_F32 vDst(VGPR195) src0(VGPR193) src1(0) src2(N/A) abs(1) clamp(0) omod(0) neg(0) // VOP3a V_ADD_F32 vDst(VGPR196) src0(VGPR194) src1(0) src2(N/A) abs(1) clamp(0) omod(0) neg(0) // VOP3a # 194: OpCompositeConstruct: FloatVector2: tmp194 << const54, const54 V_MOV_B32 vDst(VGPR197) src0(1_0_F) V_MOV_B32 vDst(VGPR198) src0(1_0_F) # 195: OpFSub: FloatVector2: tmp195 << tmp193, tmp194 V_SUB_F32 vDst(VGPR199) src0(VGPR195) src1(VGPR197) // VOP2 V_SUB_F32 vDst(VGPR200) src0(VGPR196) src1(VGPR198) // VOP2 # 196: OpAccessChain: Float*: d[0] # 197: OpCompositeExtract: Float: tmp197 << tmp195, 0 V_MOV_B32 vDst(VGPR201) src0(VGPR199) # 198: OpAccessChain: Float*: d[1] # 199: OpCompositeExtract: Float: tmp199 << tmp195, 1 V_MOV_B32 vDst(VGPR202) src0(VGPR200) # 200: OpExtInst(FMax): Float: tmp200 << tmp197, tmp199 V_MAX_F32 vDst(VGPR203) src0(VGPR201) src1(VGPR202) // VOP2 # 201: OpExtInst(FMin): Float: tmp201 << tmp200, const55 V_MOV_B32 vDst(VGPR204) src0(LITERAL_CONST) const: 0x00000000 V_MIN_F32 vDst(VGPR205) src0(VGPR203) src1(VGPR204) // VOP2 # 203: OpCompositeConstruct: FloatVector2: tmp203 << const55, const55 V_MOV_B32 vDst(VGPR208) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR206) src0(VGPR208) V_MOV_B32 vDst(VGPR209) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR207) src0(VGPR209) # 204: OpExtInst(FMax): FloatVector2: tmp204 << tmp195, tmp203 V_MAX_F32 vDst(VGPR210) src0(VGPR199) src1(VGPR206) // VOP2 V_MAX_F32 vDst(VGPR211) src0(VGPR200) src1(VGPR207) // VOP2 # 205: OpExtInst(Length): Float: tmp205 << tmp204 V_MUL_F32 vDst(VGPR212) src0(VGPR210) src1(VGPR210) // VOP2 V_MAC_F32 vDst(VGPR212) src0(VGPR211) src1(VGPR211) // VOP2 V_SQRT_F32 vDst(VGPR212) src0(VGPR212) # 206: OpFAdd: Float: tmp206 << tmp201, tmp205 V_ADD_F32 vDst(VGPR213) src0(VGPR205) src1(VGPR212) // VOP2 # OpReturnValue: : << tmp206 S_MOV_B32 sDst(M0) src0(SGPR42) V_MOVRELD_B32 vDst(VGPR0) src0(VGPR213) S_SETPC_B64 sDst(SGPR40) src0(SGPR40) # Float sceneSDF(vf3;(FloatVector3* p) Function: Float sceneSDF(vf3;() S_MOV_B64 sDst(SGPR50) src0(EXEC) # lb30 Label: lb30 # 210: OpAccessChain: Float*: p[2] # 211: OpLoad: Float: tmp211 << p[2] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR254) src0(VGPR2) # 212: OpFAdd: Float: tmp212 << tmp211, const209 V_MOV_B32 vDst(VGPR255) src0(LITERAL_CONST) const: 0x41200000 V_ADD_F32 vDst(VGPR256) src0(VGPR254) src1(VGPR255) // VOP2 # 213: OpAccessChain: Float*: p[2] # OpStore: : tmp212 >> p[2] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELD_B32 vDst(VGPR2) src0(VGPR256) # 217: OpLoad: Float: tmp217 << iTime S_LOAD_DWORD_IMM offset(0) sBase(SGPR[0:1]) sDst(SGPR52) S_WAITCNT 0 # OpStore: : tmp217 >> param216 V_MOV_B32 vDst(VGPR214) src0(SGPR52) # 218: OpFunctionCall: FloatMatrix2x2: rot(f1;(param216) S_ADD_U32 sDst(SGPR19) src0(LITERAL_CONST) src1(0) const: 0xd6 # VGPR214 S_MOV_B64 sDst(SGPR54) src0(EXEC) S_MOV_B32 sDst(SGPR18) src0(LITERAL_CONST) const: 0x101 # VGPR[257:260] # Indirect branch to rot(f1;: ??? S_GETPC_B64 sDst(SGPR16) src0(SGPR16) S_ADD_U32 sDst(SGPR16) src0(SGPR16) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR17) src0(SGPR17) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR16) src0(SGPR16) S_MOV_B64 sDst(EXEC) src0(SGPR54) # .lbl3 # 219: OpLoad: FloatVector3: tmp219 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR261) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR262) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR263) src0(VGPR2) # 220: OpVectorShuffle: FloatVector2: tmp220 << tmp219, tmp219, 0, 2 V_MOV_B32 vDst(VGPR264) src0(VGPR261) V_MOV_B32 vDst(VGPR265) src0(VGPR263) # 221: OpVectorTimesMatrix: FloatVector2: tmp221 << tmp220, rot(f1; V_MUL_F32 vDst(VGPR266) src0(VGPR264) src1(VGPR257) // VOP2 V_MUL_F32 vDst(VGPR267) src0(VGPR264) src1(VGPR259) // VOP2 V_MAC_F32 vDst(VGPR266) src0(VGPR265) src1(VGPR258) // VOP2 V_MAC_F32 vDst(VGPR267) src0(VGPR265) src1(VGPR260) // VOP2 # 222: OpLoad: FloatVector3: tmp222 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR268) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR269) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR270) src0(VGPR2) # 223: OpVectorShuffle: FloatVector3: tmp223 << tmp222, tmp221, 3, 1, 4 V_MOV_B32 vDst(VGPR271) src0(VGPR266) V_MOV_B32 vDst(VGPR272) src0(VGPR269) V_MOV_B32 vDst(VGPR273) src0(VGPR267) # OpStore: : tmp223 >> p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELD_B32 vDst(VGPR0) src0(VGPR271) V_MOVRELD_B32 vDst(VGPR1) src0(VGPR272) V_MOVRELD_B32 vDst(VGPR2) src0(VGPR273) # 225: OpLoad: Float: tmp225 << iTime S_LOAD_DWORD_IMM offset(0) sBase(SGPR[0:1]) sDst(SGPR56) S_WAITCNT 0 # 226: OpFMul: Float: tmp226 << const224, tmp225 V_MOV_B32 vDst(VGPR274) src0(LITERAL_CONST) const: 0x40266666 V_MOV_B32 vDst(VGPR275) src0(SGPR56) V_MUL_F32 vDst(VGPR276) src0(VGPR274) src1(VGPR275) // VOP2 # OpStore: : tmp226 >> param227 V_MOV_B32 vDst(VGPR215) src0(VGPR276) # 228: OpFunctionCall: FloatMatrix2x2: rot(f1;(param227) S_ADD_U32 sDst(SGPR19) src0(LITERAL_CONST) src1(0) const: 0xd7 # VGPR215 S_MOV_B64 sDst(SGPR58) src0(EXEC) S_MOV_B32 sDst(SGPR18) src0(LITERAL_CONST) const: 0x115 # VGPR[277:280] # Indirect branch to rot(f1;: ??? S_GETPC_B64 sDst(SGPR16) src0(SGPR16) S_ADD_U32 sDst(SGPR16) src0(SGPR16) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR17) src0(SGPR17) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR16) src0(SGPR16) S_MOV_B64 sDst(EXEC) src0(SGPR58) # .lbl4 # 229: OpLoad: FloatVector3: tmp229 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR281) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR282) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR283) src0(VGPR2) # 230: OpVectorShuffle: FloatVector2: tmp230 << tmp229, tmp229, 0, 1 V_MOV_B32 vDst(VGPR284) src0(VGPR281) V_MOV_B32 vDst(VGPR285) src0(VGPR282) # 231: OpVectorTimesMatrix: FloatVector2: tmp231 << tmp230, rot(f1; V_MUL_F32 vDst(VGPR286) src0(VGPR284) src1(VGPR277) // VOP2 V_MUL_F32 vDst(VGPR287) src0(VGPR284) src1(VGPR279) // VOP2 V_MAC_F32 vDst(VGPR286) src0(VGPR285) src1(VGPR278) // VOP2 V_MAC_F32 vDst(VGPR287) src0(VGPR285) src1(VGPR280) // VOP2 # 232: OpLoad: FloatVector3: tmp232 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR288) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR289) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR290) src0(VGPR2) # 233: OpVectorShuffle: FloatVector3: tmp233 << tmp232, tmp231, 3, 4, 2 V_MOV_B32 vDst(VGPR291) src0(VGPR286) V_MOV_B32 vDst(VGPR292) src0(VGPR287) V_MOV_B32 vDst(VGPR293) src0(VGPR290) # OpStore: : tmp233 >> p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELD_B32 vDst(VGPR0) src0(VGPR291) V_MOVRELD_B32 vDst(VGPR1) src0(VGPR292) V_MOVRELD_B32 vDst(VGPR2) src0(VGPR293) # OpStore: : const235 >> param238 V_MOV_B32 vDst(VGPR294) src0(LITERAL_CONST) const: 0x3f65c8fa V_MOV_B32 vDst(VGPR216) src0(VGPR294) # 240: OpFunctionCall: FloatMatrix2x2: rot(f1;(param238) S_ADD_U32 sDst(SGPR19) src0(LITERAL_CONST) src1(0) const: 0xd8 # VGPR216 S_MOV_B64 sDst(SGPR60) src0(EXEC) S_MOV_B32 sDst(SGPR18) src0(LITERAL_CONST) const: 0x127 # VGPR[295:298] # Indirect branch to rot(f1;: ??? S_GETPC_B64 sDst(SGPR16) src0(SGPR16) S_ADD_U32 sDst(SGPR16) src0(SGPR16) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR17) src0(SGPR17) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR16) src0(SGPR16) S_MOV_B64 sDst(EXEC) src0(SGPR60) # .lbl5 # 247: OpMatrixTimesVector: FloatVector2: tmp247 << rot(f1;, const243 V_MOV_B32 vDst(VGPR299) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR300) src0(LITERAL_CONST) const: 0xc0600000 V_MUL_F32 vDst(VGPR301) src0(VGPR295) src1(VGPR299) // VOP2 V_MUL_F32 vDst(VGPR302) src0(VGPR296) src1(VGPR299) // VOP2 V_MAC_F32 vDst(VGPR301) src0(VGPR297) src1(VGPR300) // VOP2 V_MAC_F32 vDst(VGPR302) src0(VGPR298) src1(VGPR300) // VOP2 # 251: OpMatrixTimesVector: FloatVector2: tmp251 << rot(f1;, tmp247 V_MUL_F32 vDst(VGPR303) src0(VGPR295) src1(VGPR301) // VOP2 V_MUL_F32 vDst(VGPR304) src0(VGPR296) src1(VGPR301) // VOP2 V_MAC_F32 vDst(VGPR303) src0(VGPR297) src1(VGPR302) // VOP2 V_MAC_F32 vDst(VGPR304) src0(VGPR298) src1(VGPR302) // VOP2 # 255: OpMatrixTimesVector: FloatVector2: tmp255 << rot(f1;, tmp251 V_MUL_F32 vDst(VGPR305) src0(VGPR295) src1(VGPR303) // VOP2 V_MUL_F32 vDst(VGPR306) src0(VGPR296) src1(VGPR303) // VOP2 V_MAC_F32 vDst(VGPR305) src0(VGPR297) src1(VGPR304) // VOP2 V_MAC_F32 vDst(VGPR306) src0(VGPR298) src1(VGPR304) // VOP2 # 259: OpMatrixTimesVector: FloatVector2: tmp259 << rot(f1;, tmp255 V_MUL_F32 vDst(VGPR307) src0(VGPR295) src1(VGPR305) // VOP2 V_MUL_F32 vDst(VGPR308) src0(VGPR296) src1(VGPR305) // VOP2 V_MAC_F32 vDst(VGPR307) src0(VGPR297) src1(VGPR306) // VOP2 V_MAC_F32 vDst(VGPR308) src0(VGPR298) src1(VGPR306) // VOP2 # 263: OpMatrixTimesVector: FloatVector2: tmp263 << rot(f1;, tmp259 V_MUL_F32 vDst(VGPR309) src0(VGPR295) src1(VGPR307) // VOP2 V_MUL_F32 vDst(VGPR310) src0(VGPR296) src1(VGPR307) // VOP2 V_MAC_F32 vDst(VGPR309) src0(VGPR297) src1(VGPR308) // VOP2 V_MAC_F32 vDst(VGPR310) src0(VGPR298) src1(VGPR308) // VOP2 # 267: OpMatrixTimesVector: FloatVector2: tmp267 << rot(f1;, tmp263 V_MUL_F32 vDst(VGPR311) src0(VGPR295) src1(VGPR309) // VOP2 V_MUL_F32 vDst(VGPR312) src0(VGPR296) src1(VGPR309) // VOP2 V_MAC_F32 vDst(VGPR311) src0(VGPR297) src1(VGPR310) // VOP2 V_MAC_F32 vDst(VGPR312) src0(VGPR298) src1(VGPR310) // VOP2 # 270: OpLoad: FloatVector3: tmp270 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR313) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR314) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR315) src0(VGPR2) # 273: OpCompositeExtract: Float: tmp273 << const243, 0 V_MOV_B32 vDst(VGPR317) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR316) src0(VGPR317) # 274: OpCompositeExtract: Float: tmp274 << const243, 1 V_MOV_B32 vDst(VGPR319) src0(LITERAL_CONST) const: 0xc0600000 V_MOV_B32 vDst(VGPR318) src0(VGPR320) # 275: OpCompositeConstruct: FloatVector3: tmp275 << tmp273, tmp274, const55 V_MOV_B32 vDst(VGPR320) src0(VGPR316) V_MOV_B32 vDst(VGPR321) src0(VGPR318) V_MOV_B32 vDst(VGPR323) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR322) src0(VGPR323) # 276: OpFAdd: FloatVector3: tmp276 << tmp270, tmp275 V_ADD_F32 vDst(VGPR324) src0(VGPR313) src1(VGPR320) // VOP2 V_ADD_F32 vDst(VGPR325) src0(VGPR314) src1(VGPR321) // VOP2 V_ADD_F32 vDst(VGPR326) src0(VGPR315) src1(VGPR322) // VOP2 # 278: OpFMul: Float: tmp278 << const55, const235 V_MOV_B32 vDst(VGPR327) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR328) src0(LITERAL_CONST) const: 0x3f65c8fa V_MUL_F32 vDst(VGPR329) src0(VGPR327) src1(VGPR328) // VOP2 # OpStore: : tmp276 >> param279 V_MOV_B32 vDst(VGPR218) src0(VGPR324) V_MOV_B32 vDst(VGPR219) src0(VGPR325) V_MOV_B32 vDst(VGPR220) src0(VGPR326) # OpStore: : tmp278 >> param280 V_MOV_B32 vDst(VGPR221) src0(VGPR329) # 281: OpFunctionCall: Float: blade(vf3;f1;(param279, param280) S_ADD_U32 sDst(SGPR25) src0(LITERAL_CONST) src1(0) const: 0xda # VGPR[218:220] S_ADD_U32 sDst(SGPR26) src0(LITERAL_CONST) src1(0) const: 0xdd # VGPR221 S_MOV_B64 sDst(SGPR62) src0(EXEC) S_MOV_B32 sDst(SGPR24) src0(LITERAL_CONST) const: 0x14a # VGPR330 # Indirect branch to blade(vf3;f1;: ??? S_GETPC_B64 sDst(SGPR22) src0(SGPR22) S_ADD_U32 sDst(SGPR22) src0(SGPR22) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR23) src0(SGPR23) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR22) src0(SGPR22) S_MOV_B64 sDst(EXEC) src0(SGPR62) # .lbl6 # 282: OpLoad: FloatVector3: tmp282 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR331) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR332) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR333) src0(VGPR2) # 285: OpCompositeExtract: Float: tmp285 << tmp247, 0 V_MOV_B32 vDst(VGPR334) src0(VGPR301) # 286: OpCompositeExtract: Float: tmp286 << tmp247, 1 V_MOV_B32 vDst(VGPR335) src0(VGPR302) # 287: OpCompositeConstruct: FloatVector3: tmp287 << tmp285, tmp286, const55 V_MOV_B32 vDst(VGPR336) src0(VGPR334) V_MOV_B32 vDst(VGPR337) src0(VGPR335) V_MOV_B32 vDst(VGPR339) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR338) src0(VGPR339) # 288: OpFAdd: FloatVector3: tmp288 << tmp282, tmp287 V_ADD_F32 vDst(VGPR340) src0(VGPR331) src1(VGPR336) // VOP2 V_ADD_F32 vDst(VGPR341) src0(VGPR332) src1(VGPR337) // VOP2 V_ADD_F32 vDst(VGPR342) src0(VGPR333) src1(VGPR338) // VOP2 # 290: OpFMul: Float: tmp290 << const54, const235 V_MOV_B32 vDst(VGPR343) src0(LITERAL_CONST) const: 0x3f65c8fa V_MUL_F32 vDst(VGPR344) src0(1_0_F) src1(VGPR343) // VOP2 # OpStore: : tmp288 >> param291 V_MOV_B32 vDst(VGPR222) src0(VGPR340) V_MOV_B32 vDst(VGPR223) src0(VGPR341) V_MOV_B32 vDst(VGPR224) src0(VGPR342) # OpStore: : tmp290 >> param292 V_MOV_B32 vDst(VGPR225) src0(VGPR344) # 293: OpFunctionCall: Float: blade(vf3;f1;(param291, param292) S_ADD_U32 sDst(SGPR25) src0(LITERAL_CONST) src1(0) const: 0xde # VGPR[222:224] S_ADD_U32 sDst(SGPR26) src0(LITERAL_CONST) src1(0) const: 0xe1 # VGPR225 S_MOV_B64 sDst(SGPR64) src0(EXEC) S_MOV_B32 sDst(SGPR24) src0(LITERAL_CONST) const: 0x159 # VGPR345 # Indirect branch to blade(vf3;f1;: ??? S_GETPC_B64 sDst(SGPR22) src0(SGPR22) S_ADD_U32 sDst(SGPR22) src0(SGPR22) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR23) src0(SGPR23) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR22) src0(SGPR22) S_MOV_B64 sDst(EXEC) src0(SGPR64) # .lbl7 # 294: OpExtInst(FMin): Float: tmp294 << blade(vf3;f1;, blade(vf3;f1; V_MIN_F32 vDst(VGPR346) src0(VGPR330) src1(VGPR345) // VOP2 # 295: OpLoad: FloatVector3: tmp295 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR347) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR348) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR349) src0(VGPR2) # 298: OpCompositeExtract: Float: tmp298 << tmp251, 0 V_MOV_B32 vDst(VGPR350) src0(VGPR303) # 299: OpCompositeExtract: Float: tmp299 << tmp251, 1 V_MOV_B32 vDst(VGPR351) src0(VGPR304) # 300: OpCompositeConstruct: FloatVector3: tmp300 << tmp298, tmp299, const55 V_MOV_B32 vDst(VGPR352) src0(VGPR350) V_MOV_B32 vDst(VGPR353) src0(VGPR351) V_MOV_B32 vDst(VGPR355) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR354) src0(VGPR355) # 301: OpFAdd: FloatVector3: tmp301 << tmp295, tmp300 V_ADD_F32 vDst(VGPR356) src0(VGPR347) src1(VGPR352) // VOP2 V_ADD_F32 vDst(VGPR357) src0(VGPR348) src1(VGPR353) // VOP2 V_ADD_F32 vDst(VGPR358) src0(VGPR349) src1(VGPR354) // VOP2 # 303: OpFMul: Float: tmp303 << const110, const235 V_MOV_B32 vDst(VGPR359) src0(LITERAL_CONST) const: 0x3f65c8fa V_MUL_F32 vDst(VGPR360) src0(2_0_F) src1(VGPR359) // VOP2 # OpStore: : tmp301 >> param304 V_MOV_B32 vDst(VGPR226) src0(VGPR356) V_MOV_B32 vDst(VGPR227) src0(VGPR357) V_MOV_B32 vDst(VGPR228) src0(VGPR358) # OpStore: : tmp303 >> param305 V_MOV_B32 vDst(VGPR229) src0(VGPR360) # 306: OpFunctionCall: Float: blade(vf3;f1;(param304, param305) S_ADD_U32 sDst(SGPR25) src0(LITERAL_CONST) src1(0) const: 0xe2 # VGPR[226:228] S_ADD_U32 sDst(SGPR26) src0(LITERAL_CONST) src1(0) const: 0xe5 # VGPR229 S_MOV_B64 sDst(SGPR66) src0(EXEC) S_MOV_B32 sDst(SGPR24) src0(LITERAL_CONST) const: 0x169 # VGPR361 # Indirect branch to blade(vf3;f1;: ??? S_GETPC_B64 sDst(SGPR22) src0(SGPR22) S_ADD_U32 sDst(SGPR22) src0(SGPR22) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR23) src0(SGPR23) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR22) src0(SGPR22) S_MOV_B64 sDst(EXEC) src0(SGPR66) # .lbl8 # 307: OpLoad: FloatVector3: tmp307 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR362) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR363) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR364) src0(VGPR2) # 310: OpCompositeExtract: Float: tmp310 << tmp255, 0 V_MOV_B32 vDst(VGPR365) src0(VGPR305) # 311: OpCompositeExtract: Float: tmp311 << tmp255, 1 V_MOV_B32 vDst(VGPR366) src0(VGPR306) # 312: OpCompositeConstruct: FloatVector3: tmp312 << tmp310, tmp311, const55 V_MOV_B32 vDst(VGPR367) src0(VGPR365) V_MOV_B32 vDst(VGPR368) src0(VGPR366) V_MOV_B32 vDst(VGPR370) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR369) src0(VGPR370) # 313: OpFAdd: FloatVector3: tmp313 << tmp307, tmp312 V_ADD_F32 vDst(VGPR371) src0(VGPR362) src1(VGPR367) // VOP2 V_ADD_F32 vDst(VGPR372) src0(VGPR363) src1(VGPR368) // VOP2 V_ADD_F32 vDst(VGPR373) src0(VGPR364) src1(VGPR369) // VOP2 # 315: OpFMul: Float: tmp315 << const93, const235 V_MOV_B32 vDst(VGPR374) src0(LITERAL_CONST) const: 0x40400000 V_MOV_B32 vDst(VGPR375) src0(LITERAL_CONST) const: 0x3f65c8fa V_MUL_F32 vDst(VGPR376) src0(VGPR374) src1(VGPR375) // VOP2 # OpStore: : tmp313 >> param316 V_MOV_B32 vDst(VGPR230) src0(VGPR371) V_MOV_B32 vDst(VGPR231) src0(VGPR372) V_MOV_B32 vDst(VGPR232) src0(VGPR373) # OpStore: : tmp315 >> param317 V_MOV_B32 vDst(VGPR233) src0(VGPR376) # 318: OpFunctionCall: Float: blade(vf3;f1;(param316, param317) S_ADD_U32 sDst(SGPR25) src0(LITERAL_CONST) src1(0) const: 0xe6 # VGPR[230:232] S_ADD_U32 sDst(SGPR26) src0(LITERAL_CONST) src1(0) const: 0xe9 # VGPR233 S_MOV_B64 sDst(SGPR68) src0(EXEC) S_MOV_B32 sDst(SGPR24) src0(LITERAL_CONST) const: 0x179 # VGPR377 # Indirect branch to blade(vf3;f1;: ??? S_GETPC_B64 sDst(SGPR22) src0(SGPR22) S_ADD_U32 sDst(SGPR22) src0(SGPR22) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR23) src0(SGPR23) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR22) src0(SGPR22) S_MOV_B64 sDst(EXEC) src0(SGPR68) # .lbl9 # 319: OpExtInst(FMin): Float: tmp319 << blade(vf3;f1;, blade(vf3;f1; V_MIN_F32 vDst(VGPR378) src0(VGPR361) src1(VGPR377) // VOP2 # 320: OpExtInst(FMin): Float: tmp320 << tmp294, tmp319 V_MIN_F32 vDst(VGPR379) src0(VGPR346) src1(VGPR378) // VOP2 # OpStore: : tmp320 >> d V_MOV_B32 vDst(VGPR217) src0(VGPR379) # 321: OpLoad: Float: tmp321 << d # 322: OpLoad: FloatVector3: tmp322 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR380) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR381) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR382) src0(VGPR2) # 325: OpCompositeExtract: Float: tmp325 << tmp259, 0 V_MOV_B32 vDst(VGPR383) src0(VGPR307) # 326: OpCompositeExtract: Float: tmp326 << tmp259, 1 V_MOV_B32 vDst(VGPR384) src0(VGPR308) # 327: OpCompositeConstruct: FloatVector3: tmp327 << tmp325, tmp326, const55 V_MOV_B32 vDst(VGPR385) src0(VGPR383) V_MOV_B32 vDst(VGPR386) src0(VGPR384) V_MOV_B32 vDst(VGPR388) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR387) src0(VGPR388) # 328: OpFAdd: FloatVector3: tmp328 << tmp322, tmp327 V_ADD_F32 vDst(VGPR389) src0(VGPR380) src1(VGPR385) // VOP2 V_ADD_F32 vDst(VGPR390) src0(VGPR381) src1(VGPR386) // VOP2 V_ADD_F32 vDst(VGPR391) src0(VGPR382) src1(VGPR387) // VOP2 # 331: OpFMul: Float: tmp331 << const329, const235 V_MOV_B32 vDst(VGPR392) src0(LITERAL_CONST) const: 0x3f65c8fa V_MUL_F32 vDst(VGPR393) src0(4_0_F) src1(VGPR392) // VOP2 # OpStore: : tmp328 >> param332 V_MOV_B32 vDst(VGPR234) src0(VGPR389) V_MOV_B32 vDst(VGPR235) src0(VGPR390) V_MOV_B32 vDst(VGPR236) src0(VGPR391) # OpStore: : tmp331 >> param333 V_MOV_B32 vDst(VGPR237) src0(VGPR393) # 334: OpFunctionCall: Float: blade(vf3;f1;(param332, param333) S_ADD_U32 sDst(SGPR25) src0(LITERAL_CONST) src1(0) const: 0xea # VGPR[234:236] S_ADD_U32 sDst(SGPR26) src0(LITERAL_CONST) src1(0) const: 0xed # VGPR237 S_MOV_B64 sDst(SGPR70) src0(EXEC) S_MOV_B32 sDst(SGPR24) src0(LITERAL_CONST) const: 0x18a # VGPR394 # Indirect branch to blade(vf3;f1;: ??? S_GETPC_B64 sDst(SGPR22) src0(SGPR22) S_ADD_U32 sDst(SGPR22) src0(SGPR22) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR23) src0(SGPR23) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR22) src0(SGPR22) S_MOV_B64 sDst(EXEC) src0(SGPR70) # .lbl10 # 335: OpExtInst(FMin): Float: tmp335 << tmp321, blade(vf3;f1; V_MIN_F32 vDst(VGPR395) src0(VGPR217) src1(VGPR394) // VOP2 # 336: OpLoad: FloatVector3: tmp336 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR396) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR397) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR398) src0(VGPR2) # 339: OpCompositeExtract: Float: tmp339 << tmp263, 0 V_MOV_B32 vDst(VGPR399) src0(VGPR309) # 340: OpCompositeExtract: Float: tmp340 << tmp263, 1 V_MOV_B32 vDst(VGPR400) src0(VGPR310) # 341: OpCompositeConstruct: FloatVector3: tmp341 << tmp339, tmp340, const55 V_MOV_B32 vDst(VGPR401) src0(VGPR399) V_MOV_B32 vDst(VGPR402) src0(VGPR400) V_MOV_B32 vDst(VGPR404) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR403) src0(VGPR404) # 342: OpFAdd: FloatVector3: tmp342 << tmp336, tmp341 V_ADD_F32 vDst(VGPR405) src0(VGPR396) src1(VGPR401) // VOP2 V_ADD_F32 vDst(VGPR406) src0(VGPR397) src1(VGPR402) // VOP2 V_ADD_F32 vDst(VGPR407) src0(VGPR398) src1(VGPR403) // VOP2 # 345: OpFMul: Float: tmp345 << const343, const235 V_MOV_B32 vDst(VGPR408) src0(LITERAL_CONST) const: 0x40a00000 V_MOV_B32 vDst(VGPR409) src0(LITERAL_CONST) const: 0x3f65c8fa V_MUL_F32 vDst(VGPR410) src0(VGPR408) src1(VGPR409) // VOP2 # OpStore: : tmp342 >> param346 V_MOV_B32 vDst(VGPR238) src0(VGPR405) V_MOV_B32 vDst(VGPR239) src0(VGPR406) V_MOV_B32 vDst(VGPR240) src0(VGPR407) # OpStore: : tmp345 >> param347 V_MOV_B32 vDst(VGPR241) src0(VGPR410) # 348: OpFunctionCall: Float: blade(vf3;f1;(param346, param347) S_ADD_U32 sDst(SGPR25) src0(LITERAL_CONST) src1(0) const: 0xee # VGPR[238:240] S_ADD_U32 sDst(SGPR26) src0(LITERAL_CONST) src1(0) const: 0xf1 # VGPR241 S_MOV_B64 sDst(SGPR72) src0(EXEC) S_MOV_B32 sDst(SGPR24) src0(LITERAL_CONST) const: 0x19b # VGPR411 # Indirect branch to blade(vf3;f1;: ??? S_GETPC_B64 sDst(SGPR22) src0(SGPR22) S_ADD_U32 sDst(SGPR22) src0(SGPR22) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR23) src0(SGPR23) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR22) src0(SGPR22) S_MOV_B64 sDst(EXEC) src0(SGPR72) # .lbl11 # 349: OpLoad: FloatVector3: tmp349 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR412) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR413) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR414) src0(VGPR2) # 352: OpCompositeExtract: Float: tmp352 << tmp267, 0 V_MOV_B32 vDst(VGPR415) src0(VGPR311) # 353: OpCompositeExtract: Float: tmp353 << tmp267, 1 V_MOV_B32 vDst(VGPR416) src0(VGPR312) # 354: OpCompositeConstruct: FloatVector3: tmp354 << tmp352, tmp353, const55 V_MOV_B32 vDst(VGPR417) src0(VGPR415) V_MOV_B32 vDst(VGPR418) src0(VGPR416) V_MOV_B32 vDst(VGPR420) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR419) src0(VGPR420) # 355: OpFAdd: FloatVector3: tmp355 << tmp349, tmp354 V_ADD_F32 vDst(VGPR421) src0(VGPR412) src1(VGPR417) // VOP2 V_ADD_F32 vDst(VGPR422) src0(VGPR413) src1(VGPR418) // VOP2 V_ADD_F32 vDst(VGPR423) src0(VGPR414) src1(VGPR419) // VOP2 # 358: OpFMul: Float: tmp358 << const356, const235 V_MOV_B32 vDst(VGPR424) src0(LITERAL_CONST) const: 0x40c00000 V_MOV_B32 vDst(VGPR425) src0(LITERAL_CONST) const: 0x3f65c8fa V_MUL_F32 vDst(VGPR426) src0(VGPR424) src1(VGPR425) // VOP2 # OpStore: : tmp355 >> param359 V_MOV_B32 vDst(VGPR242) src0(VGPR421) V_MOV_B32 vDst(VGPR243) src0(VGPR422) V_MOV_B32 vDst(VGPR244) src0(VGPR423) # OpStore: : tmp358 >> param360 V_MOV_B32 vDst(VGPR245) src0(VGPR426) # 361: OpFunctionCall: Float: blade(vf3;f1;(param359, param360) S_ADD_U32 sDst(SGPR25) src0(LITERAL_CONST) src1(0) const: 0xf2 # VGPR[242:244] S_ADD_U32 sDst(SGPR26) src0(LITERAL_CONST) src1(0) const: 0xf5 # VGPR245 S_MOV_B64 sDst(SGPR74) src0(EXEC) S_MOV_B32 sDst(SGPR24) src0(LITERAL_CONST) const: 0x1ab # VGPR427 # Indirect branch to blade(vf3;f1;: ??? S_GETPC_B64 sDst(SGPR22) src0(SGPR22) S_ADD_U32 sDst(SGPR22) src0(SGPR22) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR23) src0(SGPR23) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR22) src0(SGPR22) S_MOV_B64 sDst(EXEC) src0(SGPR74) # .lbl12 # 362: OpExtInst(FMin): Float: tmp362 << blade(vf3;f1;, blade(vf3;f1; V_MIN_F32 vDst(VGPR428) src0(VGPR411) src1(VGPR427) // VOP2 # 363: OpExtInst(FMin): Float: tmp363 << tmp335, tmp362 V_MIN_F32 vDst(VGPR429) src0(VGPR395) src1(VGPR428) // VOP2 # OpStore: : tmp363 >> d V_MOV_B32 vDst(VGPR217) src0(VGPR429) # 364: OpLoad: Float: tmp364 << d # 365: OpLoad: FloatVector3: tmp365 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR430) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR431) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR432) src0(VGPR2) # 367: OpFAdd: Float: tmp367 << const148, const55 V_MOV_B32 vDst(VGPR433) src0(LITERAL_CONST) const: 0x3f333333 V_MOV_B32 vDst(VGPR434) src0(LITERAL_CONST) const: 0x00000000 V_ADD_F32 vDst(VGPR435) src0(VGPR433) src1(VGPR434) // VOP2 # 368: OpCompositeConstruct: FloatVector3: tmp368 << const55, const55, tmp367 V_MOV_B32 vDst(VGPR439) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR436) src0(VGPR439) V_MOV_B32 vDst(VGPR440) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR437) src0(VGPR440) V_MOV_B32 vDst(VGPR438) src0(VGPR435) # 369: OpFAdd: FloatVector3: tmp369 << tmp365, tmp368 V_ADD_F32 vDst(VGPR441) src0(VGPR430) src1(VGPR436) // VOP2 V_ADD_F32 vDst(VGPR442) src0(VGPR431) src1(VGPR437) // VOP2 V_ADD_F32 vDst(VGPR443) src0(VGPR432) src1(VGPR438) // VOP2 # OpStore: : tmp369 >> param370 V_MOV_B32 vDst(VGPR246) src0(VGPR441) V_MOV_B32 vDst(VGPR247) src0(VGPR442) V_MOV_B32 vDst(VGPR248) src0(VGPR443) # 371: OpFunctionCall: Float: centre(vf3;(param370) S_ADD_U32 sDst(SGPR37) src0(LITERAL_CONST) src1(0) const: 0xf6 # VGPR[246:248] S_MOV_B64 sDst(SGPR76) src0(EXEC) S_MOV_B32 sDst(SGPR36) src0(LITERAL_CONST) const: 0x1bc # VGPR444 # Indirect branch to centre(vf3;: ??? S_GETPC_B64 sDst(SGPR34) src0(SGPR34) S_ADD_U32 sDst(SGPR34) src0(SGPR34) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR35) src0(SGPR35) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR34) src0(SGPR34) S_MOV_B64 sDst(EXEC) src0(SGPR76) # .lbl13 # 372: OpExtInst(FMin): Float: tmp372 << tmp364, centre(vf3; V_MIN_F32 vDst(VGPR445) src0(VGPR217) src1(VGPR444) // VOP2 # OpStore: : tmp372 >> d V_MOV_B32 vDst(VGPR217) src0(VGPR445) # 373: OpLoad: Float: tmp373 << d # 374: OpLoad: FloatVector3: tmp374 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR446) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR447) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR448) src0(VGPR2) # 376: OpFAdd: Float: tmp376 << const54, const55 V_MOV_B32 vDst(VGPR449) src0(LITERAL_CONST) const: 0x00000000 V_ADD_F32 vDst(VGPR450) src0(1_0_F) src1(VGPR449) // VOP2 # 377: OpCompositeConstruct: FloatVector3: tmp377 << const55, const55, tmp376 V_MOV_B32 vDst(VGPR454) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR451) src0(VGPR454) V_MOV_B32 vDst(VGPR455) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR452) src0(VGPR455) V_MOV_B32 vDst(VGPR453) src0(VGPR450) # 378: OpFAdd: FloatVector3: tmp378 << tmp374, tmp377 V_ADD_F32 vDst(VGPR456) src0(VGPR446) src1(VGPR451) // VOP2 V_ADD_F32 vDst(VGPR457) src0(VGPR447) src1(VGPR452) // VOP2 V_ADD_F32 vDst(VGPR458) src0(VGPR448) src1(VGPR453) // VOP2 # OpStore: : tmp378 >> param379 V_MOV_B32 vDst(VGPR249) src0(VGPR456) V_MOV_B32 vDst(VGPR250) src0(VGPR457) V_MOV_B32 vDst(VGPR251) src0(VGPR458) # 380: OpFunctionCall: Float: concav(vf3;(param379) S_ADD_U32 sDst(SGPR43) src0(LITERAL_CONST) src1(0) const: 0xf9 # VGPR[249:251] S_MOV_B64 sDst(SGPR78) src0(EXEC) S_MOV_B32 sDst(SGPR42) src0(LITERAL_CONST) const: 0x1cb # VGPR459 # Indirect branch to concav(vf3;: ??? S_GETPC_B64 sDst(SGPR40) src0(SGPR40) S_ADD_U32 sDst(SGPR40) src0(SGPR40) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR41) src0(SGPR41) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR40) src0(SGPR40) S_MOV_B64 sDst(EXEC) src0(SGPR78) # .lbl14 # 381: OpFNegate: Float: tmp381 << concav(vf3; V_MUL_F32 vDst(VGPR460) src0(M1_0_F) src1(VGPR459) // VOP2 # 382: OpExtInst(FMax): Float: tmp382 << tmp373, tmp381 V_MAX_F32 vDst(VGPR461) src0(VGPR217) src1(VGPR460) // VOP2 # OpStore: : tmp382 >> d V_MOV_B32 vDst(VGPR217) src0(VGPR461) # OpStore: : const387 >> param388 V_MOV_B32 vDst(VGPR462) src0(LITERAL_CONST) const: 0x40060a92 V_MOV_B32 vDst(VGPR252) src0(VGPR462) # 389: OpFunctionCall: FloatMatrix2x2: rot(f1;(param388) S_ADD_U32 sDst(SGPR19) src0(LITERAL_CONST) src1(0) const: 0xfc # VGPR252 S_MOV_B64 sDst(SGPR80) src0(EXEC) S_MOV_B32 sDst(SGPR18) src0(LITERAL_CONST) const: 0x1cf # VGPR[463:466] # Indirect branch to rot(f1;: ??? S_GETPC_B64 sDst(SGPR16) src0(SGPR16) S_ADD_U32 sDst(SGPR16) src0(SGPR16) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR17) src0(SGPR17) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR16) src0(SGPR16) S_MOV_B64 sDst(EXEC) src0(SGPR80) # .lbl15 # 391: OpMatrixTimesVector: FloatVector2: tmp391 << rot(f1;, const385 V_MOV_B32 vDst(VGPR467) src0(LITERAL_CONST) const: 0x3e4ccccd V_MOV_B32 vDst(VGPR468) src0(LITERAL_CONST) const: 0x3e4ccccd V_MUL_F32 vDst(VGPR469) src0(VGPR463) src1(VGPR467) // VOP2 V_MUL_F32 vDst(VGPR470) src0(VGPR464) src1(VGPR467) // VOP2 V_MAC_F32 vDst(VGPR469) src0(VGPR465) src1(VGPR468) // VOP2 V_MAC_F32 vDst(VGPR470) src0(VGPR466) src1(VGPR468) // VOP2 # OpStore: : const387 >> param393 V_MOV_B32 vDst(VGPR471) src0(LITERAL_CONST) const: 0x40060a92 V_MOV_B32 vDst(VGPR253) src0(VGPR471) # 394: OpFunctionCall: FloatMatrix2x2: rot(f1;(param393) S_ADD_U32 sDst(SGPR19) src0(LITERAL_CONST) src1(0) const: 0xfd # VGPR253 S_MOV_B64 sDst(SGPR82) src0(EXEC) S_MOV_B32 sDst(SGPR18) src0(LITERAL_CONST) const: 0x1d8 # VGPR[472:475] # Indirect branch to rot(f1;: ??? S_GETPC_B64 sDst(SGPR16) src0(SGPR16) S_ADD_U32 sDst(SGPR16) src0(SGPR16) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR17) src0(SGPR17) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR16) src0(SGPR16) S_MOV_B64 sDst(EXEC) src0(SGPR82) # .lbl16 # 396: OpMatrixTimesVector: FloatVector2: tmp396 << rot(f1;, tmp391 V_MUL_F32 vDst(VGPR476) src0(VGPR472) src1(VGPR469) // VOP2 V_MUL_F32 vDst(VGPR477) src0(VGPR473) src1(VGPR469) // VOP2 V_MAC_F32 vDst(VGPR476) src0(VGPR474) src1(VGPR470) // VOP2 V_MAC_F32 vDst(VGPR477) src0(VGPR475) src1(VGPR470) // VOP2 # 398: OpLoad: FloatVector3: tmp398 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR478) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR479) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR480) src0(VGPR2) # 401: OpFAdd: Float: tmp401 << const55, const55 V_MOV_B32 vDst(VGPR481) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR482) src0(LITERAL_CONST) const: 0x00000000 V_ADD_F32 vDst(VGPR483) src0(VGPR481) src1(VGPR482) // VOP2 # 402: OpCompositeExtract: Float: tmp402 << const385, 0 V_MOV_B32 vDst(VGPR485) src0(LITERAL_CONST) const: 0x3e4ccccd V_MOV_B32 vDst(VGPR484) src0(VGPR485) # 403: OpCompositeExtract: Float: tmp403 << const385, 1 V_MOV_B32 vDst(VGPR487) src0(LITERAL_CONST) const: 0x3e4ccccd V_MOV_B32 vDst(VGPR486) src0(VGPR488) # 404: OpCompositeConstruct: FloatVector3: tmp404 << tmp402, tmp403, tmp401 V_MOV_B32 vDst(VGPR488) src0(VGPR484) V_MOV_B32 vDst(VGPR489) src0(VGPR486) V_MOV_B32 vDst(VGPR490) src0(VGPR483) # 405: OpFAdd: FloatVector3: tmp405 << tmp398, tmp404 V_ADD_F32 vDst(VGPR491) src0(VGPR478) src1(VGPR488) // VOP2 V_ADD_F32 vDst(VGPR492) src0(VGPR479) src1(VGPR489) // VOP2 V_ADD_F32 vDst(VGPR493) src0(VGPR480) src1(VGPR490) // VOP2 # 406: OpExtInst(Length): Float: tmp406 << tmp405 V_MUL_F32 vDst(VGPR494) src0(VGPR491) src1(VGPR491) // VOP2 V_MAC_F32 vDst(VGPR494) src0(VGPR492) src1(VGPR492) // VOP2 V_MAC_F32 vDst(VGPR494) src0(VGPR493) src1(VGPR493) // VOP2 V_SQRT_F32 vDst(VGPR494) src0(VGPR494) # 407: OpFSub: Float: tmp407 << tmp406, const384 V_MOV_B32 vDst(VGPR495) src0(LITERAL_CONST) const: 0x3e4ccccd V_SUB_F32 vDst(VGPR496) src0(VGPR494) src1(VGPR495) // VOP2 # 408: OpLoad: FloatVector3: tmp408 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR497) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR498) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR499) src0(VGPR2) # 411: OpFAdd: Float: tmp411 << const55, const55 V_MOV_B32 vDst(VGPR500) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR501) src0(LITERAL_CONST) const: 0x00000000 V_ADD_F32 vDst(VGPR502) src0(VGPR500) src1(VGPR501) // VOP2 # 412: OpCompositeExtract: Float: tmp412 << tmp391, 0 V_MOV_B32 vDst(VGPR503) src0(VGPR469) # 413: OpCompositeExtract: Float: tmp413 << tmp391, 1 V_MOV_B32 vDst(VGPR504) src0(VGPR470) # 414: OpCompositeConstruct: FloatVector3: tmp414 << tmp412, tmp413, tmp411 V_MOV_B32 vDst(VGPR505) src0(VGPR503) V_MOV_B32 vDst(VGPR506) src0(VGPR504) V_MOV_B32 vDst(VGPR507) src0(VGPR502) # 415: OpFAdd: FloatVector3: tmp415 << tmp408, tmp414 V_ADD_F32 vDst(VGPR508) src0(VGPR497) src1(VGPR505) // VOP2 V_ADD_F32 vDst(VGPR509) src0(VGPR498) src1(VGPR506) // VOP2 V_ADD_F32 vDst(VGPR510) src0(VGPR499) src1(VGPR507) // VOP2 # 416: OpExtInst(Length): Float: tmp416 << tmp415 V_MUL_F32 vDst(VGPR511) src0(VGPR508) src1(VGPR508) // VOP2 V_MAC_F32 vDst(VGPR511) src0(VGPR509) src1(VGPR509) // VOP2 V_MAC_F32 vDst(VGPR511) src0(VGPR510) src1(VGPR510) // VOP2 V_SQRT_F32 vDst(VGPR511) src0(VGPR511) # 417: OpFSub: Float: tmp417 << tmp416, const384 V_MOV_B32 vDst(VGPR512) src0(LITERAL_CONST) const: 0x3e4ccccd V_SUB_F32 vDst(VGPR513) src0(VGPR511) src1(VGPR512) // VOP2 # 418: OpExtInst(FMin): Float: tmp418 << tmp407, tmp417 V_MIN_F32 vDst(VGPR514) src0(VGPR496) src1(VGPR513) // VOP2 # 419: OpLoad: FloatVector3: tmp419 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR515) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR516) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR517) src0(VGPR2) # 422: OpFAdd: Float: tmp422 << const55, const55 V_MOV_B32 vDst(VGPR518) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR519) src0(LITERAL_CONST) const: 0x00000000 V_ADD_F32 vDst(VGPR520) src0(VGPR518) src1(VGPR519) // VOP2 # 423: OpCompositeExtract: Float: tmp423 << tmp396, 0 V_MOV_B32 vDst(VGPR521) src0(VGPR476) # 424: OpCompositeExtract: Float: tmp424 << tmp396, 1 V_MOV_B32 vDst(VGPR522) src0(VGPR477) # 425: OpCompositeConstruct: FloatVector3: tmp425 << tmp423, tmp424, tmp422 V_MOV_B32 vDst(VGPR523) src0(VGPR521) V_MOV_B32 vDst(VGPR524) src0(VGPR522) V_MOV_B32 vDst(VGPR525) src0(VGPR520) # 426: OpFAdd: FloatVector3: tmp426 << tmp419, tmp425 V_ADD_F32 vDst(VGPR526) src0(VGPR515) src1(VGPR523) // VOP2 V_ADD_F32 vDst(VGPR527) src0(VGPR516) src1(VGPR524) // VOP2 V_ADD_F32 vDst(VGPR528) src0(VGPR517) src1(VGPR525) // VOP2 # 427: OpExtInst(Length): Float: tmp427 << tmp426 V_MUL_F32 vDst(VGPR529) src0(VGPR526) src1(VGPR526) // VOP2 V_MAC_F32 vDst(VGPR529) src0(VGPR527) src1(VGPR527) // VOP2 V_MAC_F32 vDst(VGPR529) src0(VGPR528) src1(VGPR528) // VOP2 V_SQRT_F32 vDst(VGPR529) src0(VGPR529) # 428: OpFSub: Float: tmp428 << tmp427, const384 V_MOV_B32 vDst(VGPR530) src0(LITERAL_CONST) const: 0x3e4ccccd V_SUB_F32 vDst(VGPR531) src0(VGPR529) src1(VGPR530) // VOP2 # 429: OpExtInst(FMin): Float: tmp429 << tmp418, tmp428 V_MIN_F32 vDst(VGPR532) src0(VGPR514) src1(VGPR531) // VOP2 # 430: OpLoad: Float: tmp430 << d # 432: OpFNegate: Float: tmp432 << tmp429 V_MUL_F32 vDst(VGPR533) src0(M1_0_F) src1(VGPR532) // VOP2 # 433: OpExtInst(FMax): Float: tmp433 << tmp430, tmp432 V_MAX_F32 vDst(VGPR534) src0(VGPR217) src1(VGPR533) // VOP2 # OpStore: : tmp433 >> d V_MOV_B32 vDst(VGPR217) src0(VGPR534) # 434: OpLoad: Float: tmp434 << d # OpReturnValue: : << tmp434 S_MOV_B32 sDst(M0) src0(SGPR48) V_MOVRELD_B32 vDst(VGPR0) src0(VGPR217) S_SETPC_B64 sDst(SGPR46) src0(SGPR46) # FloatVector3 estimateNormal(vf3;(FloatVector3* p) Function: FloatVector3 estimateNormal(vf3;() S_MOV_B64 sDst(SGPR88) src0(EXEC) # lb34 Label: lb34 # 437: OpAccessChain: Float*: p[0] # 438: OpLoad: Float: tmp438 << p[0] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR553) src0(VGPR0) # 440: OpFAdd: Float: tmp440 << tmp438, const439 V_MOV_B32 vDst(VGPR554) src0(LITERAL_CONST) const: 0x3d4ccccd V_ADD_F32 vDst(VGPR555) src0(VGPR553) src1(VGPR554) // VOP2 # 441: OpAccessChain: Float*: p[1] # 442: OpLoad: Float: tmp442 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR556) src0(VGPR1) # 443: OpAccessChain: Float*: p[2] # 444: OpLoad: Float: tmp444 << p[2] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR557) src0(VGPR2) # 445: OpCompositeConstruct: FloatVector3: tmp445 << tmp440, tmp442, tmp444 V_MOV_B32 vDst(VGPR558) src0(VGPR555) V_MOV_B32 vDst(VGPR559) src0(VGPR556) V_MOV_B32 vDst(VGPR560) src0(VGPR557) # OpStore: : tmp445 >> param446 V_MOV_B32 vDst(VGPR535) src0(VGPR558) V_MOV_B32 vDst(VGPR536) src0(VGPR559) V_MOV_B32 vDst(VGPR537) src0(VGPR560) # 447: OpFunctionCall: Float: sceneSDF(vf3;(param446) S_ADD_U32 sDst(SGPR49) src0(LITERAL_CONST) src1(0) const: 0x217 # VGPR[535:537] S_MOV_B64 sDst(SGPR90) src0(EXEC) S_MOV_B32 sDst(SGPR48) src0(LITERAL_CONST) const: 0x231 # VGPR561 # Indirect branch to sceneSDF(vf3;: ??? S_GETPC_B64 sDst(SGPR46) src0(SGPR46) S_ADD_U32 sDst(SGPR46) src0(SGPR46) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR47) src0(SGPR47) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR46) src0(SGPR46) S_MOV_B64 sDst(EXEC) src0(SGPR90) # .lbl17 # 448: OpAccessChain: Float*: p[0] # 449: OpLoad: Float: tmp449 << p[0] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR562) src0(VGPR0) # 450: OpFSub: Float: tmp450 << tmp449, const439 V_MOV_B32 vDst(VGPR563) src0(LITERAL_CONST) const: 0x3d4ccccd V_SUB_F32 vDst(VGPR564) src0(VGPR562) src1(VGPR563) // VOP2 # 451: OpAccessChain: Float*: p[1] # 452: OpLoad: Float: tmp452 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR565) src0(VGPR1) # 453: OpAccessChain: Float*: p[2] # 454: OpLoad: Float: tmp454 << p[2] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR566) src0(VGPR2) # 455: OpCompositeConstruct: FloatVector3: tmp455 << tmp450, tmp452, tmp454 V_MOV_B32 vDst(VGPR567) src0(VGPR564) V_MOV_B32 vDst(VGPR568) src0(VGPR565) V_MOV_B32 vDst(VGPR569) src0(VGPR566) # OpStore: : tmp455 >> param456 V_MOV_B32 vDst(VGPR538) src0(VGPR567) V_MOV_B32 vDst(VGPR539) src0(VGPR568) V_MOV_B32 vDst(VGPR540) src0(VGPR569) # 457: OpFunctionCall: Float: sceneSDF(vf3;(param456) S_ADD_U32 sDst(SGPR49) src0(LITERAL_CONST) src1(0) const: 0x21a # VGPR[538:540] S_MOV_B64 sDst(SGPR92) src0(EXEC) S_MOV_B32 sDst(SGPR48) src0(LITERAL_CONST) const: 0x23a # VGPR570 # Indirect branch to sceneSDF(vf3;: ??? S_GETPC_B64 sDst(SGPR46) src0(SGPR46) S_ADD_U32 sDst(SGPR46) src0(SGPR46) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR47) src0(SGPR47) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR46) src0(SGPR46) S_MOV_B64 sDst(EXEC) src0(SGPR92) # .lbl18 # 458: OpFSub: Float: tmp458 << sceneSDF(vf3;, sceneSDF(vf3; V_SUB_F32 vDst(VGPR571) src0(VGPR561) src1(VGPR570) // VOP2 # 459: OpAccessChain: Float*: p[0] # 460: OpLoad: Float: tmp460 << p[0] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR572) src0(VGPR0) # 461: OpAccessChain: Float*: p[1] # 462: OpLoad: Float: tmp462 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR573) src0(VGPR1) # 463: OpFAdd: Float: tmp463 << tmp462, const439 V_MOV_B32 vDst(VGPR574) src0(LITERAL_CONST) const: 0x3d4ccccd V_ADD_F32 vDst(VGPR575) src0(VGPR573) src1(VGPR574) // VOP2 # 464: OpAccessChain: Float*: p[2] # 465: OpLoad: Float: tmp465 << p[2] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR576) src0(VGPR2) # 466: OpCompositeConstruct: FloatVector3: tmp466 << tmp460, tmp463, tmp465 V_MOV_B32 vDst(VGPR577) src0(VGPR572) V_MOV_B32 vDst(VGPR578) src0(VGPR575) V_MOV_B32 vDst(VGPR579) src0(VGPR576) # OpStore: : tmp466 >> param467 V_MOV_B32 vDst(VGPR541) src0(VGPR577) V_MOV_B32 vDst(VGPR542) src0(VGPR578) V_MOV_B32 vDst(VGPR543) src0(VGPR579) # 468: OpFunctionCall: Float: sceneSDF(vf3;(param467) S_ADD_U32 sDst(SGPR49) src0(LITERAL_CONST) src1(0) const: 0x21d # VGPR[541:543] S_MOV_B64 sDst(SGPR94) src0(EXEC) S_MOV_B32 sDst(SGPR48) src0(LITERAL_CONST) const: 0x244 # VGPR580 # Indirect branch to sceneSDF(vf3;: ??? S_GETPC_B64 sDst(SGPR46) src0(SGPR46) S_ADD_U32 sDst(SGPR46) src0(SGPR46) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR47) src0(SGPR47) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR46) src0(SGPR46) S_MOV_B64 sDst(EXEC) src0(SGPR94) # .lbl19 # 469: OpAccessChain: Float*: p[0] # 470: OpLoad: Float: tmp470 << p[0] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR581) src0(VGPR0) # 471: OpAccessChain: Float*: p[1] # 472: OpLoad: Float: tmp472 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR582) src0(VGPR1) # 473: OpFSub: Float: tmp473 << tmp472, const439 V_MOV_B32 vDst(VGPR583) src0(LITERAL_CONST) const: 0x3d4ccccd V_SUB_F32 vDst(VGPR584) src0(VGPR582) src1(VGPR583) // VOP2 # 474: OpAccessChain: Float*: p[2] # 475: OpLoad: Float: tmp475 << p[2] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR585) src0(VGPR2) # 476: OpCompositeConstruct: FloatVector3: tmp476 << tmp470, tmp473, tmp475 V_MOV_B32 vDst(VGPR586) src0(VGPR581) V_MOV_B32 vDst(VGPR587) src0(VGPR584) V_MOV_B32 vDst(VGPR588) src0(VGPR585) # OpStore: : tmp476 >> param477 V_MOV_B32 vDst(VGPR544) src0(VGPR586) V_MOV_B32 vDst(VGPR545) src0(VGPR587) V_MOV_B32 vDst(VGPR546) src0(VGPR588) # 478: OpFunctionCall: Float: sceneSDF(vf3;(param477) S_ADD_U32 sDst(SGPR49) src0(LITERAL_CONST) src1(0) const: 0x220 # VGPR[544:546] S_MOV_B64 sDst(SGPR96) src0(EXEC) S_MOV_B32 sDst(SGPR48) src0(LITERAL_CONST) const: 0x24d # VGPR589 # Indirect branch to sceneSDF(vf3;: ??? S_GETPC_B64 sDst(SGPR46) src0(SGPR46) S_ADD_U32 sDst(SGPR46) src0(SGPR46) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR47) src0(SGPR47) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR46) src0(SGPR46) S_MOV_B64 sDst(EXEC) src0(SGPR96) # .lbl20 # 479: OpFSub: Float: tmp479 << sceneSDF(vf3;, sceneSDF(vf3; V_SUB_F32 vDst(VGPR590) src0(VGPR580) src1(VGPR589) // VOP2 # 480: OpAccessChain: Float*: p[0] # 481: OpLoad: Float: tmp481 << p[0] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR591) src0(VGPR0) # 482: OpAccessChain: Float*: p[1] # 483: OpLoad: Float: tmp483 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR592) src0(VGPR1) # 484: OpAccessChain: Float*: p[2] # 485: OpLoad: Float: tmp485 << p[2] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR593) src0(VGPR2) # 486: OpFAdd: Float: tmp486 << tmp485, const439 V_MOV_B32 vDst(VGPR594) src0(LITERAL_CONST) const: 0x3d4ccccd V_ADD_F32 vDst(VGPR595) src0(VGPR593) src1(VGPR594) // VOP2 # 487: OpCompositeConstruct: FloatVector3: tmp487 << tmp481, tmp483, tmp486 V_MOV_B32 vDst(VGPR596) src0(VGPR591) V_MOV_B32 vDst(VGPR597) src0(VGPR592) V_MOV_B32 vDst(VGPR598) src0(VGPR595) # OpStore: : tmp487 >> param488 V_MOV_B32 vDst(VGPR547) src0(VGPR596) V_MOV_B32 vDst(VGPR548) src0(VGPR597) V_MOV_B32 vDst(VGPR549) src0(VGPR598) # 489: OpFunctionCall: Float: sceneSDF(vf3;(param488) S_ADD_U32 sDst(SGPR49) src0(LITERAL_CONST) src1(0) const: 0x223 # VGPR[547:549] S_MOV_B64 sDst(SGPR98) src0(EXEC) S_MOV_B32 sDst(SGPR48) src0(LITERAL_CONST) const: 0x257 # VGPR599 # Indirect branch to sceneSDF(vf3;: ??? S_GETPC_B64 sDst(SGPR46) src0(SGPR46) S_ADD_U32 sDst(SGPR46) src0(SGPR46) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR47) src0(SGPR47) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR46) src0(SGPR46) S_MOV_B64 sDst(EXEC) src0(SGPR98) # .lbl21 # 490: OpAccessChain: Float*: p[0] # 491: OpLoad: Float: tmp491 << p[0] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR600) src0(VGPR0) # 492: OpAccessChain: Float*: p[1] # 493: OpLoad: Float: tmp493 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR601) src0(VGPR1) # 494: OpAccessChain: Float*: p[2] # 495: OpLoad: Float: tmp495 << p[2] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR602) src0(VGPR2) # 496: OpFSub: Float: tmp496 << tmp495, const439 V_MOV_B32 vDst(VGPR603) src0(LITERAL_CONST) const: 0x3d4ccccd V_SUB_F32 vDst(VGPR604) src0(VGPR602) src1(VGPR603) // VOP2 # 497: OpCompositeConstruct: FloatVector3: tmp497 << tmp491, tmp493, tmp496 V_MOV_B32 vDst(VGPR605) src0(VGPR600) V_MOV_B32 vDst(VGPR606) src0(VGPR601) V_MOV_B32 vDst(VGPR607) src0(VGPR604) # OpStore: : tmp497 >> param498 V_MOV_B32 vDst(VGPR550) src0(VGPR605) V_MOV_B32 vDst(VGPR551) src0(VGPR606) V_MOV_B32 vDst(VGPR552) src0(VGPR607) # 499: OpFunctionCall: Float: sceneSDF(vf3;(param498) S_ADD_U32 sDst(SGPR49) src0(LITERAL_CONST) src1(0) const: 0x226 # VGPR[550:552] S_MOV_B64 sDst(SGPR100) src0(EXEC) S_MOV_B32 sDst(SGPR48) src0(LITERAL_CONST) const: 0x260 # VGPR608 # Indirect branch to sceneSDF(vf3;: ??? S_GETPC_B64 sDst(SGPR46) src0(SGPR46) S_ADD_U32 sDst(SGPR46) src0(SGPR46) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR47) src0(SGPR47) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR46) src0(SGPR46) S_MOV_B64 sDst(EXEC) src0(SGPR100) # .lbl22 # 500: OpFSub: Float: tmp500 << sceneSDF(vf3;, sceneSDF(vf3; V_SUB_F32 vDst(VGPR609) src0(VGPR599) src1(VGPR608) // VOP2 # 501: OpCompositeConstruct: FloatVector3: tmp501 << tmp458, tmp479, tmp500 V_MOV_B32 vDst(VGPR610) src0(VGPR571) V_MOV_B32 vDst(VGPR611) src0(VGPR590) V_MOV_B32 vDst(VGPR612) src0(VGPR609) # 502: OpExtInst(Normalize): FloatVector3: tmp502 << tmp501 V_MUL_F32 vDst(VGPR613) src0(VGPR610) src1(VGPR610) // VOP2 V_MAC_F32 vDst(VGPR613) src0(VGPR611) src1(VGPR611) // VOP2 V_MAC_F32 vDst(VGPR613) src0(VGPR612) src1(VGPR612) // VOP2 V_RSQ_CLAMP_F32 vDst(VGPR613) src0(VGPR613) V_MUL_F32 vDst(VGPR614) src0(VGPR610) src1(VGPR613) // VOP2 V_MUL_F32 vDst(VGPR615) src0(VGPR611) src1(VGPR613) // VOP2 V_MUL_F32 vDst(VGPR616) src0(VGPR612) src1(VGPR613) // VOP2 # OpReturnValue: : << tmp502 S_MOV_B32 sDst(M0) src0(SGPR86) V_MOVRELD_B32 vDst(VGPR0) src0(VGPR614) V_MOVRELD_B32 vDst(VGPR1) src0(VGPR615) V_MOVRELD_B32 vDst(VGPR2) src0(VGPR616) S_SETPC_B64 sDst(SGPR84) src0(SGPR84) # Void mainImage(vf4;vf2;(FloatVector4* fragColor, FloatVector2* fragCoord) Function: Void mainImage(vf4;vf2;(, FloatVector2 main.fragCoord) S_MOV_B64 sDst(SGPR102) src0(EXEC) # lb42 Label: lb42 # 506: OpLoad: FloatVector2: tmp506 << fragCoord S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR13) const: 0x0 V_MOVRELS_B32 vDst(VGPR630) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR631) src0(VGPR1) # 510: OpLoad: FloatVector3: tmp510 << iResolution S_LOAD_DWORDX2_IMM offset(4) sBase(SGPR[0:1]) sDst(SGPR[104:105]) S_WAITCNT 0 S_LOAD_DWORD_IMM offset(12) sBase(SGPR[0:1]) sDst(SGPR106) S_WAITCNT 0 # 511: OpVectorShuffle: FloatVector2: tmp511 << tmp510, tmp510, 0, 1 V_MOV_B32 vDst(VGPR632) src0(SGPR104) V_MOV_B32 vDst(VGPR633) src0(SGPR105) # 512: OpVectorTimesScalar: FloatVector2: tmp512 << tmp511, const507 V_MOV_B32 vDst(VGPR636) src0(0_5_F) V_MUL_F32 vDst(VGPR634) src0(VGPR636) src1(VGPR632) // VOP2 V_MUL_F32 vDst(VGPR635) src0(VGPR636) src1(VGPR633) // VOP2 # 513: OpFSub: FloatVector2: tmp513 << tmp506, tmp512 V_SUB_F32 vDst(VGPR637) src0(VGPR630) src1(VGPR634) // VOP2 V_SUB_F32 vDst(VGPR638) src0(VGPR631) src1(VGPR635) // VOP2 # OpStore: : tmp513 >> uv V_MOV_B32 vDst(VGPR617) src0(VGPR637) V_MOV_B32 vDst(VGPR618) src0(VGPR638) # 514: OpAccessChain: Float*: iResolution[1] # 515: OpLoad: Float: tmp515 << iResolution[1] S_LOAD_DWORD_IMM offset(8) sBase(SGPR[0:1]) sDst(SGPR107) S_WAITCNT 0 # 516: OpFDiv: Float: tmp516 << const110, tmp515 V_MOV_B32 vDst(VGPR639) src0(SGPR107) V_RCP_F32 vDst(VGPR640) src0(VGPR639) V_MUL_F32 vDst(VGPR640) src0(2_0_F) src1(VGPR640) // VOP2 V_DIV_FIXUP_F32 vDst(VGPR640) src0(VGPR640) src1(VGPR639) src2(2_0_F) abs(0) clamp(0) omod(0) neg(0) // VOP3a # 517: OpLoad: FloatVector2: tmp517 << uv # 518: OpVectorTimesScalar: FloatVector2: tmp518 << tmp517, tmp516 V_MUL_F32 vDst(VGPR641) src0(VGPR640) src1(VGPR617) // VOP2 V_MUL_F32 vDst(VGPR642) src0(VGPR640) src1(VGPR618) // VOP2 # OpStore: : tmp518 >> uv V_MOV_B32 vDst(VGPR617) src0(VGPR641) V_MOV_B32 vDst(VGPR618) src0(VGPR642) # 519: OpLoad: FloatVector2: tmp519 << uv # 520: OpVectorTimesScalar: FloatVector2: tmp520 << tmp519, const329 V_MOV_B32 vDst(VGPR645) src0(4_0_F) V_MUL_F32 vDst(VGPR643) src0(VGPR645) src1(VGPR617) // VOP2 V_MUL_F32 vDst(VGPR644) src0(VGPR645) src1(VGPR618) // VOP2 # OpStore: : tmp520 >> uv V_MOV_B32 vDst(VGPR617) src0(VGPR643) V_MOV_B32 vDst(VGPR618) src0(VGPR644) # 525: OpExtInst(Tan): Float: tmp525 << const522 V_MOV_B32 vDst(VGPR646) src0(LITERAL_CONST) const: 0x3e20d97c V_MUL_F32 vDst(VGPR647) src0(LITERAL_CONST) src1(VGPR646) // VOP2 const: 0x3e22f983 V_SIN_F32 vDst(VGPR648) src0(VGPR647) V_COS_F32 vDst(VGPR647) src0(VGPR647) V_RCP_F32 vDst(VGPR649) src0(VGPR647) V_MUL_F32 vDst(VGPR649) src0(VGPR648) src1(VGPR649) // VOP2 V_DIV_FIXUP_F32 vDst(VGPR649) src0(VGPR649) src1(VGPR647) src2(VGPR648) abs(0) clamp(0) omod(0) neg(0) // VOP3a # 526: OpFDiv: Float: tmp526 << const54, tmp525 V_RCP_F32 vDst(VGPR650) src0(VGPR649) V_MUL_F32 vDst(VGPR650) src0(1_0_F) src1(VGPR650) // VOP2 V_DIV_FIXUP_F32 vDst(VGPR650) src0(VGPR650) src1(VGPR649) src2(1_0_F) abs(0) clamp(0) omod(0) neg(0) // VOP3a # 527: OpFAdd: Float: tmp527 << const54, tmp526 V_ADD_F32 vDst(VGPR651) src0(1_0_F) src1(VGPR650) // VOP2 # 528: OpFMul: Float: tmp528 << const54, tmp527 V_MUL_F32 vDst(VGPR652) src0(1_0_F) src1(VGPR651) // VOP2 # 529: OpCompositeConstruct: FloatVector3: tmp529 << const55, const55, tmp528 V_MOV_B32 vDst(VGPR656) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR653) src0(VGPR656) V_MOV_B32 vDst(VGPR657) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR654) src0(VGPR657) V_MOV_B32 vDst(VGPR655) src0(VGPR652) # OpStore: : tmp529 >> ray V_MOV_B32 vDst(VGPR619) src0(VGPR653) V_MOV_B32 vDst(VGPR620) src0(VGPR654) V_MOV_B32 vDst(VGPR621) src0(VGPR655) # 533: OpLoad: FloatVector2: tmp533 << uv # 534: OpCompositeExtract: Float: tmp534 << tmp533, 0 V_MOV_B32 vDst(VGPR658) src0(VGPR617) # 535: OpCompositeExtract: Float: tmp535 << tmp533, 1 V_MOV_B32 vDst(VGPR659) src0(VGPR618) # 536: OpCompositeConstruct: FloatVector3: tmp536 << tmp534, tmp535, const55 V_MOV_B32 vDst(VGPR660) src0(VGPR658) V_MOV_B32 vDst(VGPR661) src0(VGPR659) V_MOV_B32 vDst(VGPR663) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR662) src0(VGPR663) # 538: OpFSub: FloatVector3: tmp538 << tmp536, tmp529 V_SUB_F32 vDst(VGPR664) src0(VGPR660) src1(VGPR653) // VOP2 V_SUB_F32 vDst(VGPR665) src0(VGPR661) src1(VGPR654) // VOP2 V_SUB_F32 vDst(VGPR666) src0(VGPR662) src1(VGPR655) // VOP2 # 539: OpExtInst(Normalize): FloatVector3: tmp539 << tmp538 V_MUL_F32 vDst(VGPR667) src0(VGPR664) src1(VGPR664) // VOP2 V_MAC_F32 vDst(VGPR667) src0(VGPR665) src1(VGPR665) // VOP2 V_MAC_F32 vDst(VGPR667) src0(VGPR666) src1(VGPR666) // VOP2 V_RSQ_CLAMP_F32 vDst(VGPR667) src0(VGPR667) V_MUL_F32 vDst(VGPR668) src0(VGPR664) src1(VGPR667) // VOP2 V_MUL_F32 vDst(VGPR669) src0(VGPR665) src1(VGPR667) // VOP2 V_MUL_F32 vDst(VGPR670) src0(VGPR666) src1(VGPR667) // VOP2 # OpStore: : const55 >> shade V_MOV_B32 vDst(VGPR671) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR622) src0(VGPR671) # OpStore: : const549 >> i V_MOV_B32 vDst(VGPR623) src0(0) # OpBranch: to lb550 S_BRANCH ??? lb550 # lb550 Label: lb550 # OpLoopMerge: (merge: lb552, continue: lb553) # CF Block: Merge: lb552, Continue: lb553 S_MOV_B64 sDst(SGPR108) src0(EXEC) S_MOV_B64 sDst(SGPR110) src0(EXEC) S_MOV_B64 sDst(SGPR112) src0(EXEC) Label: lb550Loop # OpBranch: to lb554 S_BRANCH ??? lb554 # lb554 Label: lb554 # 555: OpLoad: Int: tmp555 << i Decorators: RelaxedPrecision # 558: OpSLessThan: Bool: tmp558 << tmp555, const556 V_MOV_B32 vDst(VGPR672) src0(LITERAL_CONST) const: 0x00000064 V_CMP_LT_I32 dst(SGPR114) src0(VGPR623) src1(VGPR672) // VOP3a # OpBranchConditional: if(tmp558) then branch to lb551, else branch to lb552 # CF Block: Cond Branch: true: lb551, false: lb552 S_AND_B64 sDst(EXEC) src0(SGPR114) src1(EXEC) S_CBRANCH_EXECZ ??? lb552 S_BRANCH ??? lb551 # lb551 Label: lb551 # 561: OpLoad: FloatVector3: tmp561 << ray # OpStore: : tmp561 >> param560 V_MOV_B32 vDst(VGPR624) src0(VGPR619) V_MOV_B32 vDst(VGPR625) src0(VGPR620) V_MOV_B32 vDst(VGPR626) src0(VGPR621) # 562: OpFunctionCall: Float: sceneSDF(vf3;(param560) S_ADD_U32 sDst(SGPR49) src0(LITERAL_CONST) src1(0) const: 0x270 # VGPR[624:626] S_MOV_B64 sDst(SGPR116) src0(EXEC) S_MOV_B32 sDst(SGPR48) src0(LITERAL_CONST) const: 0x2a1 # VGPR673 # Indirect branch to sceneSDF(vf3;: ??? S_GETPC_B64 sDst(SGPR46) src0(SGPR46) S_ADD_U32 sDst(SGPR46) src0(SGPR46) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR47) src0(SGPR47) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR46) src0(SGPR46) S_MOV_B64 sDst(EXEC) src0(SGPR116) # .lbl23 # 565: OpFOrdLessThan: Bool: tmp565 << sceneSDF(vf3;, const564 V_MOV_B32 vDst(VGPR674) src0(LITERAL_CONST) const: 0x3ba3d70a V_CMP_LT_F32 dst(SGPR118) src0(VGPR673) src1(VGPR674) // VOP3a # OpSelectionMerge: (merge: lb567) # CF Block: Merge: lb567 S_MOV_B64 sDst(SGPR120) src0(EXEC) # OpBranchConditional: if(tmp565) then branch to lb566, else branch to lb604 # CF Block: Cond Branch: true: lb566, false: lb604 S_AND_B64 sDst(EXEC) src0(SGPR118) src1(EXEC) S_CBRANCH_EXECZ ??? lb604 S_BRANCH ??? lb566 # lb566 Label: lb566 # 570: OpLoad: FloatVector3: tmp570 << ray # OpStore: : tmp570 >> param569 V_MOV_B32 vDst(VGPR627) src0(VGPR619) V_MOV_B32 vDst(VGPR628) src0(VGPR620) V_MOV_B32 vDst(VGPR629) src0(VGPR621) # 571: OpFunctionCall: FloatVector3: estimateNormal(vf3;(param569) S_ADD_U32 sDst(SGPR87) src0(LITERAL_CONST) src1(0) const: 0x273 # VGPR[627:629] S_MOV_B64 sDst(SGPR122) src0(EXEC) S_MOV_B32 sDst(SGPR86) src0(LITERAL_CONST) const: 0x2a3 # VGPR[675:677] # Indirect branch to estimateNormal(vf3;: ??? S_GETPC_B64 sDst(SGPR84) src0(SGPR84) S_ADD_U32 sDst(SGPR84) src0(SGPR84) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR85) src0(SGPR85) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR84) src0(SGPR84) S_MOV_B64 sDst(EXEC) src0(SGPR122) # .lbl24 # 575: OpDot: Float: tmp575 << const543, estimateNormal(vf3; V_MOV_B32 vDst(VGPR678) src0(LITERAL_CONST) const: 0x3ed105ec V_MOV_B32 vDst(VGPR679) src0(LITERAL_CONST) const: 0x3ed105ec V_MOV_B32 vDst(VGPR680) src0(LITERAL_CONST) const: 0x3f5105ec V_MUL_F32 vDst(VGPR681) src0(VGPR678) src1(VGPR675) // VOP2 V_MAC_F32 vDst(VGPR681) src0(VGPR679) src1(VGPR676) // VOP2 V_MAC_F32 vDst(VGPR681) src0(VGPR680) src1(VGPR677) // VOP2 # 578: OpFSub: Float: tmp578 << tmp575, const54 V_MOV_B32 vDst(VGPR682) src0(1_0_F) V_SUB_F32 vDst(VGPR683) src0(VGPR681) src1(VGPR682) // VOP2 # 581: OpFMul: Float: tmp581 << const579, tmp575 V_MOV_B32 vDst(VGPR684) src0(LITERAL_CONST) const: 0x3f4ccccd V_MUL_F32 vDst(VGPR685) src0(VGPR684) src1(VGPR681) // VOP2 # 582: OpLoad: Float: tmp582 << shade # 583: OpFAdd: Float: tmp583 << tmp582, tmp581 V_ADD_F32 vDst(VGPR686) src0(VGPR622) src1(VGPR685) // VOP2 # OpStore: : tmp583 >> shade V_MOV_B32 vDst(VGPR622) src0(VGPR686) # 585: OpFNegate: Float: tmp585 << tmp575 V_MUL_F32 vDst(VGPR687) src0(M1_0_F) src1(VGPR681) // VOP2 # 587: OpFMul: Float: tmp587 << tmp585, tmp575 V_MUL_F32 vDst(VGPR688) src0(VGPR687) src1(VGPR681) // VOP2 # 588: OpFMul: Float: tmp588 << tmp587, const209 V_MOV_B32 vDst(VGPR689) src0(LITERAL_CONST) const: 0x41200000 V_MUL_F32 vDst(VGPR690) src0(VGPR688) src1(VGPR689) // VOP2 # 589: OpExtInst(Exp): Float: tmp589 << tmp588 V_MOV_B32 vDst(VGPR692) src0(LITERAL_CONST) const: 0x3fb8aa3b V_MUL_F32 vDst(VGPR691) src0(VGPR690) src1(VGPR692) // VOP2 V_EXP_F32 vDst(VGPR691) src0(VGPR691) # 590: OpExtInst(FClamp): Float: tmp590 << tmp589, const55, const54 V_MOV_B32 vDst(VGPR693) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR694) src0(1_0_F) V_MAX_F32 vDst(VGPR695) src0(VGPR691) src1(VGPR693) // VOP2 V_MIN_F32 vDst(VGPR695) src0(VGPR695) src1(VGPR694) // VOP2 # 591: OpLoad: Float: tmp591 << shade # 592: OpFAdd: Float: tmp592 << tmp591, tmp590 V_ADD_F32 vDst(VGPR696) src0(VGPR622) src1(VGPR695) // VOP2 # OpStore: : tmp592 >> shade V_MOV_B32 vDst(VGPR622) src0(VGPR696) # 594: OpFNegate: Float: tmp594 << tmp578 V_MUL_F32 vDst(VGPR697) src0(M1_0_F) src1(VGPR683) // VOP2 # 596: OpFMul: Float: tmp596 << tmp594, tmp578 V_MUL_F32 vDst(VGPR698) src0(VGPR697) src1(VGPR683) // VOP2 # 598: OpFMul: Float: tmp598 << tmp596, const597 V_MOV_B32 vDst(VGPR699) src0(LITERAL_CONST) const: 0x461c4000 V_MUL_F32 vDst(VGPR700) src0(VGPR698) src1(VGPR699) // VOP2 # 599: OpExtInst(Exp): Float: tmp599 << tmp598 V_MOV_B32 vDst(VGPR702) src0(LITERAL_CONST) const: 0x3fb8aa3b V_MUL_F32 vDst(VGPR701) src0(VGPR700) src1(VGPR702) // VOP2 V_EXP_F32 vDst(VGPR701) src0(VGPR701) # 600: OpExtInst(FClamp): Float: tmp600 << tmp599, const55, const54 V_MOV_B32 vDst(VGPR703) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR704) src0(1_0_F) V_MAX_F32 vDst(VGPR705) src0(VGPR701) src1(VGPR703) // VOP2 V_MIN_F32 vDst(VGPR705) src0(VGPR705) src1(VGPR704) // VOP2 # 601: OpLoad: Float: tmp601 << shade # 602: OpFAdd: Float: tmp602 << tmp601, tmp600 V_ADD_F32 vDst(VGPR706) src0(VGPR622) src1(VGPR705) // VOP2 # OpStore: : tmp602 >> shade V_MOV_B32 vDst(VGPR622) src0(VGPR706) # OpBranch: to lb552 S_BRANCH ??? lb552 # lb604 Label: lb604 # 605: OpLoad: FloatVector3: tmp605 << ray # 606: OpExtInst(Length): Float: tmp606 << tmp605 V_MUL_F32 vDst(VGPR707) src0(VGPR619) src1(VGPR619) // VOP2 V_MAC_F32 vDst(VGPR707) src0(VGPR620) src1(VGPR620) // VOP2 V_MAC_F32 vDst(VGPR707) src0(VGPR621) src1(VGPR621) // VOP2 V_SQRT_F32 vDst(VGPR707) src0(VGPR707) # 608: OpFOrdGreaterThan: Bool: tmp608 << tmp606, const607 V_MOV_B32 vDst(VGPR708) src0(LITERAL_CONST) const: 0x41f00000 V_CMP_GT_F32 dst(SGPR124) src0(VGPR707) src1(VGPR708) // VOP3a # OpSelectionMerge: (merge: lb610) # CF Block: Merge: lb610 S_MOV_B64 sDst(SGPR126) src0(EXEC) # OpBranchConditional: if(tmp608) then branch to lb609, else branch to lb610 # CF Block: Cond Branch: true: lb609, false: lb610 S_AND_B64 sDst(EXEC) src0(SGPR124) src1(EXEC) S_CBRANCH_EXECZ ??? lb610 S_BRANCH ??? lb609 # lb609 Label: lb609 # OpBranch: to lb552 S_BRANCH ??? lb552 # lb610 Label: lb610 # OpBranch: to lb567 S_BRANCH ??? lb567 # lb567 Label: lb567 # 614: OpVectorTimesScalar: FloatVector3: tmp614 << tmp539, const612 V_MOV_B32 vDst(VGPR712) src0(LITERAL_CONST) const: 0x3f35c28f V_MUL_F32 vDst(VGPR709) src0(VGPR712) src1(VGPR668) // VOP2 V_MUL_F32 vDst(VGPR710) src0(VGPR712) src1(VGPR669) // VOP2 V_MUL_F32 vDst(VGPR711) src0(VGPR712) src1(VGPR670) // VOP2 # 616: OpVectorTimesScalar: FloatVector3: tmp616 << tmp614, sceneSDF(vf3; V_MUL_F32 vDst(VGPR713) src0(VGPR673) src1(VGPR709) // VOP2 V_MUL_F32 vDst(VGPR714) src0(VGPR673) src1(VGPR710) // VOP2 V_MUL_F32 vDst(VGPR715) src0(VGPR673) src1(VGPR711) // VOP2 # 617: OpLoad: FloatVector3: tmp617 << ray # 618: OpFAdd: FloatVector3: tmp618 << tmp617, tmp616 V_ADD_F32 vDst(VGPR716) src0(VGPR619) src1(VGPR713) // VOP2 V_ADD_F32 vDst(VGPR717) src0(VGPR620) src1(VGPR714) // VOP2 V_ADD_F32 vDst(VGPR718) src0(VGPR621) src1(VGPR715) // VOP2 # OpStore: : tmp618 >> ray V_MOV_B32 vDst(VGPR619) src0(VGPR716) V_MOV_B32 vDst(VGPR620) src0(VGPR717) V_MOV_B32 vDst(VGPR621) src0(VGPR718) # OpBranch: to lb553 S_BRANCH ??? lb553 # lb553 Label: lb553 # 619: OpLoad: Int: tmp619 << i Decorators: RelaxedPrecision # 621: OpIAdd: Int: tmp621 << tmp619, const620 Decorators: RelaxedPrecision V_MOV_B32 vDst(VGPR719) src0(1_INT) V_ADD_I32 vDst(VGPR720) src0(VGPR623) src1(VGPR719) // VOP2 # OpStore: : tmp621 >> i V_MOV_B32 vDst(VGPR623) src0(VGPR720) # OpBranch: to lb550 S_BRANCH ??? lb550 # lb552 Label: lb552 # 624: OpLoad: Float: tmp624 << shade # 625: OpVectorTimesScalar: FloatVector4: tmp625 << const623, tmp624 V_MOV_B32 vDst(VGPR725) src0(1_0_F) V_MOV_B32 vDst(VGPR726) src0(LITERAL_CONST) const: 0x3f666666 V_MOV_B32 vDst(VGPR727) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR728) src0(LITERAL_CONST) const: 0x00000000 V_MUL_F32 vDst(VGPR721) src0(VGPR622) src1(VGPR725) // VOP2 V_MUL_F32 vDst(VGPR722) src0(VGPR622) src1(VGPR726) // VOP2 V_MUL_F32 vDst(VGPR723) src0(VGPR622) src1(VGPR727) // VOP2 V_MUL_F32 vDst(VGPR724) src0(VGPR622) src1(VGPR728) // VOP2 # OpStore: : tmp625 >> fragColor S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR12) const: 0x0 V_MOVRELD_B32 vDst(VGPR0) src0(VGPR721) V_MOVRELD_B32 vDst(VGPR1) src0(VGPR722) V_MOVRELD_B32 vDst(VGPR2) src0(VGPR723) V_MOVRELD_B32 vDst(VGPR3) src0(VGPR724) # OpReturn: S_SETPC_B64 sDst(SGPR10) src0(SGPR10) Performing GPU-specific optimization... Pre register allocation control-flow processing... Intermediate disassembly (pre register allocation): Program Type: Fragment Special Input Variables: offset: unset, size: 16, FloatVector4 gl_FragCoord BuiltIn(FragCoord) Textures: offset: 0, size: 4, Float iChannel0 offset: 1, size: 4, Float iChannel1 offset: 2, size: 4, Float iChannel2 offset: 3, size: 4, Float iChannel3 Output Variables: offset: 0, size: 16, FloatVector4 finalColor Uniform Constants: offset: 0, size: 4, Float iTime offset: 4, size: 12, FloatVector3 iResolution offset: 16, size: 16, FloatVector4 iMouse offset: 32, size: 16, FloatVector4 iDate offset: 48, size: 4, Float iFrame offset: 52, size: 48, FloatVector3 iChannelResolution[4] Constants: Float const54: 1 Float const55: 0 Float const69: 0.3 Float const70: 0.03 UInt32 const72: 1 Float const80: 0.6 Float const93: 3 Float const100: 0.4 Float const101: -0.04 Float const107: -1.5 Float const110: 2 Float const111: 0.02 Float const117: 2.5 UInt32 const120: 0 Float const123: -2 Float const130: -3 Float const131: 0.1 Float const148: 0.7 UInt32 const156: 2 Float const179: 2.3 Float const209: 10 Float const224: 2.6 Float const235: 0.897598 Float const242: -3.5 FloatVector2 const243: {0, -3.5} Float const329: 4 Float const343: 5 Float const356: 6 Float const384: 0.2 FloatVector2 const385: {0.2, 0.2} Float const387: 2.0944 Float const439: 0.05 Float const507: 0.5 Float const522: 0.15708 Float const541: 0.408248 Float const542: 0.816497 FloatVector3 const543: {0.408248, 0.408248, 0.816497} Int32 const549: 0 Int32 const556: 100 Float const564: 0.005 Float const579: 0.8 Float const597: 10000 Float const607: 30 Float const612: 0.71 Int32 const620: 1 Float const622: 0.9 FloatVector4 const623: {1, 0.9, 0, 0} UInt32 const642: 4 Function Local Variables: offset: unset, size: 16, FloatVector4 main.param629 offset: unset, size: 8, FloatVector2 main.param630 offset: unset, size: 16, FloatVector4 main.fragColor offset: unset, size: 8, FloatVector2 main.fragCoord offset: unset, size: 4, Float main.a offset: unset, size: 12, FloatVector3 rot(f1;.p offset: unset, size: 4, Float rot(f1;.a offset: unset, size: 4, Float blade(vf3;f1;.param61 offset: unset, size: 4, Float blade(vf3;f1;.param83 offset: unset, size: 12, FloatVector3 blade(vf3;f1;.p offset: unset, size: 12, FloatVector3 centre(vf3;.p offset: unset, size: 12, FloatVector3 concav(vf3;.p offset: unset, size: 4, Float sceneSDF(vf3;.param216 offset: unset, size: 4, Float sceneSDF(vf3;.param227 offset: unset, size: 4, Float sceneSDF(vf3;.param238 offset: unset, size: 4, Float sceneSDF(vf3;.d offset: unset, size: 12, FloatVector3 sceneSDF(vf3;.param279 offset: unset, size: 4, Float sceneSDF(vf3;.param280 offset: unset, size: 12, FloatVector3 sceneSDF(vf3;.param291 offset: unset, size: 4, Float sceneSDF(vf3;.param292 offset: unset, size: 12, FloatVector3 sceneSDF(vf3;.param304 offset: unset, size: 4, Float sceneSDF(vf3;.param305 offset: unset, size: 12, FloatVector3 sceneSDF(vf3;.param316 offset: unset, size: 4, Float sceneSDF(vf3;.param317 offset: unset, size: 12, FloatVector3 sceneSDF(vf3;.param332 offset: unset, size: 4, Float sceneSDF(vf3;.param333 offset: unset, size: 12, FloatVector3 sceneSDF(vf3;.param346 offset: unset, size: 4, Float sceneSDF(vf3;.param347 offset: unset, size: 12, FloatVector3 sceneSDF(vf3;.param359 offset: unset, size: 4, Float sceneSDF(vf3;.param360 offset: unset, size: 12, FloatVector3 sceneSDF(vf3;.param370 offset: unset, size: 12, FloatVector3 sceneSDF(vf3;.param379 offset: unset, size: 4, Float sceneSDF(vf3;.param388 offset: unset, size: 4, Float sceneSDF(vf3;.param393 offset: unset, size: 12, FloatVector3 sceneSDF(vf3;.p offset: unset, size: 12, FloatVector3 estimateNormal(vf3;.param446 offset: unset, size: 12, FloatVector3 estimateNormal(vf3;.param456 offset: unset, size: 12, FloatVector3 estimateNormal(vf3;.param467 offset: unset, size: 12, FloatVector3 estimateNormal(vf3;.param477 offset: unset, size: 12, FloatVector3 estimateNormal(vf3;.param488 offset: unset, size: 12, FloatVector3 estimateNormal(vf3;.param498 offset: unset, size: 8, FloatVector2 mainImage(vf4;vf2;.uv offset: unset, size: 12, FloatVector3 mainImage(vf4;vf2;.ray offset: unset, size: 4, Float mainImage(vf4;vf2;.shade offset: unset, size: 4, Int32 mainImage(vf4;vf2;.i offset: unset, size: 12, FloatVector3 mainImage(vf4;vf2;.param560 offset: unset, size: 12, FloatVector3 mainImage(vf4;vf2;.param569 Instructions: V_SUB_F32 vDst(VGPR14) src0(SGPR2) src1(VGPR14) // VOP2 # Void main() Function: Void main() # lb5 Label: lb5 # 631: OpLoad: FloatVector4: tmp631 << gl_FragCoord V_MOV_B32 vDst(VGPR24) src0(VGPR13) V_MOV_B32 vDst(VGPR25) src0(VGPR14) V_MOV_B32 vDst(VGPR26) src0(VGPR15) V_MOV_B32 vDst(VGPR27) src0(VGPR16) # 632: OpVectorShuffle: FloatVector2: tmp632 << tmp631, tmp631, 0, 1 V_MOV_B32 vDst(VGPR28) src0(VGPR24) V_MOV_B32 vDst(VGPR29) src0(VGPR25) # OpStore: : tmp632 >> param630 V_MOV_B32 vDst(VGPR22) src0(VGPR28) V_MOV_B32 vDst(VGPR23) src0(VGPR29) # 633: OpFunctionCall: Void: mainImage(vf4;vf2;(param629, param630) S_ADD_U32 sDst(SGPR12) src0(LITERAL_CONST) src1(0) const: 0x12 # VGPR[18:21] S_ADD_U32 sDst(SGPR13) src0(LITERAL_CONST) src1(0) const: 0x16 # VGPR[22:23] S_MOV_B64 sDst(SGPR14) src0(EXEC) # Indirect branch to mainImage(vf4;vf2;: ??? S_GETPC_B64 sDst(SGPR10) src0(SGPR10) S_ADD_U32 sDst(SGPR10) src0(SGPR10) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR11) src0(SGPR11) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR10) src0(SGPR10) S_MOV_B64 sDst(EXEC) src0(SGPR14) # .lbl0 # 634: OpLoad: FloatVector4: tmp634 << param629 # OpStore: : tmp634 >> finalColor V_MOV_B32 vDst(VGPR30) src0(VGPR18) V_MOV_B32 vDst(VGPR31) src0(VGPR19) V_MOV_B32 vDst(VGPR32) src0(VGPR20) V_MOV_B32 vDst(VGPR33) src0(VGPR21) # OpReturn: V_CVT_PKRTZ_F16_F32 vDst(VGPR30) src0(VGPR30) src1(VGPR31) // VOP2 V_CVT_PKRTZ_F16_F32 vDst(VGPR31) src0(VGPR32) src1(VGPR33) // VOP2 EXP en(0xf) tgt(0) compr(1) done(1) vm(1) vsrc0(VGPR30) vsrc1(VGPR31) vsrc2(VGPR32) vsrc3(VGPR33) S_WAITCNT 0 S_ENDPGM 0 # FloatMatrix2x2 rot(f1;(Float* a) Function: FloatMatrix2x2 rot(f1;() S_MOV_B64 sDst(SGPR20) src0(EXEC) # lb13 Label: lb13 # 44: OpLoad: Float: tmp44 << a S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR19) const: 0x0 V_MOVRELS_B32 vDst(VGPR34) src0(VGPR0) # 45: OpExtInst(Cos): Float: tmp45 << tmp44 V_MUL_F32 vDst(VGPR35) src0(LITERAL_CONST) src1(VGPR34) // VOP2 const: 0x3e22f983 V_FRACT_F32 vDst(VGPR35) src0(VGPR35) V_COS_F32 vDst(VGPR35) src0(VGPR35) # 47: OpLoad: Float: tmp47 << a S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR19) const: 0x0 V_MOVRELS_B32 vDst(VGPR36) src0(VGPR0) # 48: OpExtInst(Sin): Float: tmp48 << tmp47 V_MUL_F32 vDst(VGPR37) src0(LITERAL_CONST) src1(VGPR36) // VOP2 const: 0x3e22f983 V_FRACT_F32 vDst(VGPR37) src0(VGPR37) V_SIN_F32 vDst(VGPR37) src0(VGPR37) # 52: OpFNegate: Float: tmp52 << tmp48 V_MUL_F32 vDst(VGPR38) src0(M1_0_F) src1(VGPR37) // VOP2 # 56: OpCompositeConstruct: FloatVector2: tmp56 << tmp45, tmp48 V_MOV_B32 vDst(VGPR39) src0(VGPR35) V_MOV_B32 vDst(VGPR40) src0(VGPR37) # 57: OpCompositeConstruct: FloatVector2: tmp57 << tmp52, tmp45 V_MOV_B32 vDst(VGPR41) src0(VGPR38) V_MOV_B32 vDst(VGPR42) src0(VGPR35) # 58: OpCompositeConstruct: FloatMatrix2x2: tmp58 << tmp56, tmp57 V_MOV_B32 vDst(VGPR43) src0(VGPR39) V_MOV_B32 vDst(VGPR44) src0(VGPR40) V_MOV_B32 vDst(VGPR45) src0(VGPR41) V_MOV_B32 vDst(VGPR46) src0(VGPR42) # OpReturnValue: : << tmp58 S_MOV_B32 sDst(M0) src0(SGPR18) V_MOVRELD_B32 vDst(VGPR0) src0(VGPR43) V_MOVRELD_B32 vDst(VGPR1) src0(VGPR44) V_MOVRELD_B32 vDst(VGPR2) src0(VGPR45) V_MOVRELD_B32 vDst(VGPR3) src0(VGPR46) S_SETPC_B64 sDst(SGPR16) src0(SGPR16) # Float blade(vf3;f1;(FloatVector3* p, Float* a) Function: Float blade(vf3;f1;(, Float rot(f1;.a) S_MOV_B64 sDst(SGPR28) src0(EXEC) # lb20 Label: lb20 # 62: OpLoad: Float: tmp62 << a S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR26) const: 0x0 V_MOVRELS_B32 vDst(VGPR49) src0(VGPR0) # OpStore: : tmp62 >> param61 V_MOV_B32 vDst(VGPR47) src0(VGPR49) # 63: OpFunctionCall: FloatMatrix2x2: rot(f1;(param61) S_ADD_U32 sDst(SGPR19) src0(LITERAL_CONST) src1(0) const: 0x2f # VGPR47 S_MOV_B64 sDst(SGPR30) src0(EXEC) S_MOV_B32 sDst(SGPR18) src0(LITERAL_CONST) const: 0x32 # VGPR[50:53] # Indirect branch to rot(f1;: ??? S_GETPC_B64 sDst(SGPR16) src0(SGPR16) S_ADD_U32 sDst(SGPR16) src0(SGPR16) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR17) src0(SGPR17) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR16) src0(SGPR16) S_MOV_B64 sDst(EXEC) src0(SGPR30) # .lbl1 # 64: OpLoad: FloatVector3: tmp64 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR25) const: 0x0 V_MOVRELS_B32 vDst(VGPR54) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR55) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR56) src0(VGPR2) # 65: OpVectorShuffle: FloatVector2: tmp65 << tmp64, tmp64, 0, 1 V_MOV_B32 vDst(VGPR57) src0(VGPR54) V_MOV_B32 vDst(VGPR58) src0(VGPR55) # 66: OpVectorTimesMatrix: FloatVector2: tmp66 << tmp65, rot(f1; V_MUL_F32 vDst(VGPR59) src0(VGPR57) src1(VGPR50) // VOP2 V_MUL_F32 vDst(VGPR60) src0(VGPR57) src1(VGPR52) // VOP2 V_MAC_F32 vDst(VGPR59) src0(VGPR58) src1(VGPR51) // VOP2 V_MAC_F32 vDst(VGPR60) src0(VGPR58) src1(VGPR53) // VOP2 # 67: OpLoad: FloatVector3: tmp67 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR25) const: 0x0 V_MOVRELS_B32 vDst(VGPR61) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR62) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR63) src0(VGPR2) # 68: OpVectorShuffle: FloatVector3: tmp68 << tmp67, tmp66, 3, 4, 2 V_MOV_B32 vDst(VGPR64) src0(VGPR59) V_MOV_B32 vDst(VGPR65) src0(VGPR60) V_MOV_B32 vDst(VGPR66) src0(VGPR63) # OpStore: : tmp68 >> p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR25) const: 0x0 V_MOVRELD_B32 vDst(VGPR0) src0(VGPR64) V_MOVRELD_B32 vDst(VGPR1) src0(VGPR65) V_MOVRELD_B32 vDst(VGPR2) src0(VGPR66) # 73: OpAccessChain: Float*: p[1] # 74: OpLoad: Float: tmp74 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR25) const: 0x0 V_MOVRELS_B32 vDst(VGPR67) src0(VGPR1) # 75: OpFMul: Float: tmp75 << const70, tmp74 V_MOV_B32 vDst(VGPR68) src0(LITERAL_CONST) const: 0x3cf5c28f V_MUL_F32 vDst(VGPR69) src0(VGPR68) src1(VGPR67) // VOP2 # 76: OpAccessChain: Float*: p[1] # 77: OpLoad: Float: tmp77 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR25) const: 0x0 V_MOVRELS_B32 vDst(VGPR70) src0(VGPR1) # 78: OpFMul: Float: tmp78 << tmp75, tmp77 V_MUL_F32 vDst(VGPR71) src0(VGPR69) src1(VGPR70) // VOP2 # 79: OpFAdd: Float: tmp79 << const69, tmp78 V_MOV_B32 vDst(VGPR72) src0(LITERAL_CONST) const: 0x3e99999a V_ADD_F32 vDst(VGPR73) src0(VGPR72) src1(VGPR71) // VOP2 # 81: OpExtInst(FClamp): Float: tmp81 << tmp79, const69, const80 V_MOV_B32 vDst(VGPR74) src0(LITERAL_CONST) const: 0x3e99999a V_MOV_B32 vDst(VGPR75) src0(LITERAL_CONST) const: 0x3f19999a V_MAX_F32 vDst(VGPR76) src0(VGPR73) src1(VGPR74) // VOP2 V_MIN_F32 vDst(VGPR76) src0(VGPR76) src1(VGPR75) // VOP2 # 82: OpFNegate: Float: tmp82 << tmp81 V_MUL_F32 vDst(VGPR77) src0(M1_0_F) src1(VGPR76) // VOP2 # OpStore: : tmp82 >> param83 V_MOV_B32 vDst(VGPR48) src0(VGPR77) # 84: OpFunctionCall: FloatMatrix2x2: rot(f1;(param83) S_ADD_U32 sDst(SGPR19) src0(LITERAL_CONST) src1(0) const: 0x30 # VGPR48 S_MOV_B64 sDst(SGPR32) src0(EXEC) S_MOV_B32 sDst(SGPR18) src0(LITERAL_CONST) const: 0x4e # VGPR[78:81] # Indirect branch to rot(f1;: ??? S_GETPC_B64 sDst(SGPR16) src0(SGPR16) S_ADD_U32 sDst(SGPR16) src0(SGPR16) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR17) src0(SGPR17) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR16) src0(SGPR16) S_MOV_B64 sDst(EXEC) src0(SGPR32) # .lbl2 # 85: OpLoad: FloatVector3: tmp85 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR25) const: 0x0 V_MOVRELS_B32 vDst(VGPR82) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR83) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR84) src0(VGPR2) # 86: OpVectorShuffle: FloatVector2: tmp86 << tmp85, tmp85, 0, 2 V_MOV_B32 vDst(VGPR85) src0(VGPR82) V_MOV_B32 vDst(VGPR86) src0(VGPR84) # 87: OpVectorTimesMatrix: FloatVector2: tmp87 << tmp86, rot(f1; V_MUL_F32 vDst(VGPR87) src0(VGPR85) src1(VGPR78) // VOP2 V_MUL_F32 vDst(VGPR88) src0(VGPR85) src1(VGPR80) // VOP2 V_MAC_F32 vDst(VGPR87) src0(VGPR86) src1(VGPR79) // VOP2 V_MAC_F32 vDst(VGPR88) src0(VGPR86) src1(VGPR81) // VOP2 # 88: OpLoad: FloatVector3: tmp88 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR25) const: 0x0 V_MOVRELS_B32 vDst(VGPR89) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR90) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR91) src0(VGPR2) # 89: OpVectorShuffle: FloatVector3: tmp89 << tmp88, tmp87, 3, 1, 4 V_MOV_B32 vDst(VGPR92) src0(VGPR87) V_MOV_B32 vDst(VGPR93) src0(VGPR90) V_MOV_B32 vDst(VGPR94) src0(VGPR88) # OpStore: : tmp89 >> p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR25) const: 0x0 V_MOVRELD_B32 vDst(VGPR0) src0(VGPR92) V_MOVRELD_B32 vDst(VGPR1) src0(VGPR93) V_MOVRELD_B32 vDst(VGPR2) src0(VGPR94) # 91: OpAccessChain: Float*: p[1] # 92: OpLoad: Float: tmp92 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR25) const: 0x0 V_MOVRELS_B32 vDst(VGPR95) src0(VGPR1) # 94: OpFSub: Float: tmp94 << tmp92, const93 V_MOV_B32 vDst(VGPR96) src0(LITERAL_CONST) const: 0x40400000 V_SUB_F32 vDst(VGPR97) src0(VGPR95) src1(VGPR96) // VOP2 # 96: OpAccessChain: Float*: p[1] # 97: OpLoad: Float: tmp97 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR25) const: 0x0 V_MOVRELS_B32 vDst(VGPR98) src0(VGPR1) # 98: OpFSub: Float: tmp98 << tmp97, const54 V_MOV_B32 vDst(VGPR99) src0(1_0_F) V_SUB_F32 vDst(VGPR100) src0(VGPR98) src1(VGPR99) // VOP2 # 103: OpFMul: Float: tmp103 << const101, tmp94 V_MOV_B32 vDst(VGPR101) src0(LITERAL_CONST) const: 0xbd23d70a V_MUL_F32 vDst(VGPR102) src0(VGPR101) src1(VGPR97) // VOP2 # 105: OpFMul: Float: tmp105 << tmp103, tmp94 V_MUL_F32 vDst(VGPR103) src0(VGPR102) src1(VGPR97) // VOP2 # 106: OpFAdd: Float: tmp106 << const100, tmp105 V_MOV_B32 vDst(VGPR104) src0(LITERAL_CONST) const: 0x3ecccccd V_ADD_F32 vDst(VGPR105) src0(VGPR104) src1(VGPR103) // VOP2 # 108: OpExtInst(FClamp): Float: tmp108 << tmp106, const107, const54 V_MOV_B32 vDst(VGPR106) src0(LITERAL_CONST) const: 0xbfc00000 V_MOV_B32 vDst(VGPR107) src0(1_0_F) V_MAX_F32 vDst(VGPR108) src0(VGPR105) src1(VGPR106) // VOP2 V_MIN_F32 vDst(VGPR108) src0(VGPR108) src1(VGPR107) // VOP2 # 113: OpFMul: Float: tmp113 << const111, tmp98 V_MOV_B32 vDst(VGPR109) src0(LITERAL_CONST) const: 0x3ca3d70a V_MUL_F32 vDst(VGPR110) src0(VGPR109) src1(VGPR100) // VOP2 # 115: OpFMul: Float: tmp115 << tmp113, tmp98 V_MUL_F32 vDst(VGPR111) src0(VGPR110) src1(VGPR100) // VOP2 # 116: OpFAdd: Float: tmp116 << const110, tmp115 V_ADD_F32 vDst(VGPR112) src0(2_0_F) src1(VGPR111) // VOP2 # 118: OpExtInst(FClamp): Float: tmp118 << tmp116, const54, const117 V_MOV_B32 vDst(VGPR113) src0(1_0_F) V_MOV_B32 vDst(VGPR114) src0(LITERAL_CONST) const: 0x40200000 V_MAX_F32 vDst(VGPR115) src0(VGPR112) src1(VGPR113) // VOP2 V_MIN_F32 vDst(VGPR115) src0(VGPR115) src1(VGPR114) // VOP2 # 119: OpLoad: FloatVector3: tmp119 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR25) const: 0x0 V_MOVRELS_B32 vDst(VGPR116) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR117) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR118) src0(VGPR2) # 121: OpAccessChain: Float*: p[0] # 122: OpLoad: Float: tmp122 << p[0] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR25) const: 0x0 V_MOVRELS_B32 vDst(VGPR119) src0(VGPR0) # 125: OpFMul: Float: tmp125 << const123, tmp108 V_MUL_F32 vDst(VGPR120) src0(M2_0_F) src1(VGPR108) // VOP2 # 127: OpExtInst(FClamp): Float: tmp127 << tmp122, tmp125, tmp118 V_MAX_F32 vDst(VGPR121) src0(VGPR119) src1(VGPR120) // VOP2 V_MIN_F32 vDst(VGPR121) src0(VGPR121) src1(VGPR115) // VOP2 # 128: OpAccessChain: Float*: p[1] # 129: OpLoad: Float: tmp129 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR25) const: 0x0 V_MOVRELS_B32 vDst(VGPR122) src0(VGPR1) # 132: OpAccessChain: Float*: p[0] # 133: OpLoad: Float: tmp133 << p[0] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR25) const: 0x0 V_MOVRELS_B32 vDst(VGPR123) src0(VGPR0) # 134: OpFMul: Float: tmp134 << const131, tmp133 V_MOV_B32 vDst(VGPR124) src0(LITERAL_CONST) const: 0x3dcccccd V_MUL_F32 vDst(VGPR125) src0(VGPR124) src1(VGPR123) // VOP2 # 135: OpAccessChain: Float*: p[0] # 136: OpLoad: Float: tmp136 << p[0] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR25) const: 0x0 V_MOVRELS_B32 vDst(VGPR126) src0(VGPR0) # 137: OpFMul: Float: tmp137 << tmp134, tmp136 V_MUL_F32 vDst(VGPR127) src0(VGPR125) src1(VGPR126) // VOP2 # 138: OpFSub: Float: tmp138 << const93, tmp137 V_MOV_B32 vDst(VGPR128) src0(LITERAL_CONST) const: 0x40400000 V_SUB_F32 vDst(VGPR129) src0(VGPR128) src1(VGPR127) // VOP2 # 139: OpExtInst(FClamp): Float: tmp139 << tmp129, const130, tmp138 V_MOV_B32 vDst(VGPR130) src0(LITERAL_CONST) const: 0xc0400000 V_MAX_F32 vDst(VGPR131) src0(VGPR122) src1(VGPR130) // VOP2 V_MIN_F32 vDst(VGPR131) src0(VGPR131) src1(VGPR129) // VOP2 # 140: OpCompositeConstruct: FloatVector3: tmp140 << tmp127, tmp139, const55 V_MOV_B32 vDst(VGPR132) src0(VGPR121) V_MOV_B32 vDst(VGPR133) src0(VGPR131) V_MOV_B32 vDst(VGPR135) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR134) src0(VGPR135) # 141: OpFSub: FloatVector3: tmp141 << tmp119, tmp140 V_SUB_F32 vDst(VGPR136) src0(VGPR116) src1(VGPR132) // VOP2 V_SUB_F32 vDst(VGPR137) src0(VGPR117) src1(VGPR133) // VOP2 V_SUB_F32 vDst(VGPR138) src0(VGPR118) src1(VGPR134) // VOP2 # 142: OpExtInst(Length): Float: tmp142 << tmp141 V_MUL_F32 vDst(VGPR139) src0(VGPR136) src1(VGPR136) // VOP2 V_MAC_F32 vDst(VGPR139) src0(VGPR137) src1(VGPR137) // VOP2 V_MAC_F32 vDst(VGPR139) src0(VGPR138) src1(VGPR138) // VOP2 V_SQRT_F32 vDst(VGPR139) src0(VGPR139) # 143: OpFSub: Float: tmp143 << tmp142, const131 V_MOV_B32 vDst(VGPR140) src0(LITERAL_CONST) const: 0x3dcccccd V_SUB_F32 vDst(VGPR141) src0(VGPR139) src1(VGPR140) // VOP2 # OpReturnValue: : << tmp143 S_MOV_B32 sDst(M0) src0(SGPR24) V_MOVRELD_B32 vDst(VGPR0) src0(VGPR141) S_SETPC_B64 sDst(SGPR22) src0(SGPR22) # Float centre(vf3;(FloatVector3* p) Function: Float centre(vf3;() S_MOV_B64 sDst(SGPR38) src0(EXEC) # lb24 Label: lb24 # 150: OpLoad: FloatVector3: tmp150 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR37) const: 0x0 V_MOVRELS_B32 vDst(VGPR142) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR143) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR144) src0(VGPR2) # 151: OpVectorShuffle: FloatVector2: tmp151 << tmp150, tmp150, 0, 1 V_MOV_B32 vDst(VGPR145) src0(VGPR142) V_MOV_B32 vDst(VGPR146) src0(VGPR143) # 153: OpCompositeConstruct: FloatVector2: tmp153 << const117, const117 V_MOV_B32 vDst(VGPR149) src0(LITERAL_CONST) const: 0x40200000 V_MOV_B32 vDst(VGPR147) src0(VGPR149) V_MOV_B32 vDst(VGPR150) src0(LITERAL_CONST) const: 0x40200000 V_MOV_B32 vDst(VGPR148) src0(VGPR150) # 154: OpFDiv: FloatVector2: tmp154 << tmp151, tmp153 V_RCP_F32 vDst(VGPR151) src0(VGPR147) V_RCP_F32 vDst(VGPR152) src0(VGPR148) V_MUL_F32 vDst(VGPR151) src0(VGPR145) src1(VGPR151) // VOP2 V_MUL_F32 vDst(VGPR152) src0(VGPR146) src1(VGPR152) // VOP2 V_DIV_FIXUP_F32 vDst(VGPR151) src0(VGPR151) src1(VGPR147) src2(VGPR145) abs(0) clamp(0) omod(0) neg(0) // VOP3a V_DIV_FIXUP_F32 vDst(VGPR152) src0(VGPR152) src1(VGPR148) src2(VGPR146) abs(0) clamp(0) omod(0) neg(0) // VOP3a # 155: OpExtInst(Length): Float: tmp155 << tmp154 V_MUL_F32 vDst(VGPR153) src0(VGPR151) src1(VGPR151) // VOP2 V_MAC_F32 vDst(VGPR153) src0(VGPR152) src1(VGPR152) // VOP2 V_SQRT_F32 vDst(VGPR153) src0(VGPR153) # 157: OpAccessChain: Float*: p[2] # 158: OpLoad: Float: tmp158 << p[2] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR37) const: 0x0 V_MOVRELS_B32 vDst(VGPR154) src0(VGPR2) # 160: OpFDiv: Float: tmp160 << tmp158, const148 V_MOV_B32 vDst(VGPR155) src0(LITERAL_CONST) const: 0x3f333333 V_RCP_F32 vDst(VGPR156) src0(VGPR155) V_MUL_F32 vDst(VGPR156) src0(VGPR154) src1(VGPR156) // VOP2 V_DIV_FIXUP_F32 vDst(VGPR156) src0(VGPR156) src1(VGPR155) src2(VGPR154) abs(0) clamp(0) omod(0) neg(0) // VOP3a # 161: OpCompositeConstruct: FloatVector2: tmp161 << tmp155, tmp160 V_MOV_B32 vDst(VGPR157) src0(VGPR153) V_MOV_B32 vDst(VGPR158) src0(VGPR156) # 162: OpExtInst(FAbs): FloatVector2: tmp162 << tmp161 V_ADD_F32 vDst(VGPR159) src0(VGPR157) src1(0) src2(N/A) abs(1) clamp(0) omod(0) neg(0) // VOP3a V_ADD_F32 vDst(VGPR160) src0(VGPR158) src1(0) src2(N/A) abs(1) clamp(0) omod(0) neg(0) // VOP3a # 163: OpCompositeConstruct: FloatVector2: tmp163 << const54, const54 V_MOV_B32 vDst(VGPR161) src0(1_0_F) V_MOV_B32 vDst(VGPR162) src0(1_0_F) # 164: OpFSub: FloatVector2: tmp164 << tmp162, tmp163 V_SUB_F32 vDst(VGPR163) src0(VGPR159) src1(VGPR161) // VOP2 V_SUB_F32 vDst(VGPR164) src0(VGPR160) src1(VGPR162) // VOP2 # 165: OpAccessChain: Float*: d[0] # 166: OpCompositeExtract: Float: tmp166 << tmp164, 0 V_MOV_B32 vDst(VGPR165) src0(VGPR163) # 167: OpAccessChain: Float*: d[1] # 168: OpCompositeExtract: Float: tmp168 << tmp164, 1 V_MOV_B32 vDst(VGPR166) src0(VGPR164) # 169: OpExtInst(FMax): Float: tmp169 << tmp166, tmp168 V_MAX_F32 vDst(VGPR167) src0(VGPR165) src1(VGPR166) // VOP2 # 170: OpExtInst(FMin): Float: tmp170 << tmp169, const55 V_MOV_B32 vDst(VGPR168) src0(LITERAL_CONST) const: 0x00000000 V_MIN_F32 vDst(VGPR169) src0(VGPR167) src1(VGPR168) // VOP2 # 172: OpCompositeConstruct: FloatVector2: tmp172 << const55, const55 V_MOV_B32 vDst(VGPR172) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR170) src0(VGPR172) V_MOV_B32 vDst(VGPR173) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR171) src0(VGPR173) # 173: OpExtInst(FMax): FloatVector2: tmp173 << tmp164, tmp172 V_MAX_F32 vDst(VGPR174) src0(VGPR163) src1(VGPR170) // VOP2 V_MAX_F32 vDst(VGPR175) src0(VGPR164) src1(VGPR171) // VOP2 # 174: OpExtInst(Length): Float: tmp174 << tmp173 V_MUL_F32 vDst(VGPR176) src0(VGPR174) src1(VGPR174) // VOP2 V_MAC_F32 vDst(VGPR176) src0(VGPR175) src1(VGPR175) // VOP2 V_SQRT_F32 vDst(VGPR176) src0(VGPR176) # 175: OpFAdd: Float: tmp175 << tmp170, tmp174 V_ADD_F32 vDst(VGPR177) src0(VGPR169) src1(VGPR176) // VOP2 # OpReturnValue: : << tmp175 S_MOV_B32 sDst(M0) src0(SGPR36) V_MOVRELD_B32 vDst(VGPR0) src0(VGPR177) S_SETPC_B64 sDst(SGPR34) src0(SGPR34) # Float concav(vf3;(FloatVector3* p) Function: Float concav(vf3;() S_MOV_B64 sDst(SGPR44) src0(EXEC) # lb27 Label: lb27 # 182: OpLoad: FloatVector3: tmp182 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR43) const: 0x0 V_MOVRELS_B32 vDst(VGPR178) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR179) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR180) src0(VGPR2) # 183: OpVectorShuffle: FloatVector2: tmp183 << tmp182, tmp182, 0, 1 V_MOV_B32 vDst(VGPR181) src0(VGPR178) V_MOV_B32 vDst(VGPR182) src0(VGPR179) # 185: OpCompositeConstruct: FloatVector2: tmp185 << const179, const179 V_MOV_B32 vDst(VGPR185) src0(LITERAL_CONST) const: 0x40133333 V_MOV_B32 vDst(VGPR183) src0(VGPR185) V_MOV_B32 vDst(VGPR186) src0(LITERAL_CONST) const: 0x40133333 V_MOV_B32 vDst(VGPR184) src0(VGPR186) # 186: OpFDiv: FloatVector2: tmp186 << tmp183, tmp185 V_RCP_F32 vDst(VGPR187) src0(VGPR183) V_RCP_F32 vDst(VGPR188) src0(VGPR184) V_MUL_F32 vDst(VGPR187) src0(VGPR181) src1(VGPR187) // VOP2 V_MUL_F32 vDst(VGPR188) src0(VGPR182) src1(VGPR188) // VOP2 V_DIV_FIXUP_F32 vDst(VGPR187) src0(VGPR187) src1(VGPR183) src2(VGPR181) abs(0) clamp(0) omod(0) neg(0) // VOP3a V_DIV_FIXUP_F32 vDst(VGPR188) src0(VGPR188) src1(VGPR184) src2(VGPR182) abs(0) clamp(0) omod(0) neg(0) // VOP3a # 187: OpExtInst(Length): Float: tmp187 << tmp186 V_MUL_F32 vDst(VGPR189) src0(VGPR187) src1(VGPR187) // VOP2 V_MAC_F32 vDst(VGPR189) src0(VGPR188) src1(VGPR188) // VOP2 V_SQRT_F32 vDst(VGPR189) src0(VGPR189) # 188: OpAccessChain: Float*: p[2] # 189: OpLoad: Float: tmp189 << p[2] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR43) const: 0x0 V_MOVRELS_B32 vDst(VGPR190) src0(VGPR2) # 191: OpFDiv: Float: tmp191 << tmp189, const148 V_MOV_B32 vDst(VGPR191) src0(LITERAL_CONST) const: 0x3f333333 V_RCP_F32 vDst(VGPR192) src0(VGPR191) V_MUL_F32 vDst(VGPR192) src0(VGPR190) src1(VGPR192) // VOP2 V_DIV_FIXUP_F32 vDst(VGPR192) src0(VGPR192) src1(VGPR191) src2(VGPR190) abs(0) clamp(0) omod(0) neg(0) // VOP3a # 192: OpCompositeConstruct: FloatVector2: tmp192 << tmp187, tmp191 V_MOV_B32 vDst(VGPR193) src0(VGPR189) V_MOV_B32 vDst(VGPR194) src0(VGPR192) # 193: OpExtInst(FAbs): FloatVector2: tmp193 << tmp192 V_ADD_F32 vDst(VGPR195) src0(VGPR193) src1(0) src2(N/A) abs(1) clamp(0) omod(0) neg(0) // VOP3a V_ADD_F32 vDst(VGPR196) src0(VGPR194) src1(0) src2(N/A) abs(1) clamp(0) omod(0) neg(0) // VOP3a # 194: OpCompositeConstruct: FloatVector2: tmp194 << const54, const54 V_MOV_B32 vDst(VGPR197) src0(1_0_F) V_MOV_B32 vDst(VGPR198) src0(1_0_F) # 195: OpFSub: FloatVector2: tmp195 << tmp193, tmp194 V_SUB_F32 vDst(VGPR199) src0(VGPR195) src1(VGPR197) // VOP2 V_SUB_F32 vDst(VGPR200) src0(VGPR196) src1(VGPR198) // VOP2 # 196: OpAccessChain: Float*: d[0] # 197: OpCompositeExtract: Float: tmp197 << tmp195, 0 V_MOV_B32 vDst(VGPR201) src0(VGPR199) # 198: OpAccessChain: Float*: d[1] # 199: OpCompositeExtract: Float: tmp199 << tmp195, 1 V_MOV_B32 vDst(VGPR202) src0(VGPR200) # 200: OpExtInst(FMax): Float: tmp200 << tmp197, tmp199 V_MAX_F32 vDst(VGPR203) src0(VGPR201) src1(VGPR202) // VOP2 # 201: OpExtInst(FMin): Float: tmp201 << tmp200, const55 V_MOV_B32 vDst(VGPR204) src0(LITERAL_CONST) const: 0x00000000 V_MIN_F32 vDst(VGPR205) src0(VGPR203) src1(VGPR204) // VOP2 # 203: OpCompositeConstruct: FloatVector2: tmp203 << const55, const55 V_MOV_B32 vDst(VGPR208) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR206) src0(VGPR208) V_MOV_B32 vDst(VGPR209) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR207) src0(VGPR209) # 204: OpExtInst(FMax): FloatVector2: tmp204 << tmp195, tmp203 V_MAX_F32 vDst(VGPR210) src0(VGPR199) src1(VGPR206) // VOP2 V_MAX_F32 vDst(VGPR211) src0(VGPR200) src1(VGPR207) // VOP2 # 205: OpExtInst(Length): Float: tmp205 << tmp204 V_MUL_F32 vDst(VGPR212) src0(VGPR210) src1(VGPR210) // VOP2 V_MAC_F32 vDst(VGPR212) src0(VGPR211) src1(VGPR211) // VOP2 V_SQRT_F32 vDst(VGPR212) src0(VGPR212) # 206: OpFAdd: Float: tmp206 << tmp201, tmp205 V_ADD_F32 vDst(VGPR213) src0(VGPR205) src1(VGPR212) // VOP2 # OpReturnValue: : << tmp206 S_MOV_B32 sDst(M0) src0(SGPR42) V_MOVRELD_B32 vDst(VGPR0) src0(VGPR213) S_SETPC_B64 sDst(SGPR40) src0(SGPR40) # Float sceneSDF(vf3;(FloatVector3* p) Function: Float sceneSDF(vf3;() S_MOV_B64 sDst(SGPR50) src0(EXEC) # lb30 Label: lb30 # 210: OpAccessChain: Float*: p[2] # 211: OpLoad: Float: tmp211 << p[2] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR254) src0(VGPR2) # 212: OpFAdd: Float: tmp212 << tmp211, const209 V_MOV_B32 vDst(VGPR255) src0(LITERAL_CONST) const: 0x41200000 V_ADD_F32 vDst(VGPR256) src0(VGPR254) src1(VGPR255) // VOP2 # 213: OpAccessChain: Float*: p[2] # OpStore: : tmp212 >> p[2] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELD_B32 vDst(VGPR2) src0(VGPR256) # 217: OpLoad: Float: tmp217 << iTime S_LOAD_DWORD_IMM offset(0) sBase(SGPR[0:1]) sDst(SGPR52) S_WAITCNT 0 # OpStore: : tmp217 >> param216 V_MOV_B32 vDst(VGPR214) src0(SGPR52) # 218: OpFunctionCall: FloatMatrix2x2: rot(f1;(param216) S_ADD_U32 sDst(SGPR19) src0(LITERAL_CONST) src1(0) const: 0xd6 # VGPR214 S_MOV_B64 sDst(SGPR54) src0(EXEC) S_MOV_B32 sDst(SGPR18) src0(LITERAL_CONST) const: 0x101 # VGPR[257:260] # Indirect branch to rot(f1;: ??? S_GETPC_B64 sDst(SGPR16) src0(SGPR16) S_ADD_U32 sDst(SGPR16) src0(SGPR16) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR17) src0(SGPR17) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR16) src0(SGPR16) S_MOV_B64 sDst(EXEC) src0(SGPR54) # .lbl3 # 219: OpLoad: FloatVector3: tmp219 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR261) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR262) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR263) src0(VGPR2) # 220: OpVectorShuffle: FloatVector2: tmp220 << tmp219, tmp219, 0, 2 V_MOV_B32 vDst(VGPR264) src0(VGPR261) V_MOV_B32 vDst(VGPR265) src0(VGPR263) # 221: OpVectorTimesMatrix: FloatVector2: tmp221 << tmp220, rot(f1; V_MUL_F32 vDst(VGPR266) src0(VGPR264) src1(VGPR257) // VOP2 V_MUL_F32 vDst(VGPR267) src0(VGPR264) src1(VGPR259) // VOP2 V_MAC_F32 vDst(VGPR266) src0(VGPR265) src1(VGPR258) // VOP2 V_MAC_F32 vDst(VGPR267) src0(VGPR265) src1(VGPR260) // VOP2 # 222: OpLoad: FloatVector3: tmp222 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR268) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR269) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR270) src0(VGPR2) # 223: OpVectorShuffle: FloatVector3: tmp223 << tmp222, tmp221, 3, 1, 4 V_MOV_B32 vDst(VGPR271) src0(VGPR266) V_MOV_B32 vDst(VGPR272) src0(VGPR269) V_MOV_B32 vDst(VGPR273) src0(VGPR267) # OpStore: : tmp223 >> p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELD_B32 vDst(VGPR0) src0(VGPR271) V_MOVRELD_B32 vDst(VGPR1) src0(VGPR272) V_MOVRELD_B32 vDst(VGPR2) src0(VGPR273) # 225: OpLoad: Float: tmp225 << iTime S_LOAD_DWORD_IMM offset(0) sBase(SGPR[0:1]) sDst(SGPR56) S_WAITCNT 0 # 226: OpFMul: Float: tmp226 << const224, tmp225 V_MOV_B32 vDst(VGPR274) src0(LITERAL_CONST) const: 0x40266666 V_MOV_B32 vDst(VGPR275) src0(SGPR56) V_MUL_F32 vDst(VGPR276) src0(VGPR274) src1(VGPR275) // VOP2 # OpStore: : tmp226 >> param227 V_MOV_B32 vDst(VGPR215) src0(VGPR276) # 228: OpFunctionCall: FloatMatrix2x2: rot(f1;(param227) S_ADD_U32 sDst(SGPR19) src0(LITERAL_CONST) src1(0) const: 0xd7 # VGPR215 S_MOV_B64 sDst(SGPR58) src0(EXEC) S_MOV_B32 sDst(SGPR18) src0(LITERAL_CONST) const: 0x115 # VGPR[277:280] # Indirect branch to rot(f1;: ??? S_GETPC_B64 sDst(SGPR16) src0(SGPR16) S_ADD_U32 sDst(SGPR16) src0(SGPR16) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR17) src0(SGPR17) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR16) src0(SGPR16) S_MOV_B64 sDst(EXEC) src0(SGPR58) # .lbl4 # 229: OpLoad: FloatVector3: tmp229 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR281) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR282) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR283) src0(VGPR2) # 230: OpVectorShuffle: FloatVector2: tmp230 << tmp229, tmp229, 0, 1 V_MOV_B32 vDst(VGPR284) src0(VGPR281) V_MOV_B32 vDst(VGPR285) src0(VGPR282) # 231: OpVectorTimesMatrix: FloatVector2: tmp231 << tmp230, rot(f1; V_MUL_F32 vDst(VGPR286) src0(VGPR284) src1(VGPR277) // VOP2 V_MUL_F32 vDst(VGPR287) src0(VGPR284) src1(VGPR279) // VOP2 V_MAC_F32 vDst(VGPR286) src0(VGPR285) src1(VGPR278) // VOP2 V_MAC_F32 vDst(VGPR287) src0(VGPR285) src1(VGPR280) // VOP2 # 232: OpLoad: FloatVector3: tmp232 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR288) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR289) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR290) src0(VGPR2) # 233: OpVectorShuffle: FloatVector3: tmp233 << tmp232, tmp231, 3, 4, 2 V_MOV_B32 vDst(VGPR291) src0(VGPR286) V_MOV_B32 vDst(VGPR292) src0(VGPR287) V_MOV_B32 vDst(VGPR293) src0(VGPR290) # OpStore: : tmp233 >> p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELD_B32 vDst(VGPR0) src0(VGPR291) V_MOVRELD_B32 vDst(VGPR1) src0(VGPR292) V_MOVRELD_B32 vDst(VGPR2) src0(VGPR293) # OpStore: : const235 >> param238 V_MOV_B32 vDst(VGPR294) src0(LITERAL_CONST) const: 0x3f65c8fa V_MOV_B32 vDst(VGPR216) src0(VGPR294) # 240: OpFunctionCall: FloatMatrix2x2: rot(f1;(param238) S_ADD_U32 sDst(SGPR19) src0(LITERAL_CONST) src1(0) const: 0xd8 # VGPR216 S_MOV_B64 sDst(SGPR60) src0(EXEC) S_MOV_B32 sDst(SGPR18) src0(LITERAL_CONST) const: 0x127 # VGPR[295:298] # Indirect branch to rot(f1;: ??? S_GETPC_B64 sDst(SGPR16) src0(SGPR16) S_ADD_U32 sDst(SGPR16) src0(SGPR16) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR17) src0(SGPR17) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR16) src0(SGPR16) S_MOV_B64 sDst(EXEC) src0(SGPR60) # .lbl5 # 247: OpMatrixTimesVector: FloatVector2: tmp247 << rot(f1;, const243 V_MOV_B32 vDst(VGPR299) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR300) src0(LITERAL_CONST) const: 0xc0600000 V_MUL_F32 vDst(VGPR301) src0(VGPR295) src1(VGPR299) // VOP2 V_MUL_F32 vDst(VGPR302) src0(VGPR296) src1(VGPR299) // VOP2 V_MAC_F32 vDst(VGPR301) src0(VGPR297) src1(VGPR300) // VOP2 V_MAC_F32 vDst(VGPR302) src0(VGPR298) src1(VGPR300) // VOP2 # 251: OpMatrixTimesVector: FloatVector2: tmp251 << rot(f1;, tmp247 V_MUL_F32 vDst(VGPR303) src0(VGPR295) src1(VGPR301) // VOP2 V_MUL_F32 vDst(VGPR304) src0(VGPR296) src1(VGPR301) // VOP2 V_MAC_F32 vDst(VGPR303) src0(VGPR297) src1(VGPR302) // VOP2 V_MAC_F32 vDst(VGPR304) src0(VGPR298) src1(VGPR302) // VOP2 # 255: OpMatrixTimesVector: FloatVector2: tmp255 << rot(f1;, tmp251 V_MUL_F32 vDst(VGPR305) src0(VGPR295) src1(VGPR303) // VOP2 V_MUL_F32 vDst(VGPR306) src0(VGPR296) src1(VGPR303) // VOP2 V_MAC_F32 vDst(VGPR305) src0(VGPR297) src1(VGPR304) // VOP2 V_MAC_F32 vDst(VGPR306) src0(VGPR298) src1(VGPR304) // VOP2 # 259: OpMatrixTimesVector: FloatVector2: tmp259 << rot(f1;, tmp255 V_MUL_F32 vDst(VGPR307) src0(VGPR295) src1(VGPR305) // VOP2 V_MUL_F32 vDst(VGPR308) src0(VGPR296) src1(VGPR305) // VOP2 V_MAC_F32 vDst(VGPR307) src0(VGPR297) src1(VGPR306) // VOP2 V_MAC_F32 vDst(VGPR308) src0(VGPR298) src1(VGPR306) // VOP2 # 263: OpMatrixTimesVector: FloatVector2: tmp263 << rot(f1;, tmp259 V_MUL_F32 vDst(VGPR309) src0(VGPR295) src1(VGPR307) // VOP2 V_MUL_F32 vDst(VGPR310) src0(VGPR296) src1(VGPR307) // VOP2 V_MAC_F32 vDst(VGPR309) src0(VGPR297) src1(VGPR308) // VOP2 V_MAC_F32 vDst(VGPR310) src0(VGPR298) src1(VGPR308) // VOP2 # 267: OpMatrixTimesVector: FloatVector2: tmp267 << rot(f1;, tmp263 V_MUL_F32 vDst(VGPR311) src0(VGPR295) src1(VGPR309) // VOP2 V_MUL_F32 vDst(VGPR312) src0(VGPR296) src1(VGPR309) // VOP2 V_MAC_F32 vDst(VGPR311) src0(VGPR297) src1(VGPR310) // VOP2 V_MAC_F32 vDst(VGPR312) src0(VGPR298) src1(VGPR310) // VOP2 # 270: OpLoad: FloatVector3: tmp270 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR313) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR314) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR315) src0(VGPR2) # 273: OpCompositeExtract: Float: tmp273 << const243, 0 V_MOV_B32 vDst(VGPR317) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR316) src0(VGPR317) # 274: OpCompositeExtract: Float: tmp274 << const243, 1 V_MOV_B32 vDst(VGPR319) src0(LITERAL_CONST) const: 0xc0600000 V_MOV_B32 vDst(VGPR318) src0(VGPR320) # 275: OpCompositeConstruct: FloatVector3: tmp275 << tmp273, tmp274, const55 V_MOV_B32 vDst(VGPR320) src0(VGPR316) V_MOV_B32 vDst(VGPR321) src0(VGPR318) V_MOV_B32 vDst(VGPR323) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR322) src0(VGPR323) # 276: OpFAdd: FloatVector3: tmp276 << tmp270, tmp275 V_ADD_F32 vDst(VGPR324) src0(VGPR313) src1(VGPR320) // VOP2 V_ADD_F32 vDst(VGPR325) src0(VGPR314) src1(VGPR321) // VOP2 V_ADD_F32 vDst(VGPR326) src0(VGPR315) src1(VGPR322) // VOP2 # 278: OpFMul: Float: tmp278 << const55, const235 V_MOV_B32 vDst(VGPR327) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR328) src0(LITERAL_CONST) const: 0x3f65c8fa V_MUL_F32 vDst(VGPR329) src0(VGPR327) src1(VGPR328) // VOP2 # OpStore: : tmp276 >> param279 V_MOV_B32 vDst(VGPR218) src0(VGPR324) V_MOV_B32 vDst(VGPR219) src0(VGPR325) V_MOV_B32 vDst(VGPR220) src0(VGPR326) # OpStore: : tmp278 >> param280 V_MOV_B32 vDst(VGPR221) src0(VGPR329) # 281: OpFunctionCall: Float: blade(vf3;f1;(param279, param280) S_ADD_U32 sDst(SGPR25) src0(LITERAL_CONST) src1(0) const: 0xda # VGPR[218:220] S_ADD_U32 sDst(SGPR26) src0(LITERAL_CONST) src1(0) const: 0xdd # VGPR221 S_MOV_B64 sDst(SGPR62) src0(EXEC) S_MOV_B32 sDst(SGPR24) src0(LITERAL_CONST) const: 0x14a # VGPR330 # Indirect branch to blade(vf3;f1;: ??? S_GETPC_B64 sDst(SGPR22) src0(SGPR22) S_ADD_U32 sDst(SGPR22) src0(SGPR22) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR23) src0(SGPR23) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR22) src0(SGPR22) S_MOV_B64 sDst(EXEC) src0(SGPR62) # .lbl6 # 282: OpLoad: FloatVector3: tmp282 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR331) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR332) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR333) src0(VGPR2) # 285: OpCompositeExtract: Float: tmp285 << tmp247, 0 V_MOV_B32 vDst(VGPR334) src0(VGPR301) # 286: OpCompositeExtract: Float: tmp286 << tmp247, 1 V_MOV_B32 vDst(VGPR335) src0(VGPR302) # 287: OpCompositeConstruct: FloatVector3: tmp287 << tmp285, tmp286, const55 V_MOV_B32 vDst(VGPR336) src0(VGPR334) V_MOV_B32 vDst(VGPR337) src0(VGPR335) V_MOV_B32 vDst(VGPR339) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR338) src0(VGPR339) # 288: OpFAdd: FloatVector3: tmp288 << tmp282, tmp287 V_ADD_F32 vDst(VGPR340) src0(VGPR331) src1(VGPR336) // VOP2 V_ADD_F32 vDst(VGPR341) src0(VGPR332) src1(VGPR337) // VOP2 V_ADD_F32 vDst(VGPR342) src0(VGPR333) src1(VGPR338) // VOP2 # 290: OpFMul: Float: tmp290 << const54, const235 V_MOV_B32 vDst(VGPR343) src0(LITERAL_CONST) const: 0x3f65c8fa V_MUL_F32 vDst(VGPR344) src0(1_0_F) src1(VGPR343) // VOP2 # OpStore: : tmp288 >> param291 V_MOV_B32 vDst(VGPR222) src0(VGPR340) V_MOV_B32 vDst(VGPR223) src0(VGPR341) V_MOV_B32 vDst(VGPR224) src0(VGPR342) # OpStore: : tmp290 >> param292 V_MOV_B32 vDst(VGPR225) src0(VGPR344) # 293: OpFunctionCall: Float: blade(vf3;f1;(param291, param292) S_ADD_U32 sDst(SGPR25) src0(LITERAL_CONST) src1(0) const: 0xde # VGPR[222:224] S_ADD_U32 sDst(SGPR26) src0(LITERAL_CONST) src1(0) const: 0xe1 # VGPR225 S_MOV_B64 sDst(SGPR64) src0(EXEC) S_MOV_B32 sDst(SGPR24) src0(LITERAL_CONST) const: 0x159 # VGPR345 # Indirect branch to blade(vf3;f1;: ??? S_GETPC_B64 sDst(SGPR22) src0(SGPR22) S_ADD_U32 sDst(SGPR22) src0(SGPR22) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR23) src0(SGPR23) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR22) src0(SGPR22) S_MOV_B64 sDst(EXEC) src0(SGPR64) # .lbl7 # 294: OpExtInst(FMin): Float: tmp294 << blade(vf3;f1;, blade(vf3;f1; V_MIN_F32 vDst(VGPR346) src0(VGPR330) src1(VGPR345) // VOP2 # 295: OpLoad: FloatVector3: tmp295 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR347) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR348) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR349) src0(VGPR2) # 298: OpCompositeExtract: Float: tmp298 << tmp251, 0 V_MOV_B32 vDst(VGPR350) src0(VGPR303) # 299: OpCompositeExtract: Float: tmp299 << tmp251, 1 V_MOV_B32 vDst(VGPR351) src0(VGPR304) # 300: OpCompositeConstruct: FloatVector3: tmp300 << tmp298, tmp299, const55 V_MOV_B32 vDst(VGPR352) src0(VGPR350) V_MOV_B32 vDst(VGPR353) src0(VGPR351) V_MOV_B32 vDst(VGPR355) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR354) src0(VGPR355) # 301: OpFAdd: FloatVector3: tmp301 << tmp295, tmp300 V_ADD_F32 vDst(VGPR356) src0(VGPR347) src1(VGPR352) // VOP2 V_ADD_F32 vDst(VGPR357) src0(VGPR348) src1(VGPR353) // VOP2 V_ADD_F32 vDst(VGPR358) src0(VGPR349) src1(VGPR354) // VOP2 # 303: OpFMul: Float: tmp303 << const110, const235 V_MOV_B32 vDst(VGPR359) src0(LITERAL_CONST) const: 0x3f65c8fa V_MUL_F32 vDst(VGPR360) src0(2_0_F) src1(VGPR359) // VOP2 # OpStore: : tmp301 >> param304 V_MOV_B32 vDst(VGPR226) src0(VGPR356) V_MOV_B32 vDst(VGPR227) src0(VGPR357) V_MOV_B32 vDst(VGPR228) src0(VGPR358) # OpStore: : tmp303 >> param305 V_MOV_B32 vDst(VGPR229) src0(VGPR360) # 306: OpFunctionCall: Float: blade(vf3;f1;(param304, param305) S_ADD_U32 sDst(SGPR25) src0(LITERAL_CONST) src1(0) const: 0xe2 # VGPR[226:228] S_ADD_U32 sDst(SGPR26) src0(LITERAL_CONST) src1(0) const: 0xe5 # VGPR229 S_MOV_B64 sDst(SGPR66) src0(EXEC) S_MOV_B32 sDst(SGPR24) src0(LITERAL_CONST) const: 0x169 # VGPR361 # Indirect branch to blade(vf3;f1;: ??? S_GETPC_B64 sDst(SGPR22) src0(SGPR22) S_ADD_U32 sDst(SGPR22) src0(SGPR22) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR23) src0(SGPR23) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR22) src0(SGPR22) S_MOV_B64 sDst(EXEC) src0(SGPR66) # .lbl8 # 307: OpLoad: FloatVector3: tmp307 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR362) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR363) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR364) src0(VGPR2) # 310: OpCompositeExtract: Float: tmp310 << tmp255, 0 V_MOV_B32 vDst(VGPR365) src0(VGPR305) # 311: OpCompositeExtract: Float: tmp311 << tmp255, 1 V_MOV_B32 vDst(VGPR366) src0(VGPR306) # 312: OpCompositeConstruct: FloatVector3: tmp312 << tmp310, tmp311, const55 V_MOV_B32 vDst(VGPR367) src0(VGPR365) V_MOV_B32 vDst(VGPR368) src0(VGPR366) V_MOV_B32 vDst(VGPR370) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR369) src0(VGPR370) # 313: OpFAdd: FloatVector3: tmp313 << tmp307, tmp312 V_ADD_F32 vDst(VGPR371) src0(VGPR362) src1(VGPR367) // VOP2 V_ADD_F32 vDst(VGPR372) src0(VGPR363) src1(VGPR368) // VOP2 V_ADD_F32 vDst(VGPR373) src0(VGPR364) src1(VGPR369) // VOP2 # 315: OpFMul: Float: tmp315 << const93, const235 V_MOV_B32 vDst(VGPR374) src0(LITERAL_CONST) const: 0x40400000 V_MOV_B32 vDst(VGPR375) src0(LITERAL_CONST) const: 0x3f65c8fa V_MUL_F32 vDst(VGPR376) src0(VGPR374) src1(VGPR375) // VOP2 # OpStore: : tmp313 >> param316 V_MOV_B32 vDst(VGPR230) src0(VGPR371) V_MOV_B32 vDst(VGPR231) src0(VGPR372) V_MOV_B32 vDst(VGPR232) src0(VGPR373) # OpStore: : tmp315 >> param317 V_MOV_B32 vDst(VGPR233) src0(VGPR376) # 318: OpFunctionCall: Float: blade(vf3;f1;(param316, param317) S_ADD_U32 sDst(SGPR25) src0(LITERAL_CONST) src1(0) const: 0xe6 # VGPR[230:232] S_ADD_U32 sDst(SGPR26) src0(LITERAL_CONST) src1(0) const: 0xe9 # VGPR233 S_MOV_B64 sDst(SGPR68) src0(EXEC) S_MOV_B32 sDst(SGPR24) src0(LITERAL_CONST) const: 0x179 # VGPR377 # Indirect branch to blade(vf3;f1;: ??? S_GETPC_B64 sDst(SGPR22) src0(SGPR22) S_ADD_U32 sDst(SGPR22) src0(SGPR22) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR23) src0(SGPR23) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR22) src0(SGPR22) S_MOV_B64 sDst(EXEC) src0(SGPR68) # .lbl9 # 319: OpExtInst(FMin): Float: tmp319 << blade(vf3;f1;, blade(vf3;f1; V_MIN_F32 vDst(VGPR378) src0(VGPR361) src1(VGPR377) // VOP2 # 320: OpExtInst(FMin): Float: tmp320 << tmp294, tmp319 V_MIN_F32 vDst(VGPR379) src0(VGPR346) src1(VGPR378) // VOP2 # OpStore: : tmp320 >> d V_MOV_B32 vDst(VGPR217) src0(VGPR379) # 321: OpLoad: Float: tmp321 << d # 322: OpLoad: FloatVector3: tmp322 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR380) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR381) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR382) src0(VGPR2) # 325: OpCompositeExtract: Float: tmp325 << tmp259, 0 V_MOV_B32 vDst(VGPR383) src0(VGPR307) # 326: OpCompositeExtract: Float: tmp326 << tmp259, 1 V_MOV_B32 vDst(VGPR384) src0(VGPR308) # 327: OpCompositeConstruct: FloatVector3: tmp327 << tmp325, tmp326, const55 V_MOV_B32 vDst(VGPR385) src0(VGPR383) V_MOV_B32 vDst(VGPR386) src0(VGPR384) V_MOV_B32 vDst(VGPR388) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR387) src0(VGPR388) # 328: OpFAdd: FloatVector3: tmp328 << tmp322, tmp327 V_ADD_F32 vDst(VGPR389) src0(VGPR380) src1(VGPR385) // VOP2 V_ADD_F32 vDst(VGPR390) src0(VGPR381) src1(VGPR386) // VOP2 V_ADD_F32 vDst(VGPR391) src0(VGPR382) src1(VGPR387) // VOP2 # 331: OpFMul: Float: tmp331 << const329, const235 V_MOV_B32 vDst(VGPR392) src0(LITERAL_CONST) const: 0x3f65c8fa V_MUL_F32 vDst(VGPR393) src0(4_0_F) src1(VGPR392) // VOP2 # OpStore: : tmp328 >> param332 V_MOV_B32 vDst(VGPR234) src0(VGPR389) V_MOV_B32 vDst(VGPR235) src0(VGPR390) V_MOV_B32 vDst(VGPR236) src0(VGPR391) # OpStore: : tmp331 >> param333 V_MOV_B32 vDst(VGPR237) src0(VGPR393) # 334: OpFunctionCall: Float: blade(vf3;f1;(param332, param333) S_ADD_U32 sDst(SGPR25) src0(LITERAL_CONST) src1(0) const: 0xea # VGPR[234:236] S_ADD_U32 sDst(SGPR26) src0(LITERAL_CONST) src1(0) const: 0xed # VGPR237 S_MOV_B64 sDst(SGPR70) src0(EXEC) S_MOV_B32 sDst(SGPR24) src0(LITERAL_CONST) const: 0x18a # VGPR394 # Indirect branch to blade(vf3;f1;: ??? S_GETPC_B64 sDst(SGPR22) src0(SGPR22) S_ADD_U32 sDst(SGPR22) src0(SGPR22) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR23) src0(SGPR23) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR22) src0(SGPR22) S_MOV_B64 sDst(EXEC) src0(SGPR70) # .lbl10 # 335: OpExtInst(FMin): Float: tmp335 << tmp321, blade(vf3;f1; V_MIN_F32 vDst(VGPR395) src0(VGPR217) src1(VGPR394) // VOP2 # 336: OpLoad: FloatVector3: tmp336 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR396) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR397) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR398) src0(VGPR2) # 339: OpCompositeExtract: Float: tmp339 << tmp263, 0 V_MOV_B32 vDst(VGPR399) src0(VGPR309) # 340: OpCompositeExtract: Float: tmp340 << tmp263, 1 V_MOV_B32 vDst(VGPR400) src0(VGPR310) # 341: OpCompositeConstruct: FloatVector3: tmp341 << tmp339, tmp340, const55 V_MOV_B32 vDst(VGPR401) src0(VGPR399) V_MOV_B32 vDst(VGPR402) src0(VGPR400) V_MOV_B32 vDst(VGPR404) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR403) src0(VGPR404) # 342: OpFAdd: FloatVector3: tmp342 << tmp336, tmp341 V_ADD_F32 vDst(VGPR405) src0(VGPR396) src1(VGPR401) // VOP2 V_ADD_F32 vDst(VGPR406) src0(VGPR397) src1(VGPR402) // VOP2 V_ADD_F32 vDst(VGPR407) src0(VGPR398) src1(VGPR403) // VOP2 # 345: OpFMul: Float: tmp345 << const343, const235 V_MOV_B32 vDst(VGPR408) src0(LITERAL_CONST) const: 0x40a00000 V_MOV_B32 vDst(VGPR409) src0(LITERAL_CONST) const: 0x3f65c8fa V_MUL_F32 vDst(VGPR410) src0(VGPR408) src1(VGPR409) // VOP2 # OpStore: : tmp342 >> param346 V_MOV_B32 vDst(VGPR238) src0(VGPR405) V_MOV_B32 vDst(VGPR239) src0(VGPR406) V_MOV_B32 vDst(VGPR240) src0(VGPR407) # OpStore: : tmp345 >> param347 V_MOV_B32 vDst(VGPR241) src0(VGPR410) # 348: OpFunctionCall: Float: blade(vf3;f1;(param346, param347) S_ADD_U32 sDst(SGPR25) src0(LITERAL_CONST) src1(0) const: 0xee # VGPR[238:240] S_ADD_U32 sDst(SGPR26) src0(LITERAL_CONST) src1(0) const: 0xf1 # VGPR241 S_MOV_B64 sDst(SGPR72) src0(EXEC) S_MOV_B32 sDst(SGPR24) src0(LITERAL_CONST) const: 0x19b # VGPR411 # Indirect branch to blade(vf3;f1;: ??? S_GETPC_B64 sDst(SGPR22) src0(SGPR22) S_ADD_U32 sDst(SGPR22) src0(SGPR22) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR23) src0(SGPR23) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR22) src0(SGPR22) S_MOV_B64 sDst(EXEC) src0(SGPR72) # .lbl11 # 349: OpLoad: FloatVector3: tmp349 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR412) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR413) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR414) src0(VGPR2) # 352: OpCompositeExtract: Float: tmp352 << tmp267, 0 V_MOV_B32 vDst(VGPR415) src0(VGPR311) # 353: OpCompositeExtract: Float: tmp353 << tmp267, 1 V_MOV_B32 vDst(VGPR416) src0(VGPR312) # 354: OpCompositeConstruct: FloatVector3: tmp354 << tmp352, tmp353, const55 V_MOV_B32 vDst(VGPR417) src0(VGPR415) V_MOV_B32 vDst(VGPR418) src0(VGPR416) V_MOV_B32 vDst(VGPR420) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR419) src0(VGPR420) # 355: OpFAdd: FloatVector3: tmp355 << tmp349, tmp354 V_ADD_F32 vDst(VGPR421) src0(VGPR412) src1(VGPR417) // VOP2 V_ADD_F32 vDst(VGPR422) src0(VGPR413) src1(VGPR418) // VOP2 V_ADD_F32 vDst(VGPR423) src0(VGPR414) src1(VGPR419) // VOP2 # 358: OpFMul: Float: tmp358 << const356, const235 V_MOV_B32 vDst(VGPR424) src0(LITERAL_CONST) const: 0x40c00000 V_MOV_B32 vDst(VGPR425) src0(LITERAL_CONST) const: 0x3f65c8fa V_MUL_F32 vDst(VGPR426) src0(VGPR424) src1(VGPR425) // VOP2 # OpStore: : tmp355 >> param359 V_MOV_B32 vDst(VGPR242) src0(VGPR421) V_MOV_B32 vDst(VGPR243) src0(VGPR422) V_MOV_B32 vDst(VGPR244) src0(VGPR423) # OpStore: : tmp358 >> param360 V_MOV_B32 vDst(VGPR245) src0(VGPR426) # 361: OpFunctionCall: Float: blade(vf3;f1;(param359, param360) S_ADD_U32 sDst(SGPR25) src0(LITERAL_CONST) src1(0) const: 0xf2 # VGPR[242:244] S_ADD_U32 sDst(SGPR26) src0(LITERAL_CONST) src1(0) const: 0xf5 # VGPR245 S_MOV_B64 sDst(SGPR74) src0(EXEC) S_MOV_B32 sDst(SGPR24) src0(LITERAL_CONST) const: 0x1ab # VGPR427 # Indirect branch to blade(vf3;f1;: ??? S_GETPC_B64 sDst(SGPR22) src0(SGPR22) S_ADD_U32 sDst(SGPR22) src0(SGPR22) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR23) src0(SGPR23) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR22) src0(SGPR22) S_MOV_B64 sDst(EXEC) src0(SGPR74) # .lbl12 # 362: OpExtInst(FMin): Float: tmp362 << blade(vf3;f1;, blade(vf3;f1; V_MIN_F32 vDst(VGPR428) src0(VGPR411) src1(VGPR427) // VOP2 # 363: OpExtInst(FMin): Float: tmp363 << tmp335, tmp362 V_MIN_F32 vDst(VGPR429) src0(VGPR395) src1(VGPR428) // VOP2 # OpStore: : tmp363 >> d V_MOV_B32 vDst(VGPR217) src0(VGPR429) # 364: OpLoad: Float: tmp364 << d # 365: OpLoad: FloatVector3: tmp365 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR430) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR431) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR432) src0(VGPR2) # 367: OpFAdd: Float: tmp367 << const148, const55 V_MOV_B32 vDst(VGPR433) src0(LITERAL_CONST) const: 0x3f333333 V_MOV_B32 vDst(VGPR434) src0(LITERAL_CONST) const: 0x00000000 V_ADD_F32 vDst(VGPR435) src0(VGPR433) src1(VGPR434) // VOP2 # 368: OpCompositeConstruct: FloatVector3: tmp368 << const55, const55, tmp367 V_MOV_B32 vDst(VGPR439) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR436) src0(VGPR439) V_MOV_B32 vDst(VGPR440) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR437) src0(VGPR440) V_MOV_B32 vDst(VGPR438) src0(VGPR435) # 369: OpFAdd: FloatVector3: tmp369 << tmp365, tmp368 V_ADD_F32 vDst(VGPR441) src0(VGPR430) src1(VGPR436) // VOP2 V_ADD_F32 vDst(VGPR442) src0(VGPR431) src1(VGPR437) // VOP2 V_ADD_F32 vDst(VGPR443) src0(VGPR432) src1(VGPR438) // VOP2 # OpStore: : tmp369 >> param370 V_MOV_B32 vDst(VGPR246) src0(VGPR441) V_MOV_B32 vDst(VGPR247) src0(VGPR442) V_MOV_B32 vDst(VGPR248) src0(VGPR443) # 371: OpFunctionCall: Float: centre(vf3;(param370) S_ADD_U32 sDst(SGPR37) src0(LITERAL_CONST) src1(0) const: 0xf6 # VGPR[246:248] S_MOV_B64 sDst(SGPR76) src0(EXEC) S_MOV_B32 sDst(SGPR36) src0(LITERAL_CONST) const: 0x1bc # VGPR444 # Indirect branch to centre(vf3;: ??? S_GETPC_B64 sDst(SGPR34) src0(SGPR34) S_ADD_U32 sDst(SGPR34) src0(SGPR34) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR35) src0(SGPR35) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR34) src0(SGPR34) S_MOV_B64 sDst(EXEC) src0(SGPR76) # .lbl13 # 372: OpExtInst(FMin): Float: tmp372 << tmp364, centre(vf3; V_MIN_F32 vDst(VGPR445) src0(VGPR217) src1(VGPR444) // VOP2 # OpStore: : tmp372 >> d V_MOV_B32 vDst(VGPR217) src0(VGPR445) # 373: OpLoad: Float: tmp373 << d # 374: OpLoad: FloatVector3: tmp374 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR446) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR447) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR448) src0(VGPR2) # 376: OpFAdd: Float: tmp376 << const54, const55 V_MOV_B32 vDst(VGPR449) src0(LITERAL_CONST) const: 0x00000000 V_ADD_F32 vDst(VGPR450) src0(1_0_F) src1(VGPR449) // VOP2 # 377: OpCompositeConstruct: FloatVector3: tmp377 << const55, const55, tmp376 V_MOV_B32 vDst(VGPR454) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR451) src0(VGPR454) V_MOV_B32 vDst(VGPR455) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR452) src0(VGPR455) V_MOV_B32 vDst(VGPR453) src0(VGPR450) # 378: OpFAdd: FloatVector3: tmp378 << tmp374, tmp377 V_ADD_F32 vDst(VGPR456) src0(VGPR446) src1(VGPR451) // VOP2 V_ADD_F32 vDst(VGPR457) src0(VGPR447) src1(VGPR452) // VOP2 V_ADD_F32 vDst(VGPR458) src0(VGPR448) src1(VGPR453) // VOP2 # OpStore: : tmp378 >> param379 V_MOV_B32 vDst(VGPR249) src0(VGPR456) V_MOV_B32 vDst(VGPR250) src0(VGPR457) V_MOV_B32 vDst(VGPR251) src0(VGPR458) # 380: OpFunctionCall: Float: concav(vf3;(param379) S_ADD_U32 sDst(SGPR43) src0(LITERAL_CONST) src1(0) const: 0xf9 # VGPR[249:251] S_MOV_B64 sDst(SGPR78) src0(EXEC) S_MOV_B32 sDst(SGPR42) src0(LITERAL_CONST) const: 0x1cb # VGPR459 # Indirect branch to concav(vf3;: ??? S_GETPC_B64 sDst(SGPR40) src0(SGPR40) S_ADD_U32 sDst(SGPR40) src0(SGPR40) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR41) src0(SGPR41) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR40) src0(SGPR40) S_MOV_B64 sDst(EXEC) src0(SGPR78) # .lbl14 # 381: OpFNegate: Float: tmp381 << concav(vf3; V_MUL_F32 vDst(VGPR460) src0(M1_0_F) src1(VGPR459) // VOP2 # 382: OpExtInst(FMax): Float: tmp382 << tmp373, tmp381 V_MAX_F32 vDst(VGPR461) src0(VGPR217) src1(VGPR460) // VOP2 # OpStore: : tmp382 >> d V_MOV_B32 vDst(VGPR217) src0(VGPR461) # OpStore: : const387 >> param388 V_MOV_B32 vDst(VGPR462) src0(LITERAL_CONST) const: 0x40060a92 V_MOV_B32 vDst(VGPR252) src0(VGPR462) # 389: OpFunctionCall: FloatMatrix2x2: rot(f1;(param388) S_ADD_U32 sDst(SGPR19) src0(LITERAL_CONST) src1(0) const: 0xfc # VGPR252 S_MOV_B64 sDst(SGPR80) src0(EXEC) S_MOV_B32 sDst(SGPR18) src0(LITERAL_CONST) const: 0x1cf # VGPR[463:466] # Indirect branch to rot(f1;: ??? S_GETPC_B64 sDst(SGPR16) src0(SGPR16) S_ADD_U32 sDst(SGPR16) src0(SGPR16) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR17) src0(SGPR17) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR16) src0(SGPR16) S_MOV_B64 sDst(EXEC) src0(SGPR80) # .lbl15 # 391: OpMatrixTimesVector: FloatVector2: tmp391 << rot(f1;, const385 V_MOV_B32 vDst(VGPR467) src0(LITERAL_CONST) const: 0x3e4ccccd V_MOV_B32 vDst(VGPR468) src0(LITERAL_CONST) const: 0x3e4ccccd V_MUL_F32 vDst(VGPR469) src0(VGPR463) src1(VGPR467) // VOP2 V_MUL_F32 vDst(VGPR470) src0(VGPR464) src1(VGPR467) // VOP2 V_MAC_F32 vDst(VGPR469) src0(VGPR465) src1(VGPR468) // VOP2 V_MAC_F32 vDst(VGPR470) src0(VGPR466) src1(VGPR468) // VOP2 # OpStore: : const387 >> param393 V_MOV_B32 vDst(VGPR471) src0(LITERAL_CONST) const: 0x40060a92 V_MOV_B32 vDst(VGPR253) src0(VGPR471) # 394: OpFunctionCall: FloatMatrix2x2: rot(f1;(param393) S_ADD_U32 sDst(SGPR19) src0(LITERAL_CONST) src1(0) const: 0xfd # VGPR253 S_MOV_B64 sDst(SGPR82) src0(EXEC) S_MOV_B32 sDst(SGPR18) src0(LITERAL_CONST) const: 0x1d8 # VGPR[472:475] # Indirect branch to rot(f1;: ??? S_GETPC_B64 sDst(SGPR16) src0(SGPR16) S_ADD_U32 sDst(SGPR16) src0(SGPR16) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR17) src0(SGPR17) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR16) src0(SGPR16) S_MOV_B64 sDst(EXEC) src0(SGPR82) # .lbl16 # 396: OpMatrixTimesVector: FloatVector2: tmp396 << rot(f1;, tmp391 V_MUL_F32 vDst(VGPR476) src0(VGPR472) src1(VGPR469) // VOP2 V_MUL_F32 vDst(VGPR477) src0(VGPR473) src1(VGPR469) // VOP2 V_MAC_F32 vDst(VGPR476) src0(VGPR474) src1(VGPR470) // VOP2 V_MAC_F32 vDst(VGPR477) src0(VGPR475) src1(VGPR470) // VOP2 # 398: OpLoad: FloatVector3: tmp398 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR478) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR479) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR480) src0(VGPR2) # 401: OpFAdd: Float: tmp401 << const55, const55 V_MOV_B32 vDst(VGPR481) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR482) src0(LITERAL_CONST) const: 0x00000000 V_ADD_F32 vDst(VGPR483) src0(VGPR481) src1(VGPR482) // VOP2 # 402: OpCompositeExtract: Float: tmp402 << const385, 0 V_MOV_B32 vDst(VGPR485) src0(LITERAL_CONST) const: 0x3e4ccccd V_MOV_B32 vDst(VGPR484) src0(VGPR485) # 403: OpCompositeExtract: Float: tmp403 << const385, 1 V_MOV_B32 vDst(VGPR487) src0(LITERAL_CONST) const: 0x3e4ccccd V_MOV_B32 vDst(VGPR486) src0(VGPR488) # 404: OpCompositeConstruct: FloatVector3: tmp404 << tmp402, tmp403, tmp401 V_MOV_B32 vDst(VGPR488) src0(VGPR484) V_MOV_B32 vDst(VGPR489) src0(VGPR486) V_MOV_B32 vDst(VGPR490) src0(VGPR483) # 405: OpFAdd: FloatVector3: tmp405 << tmp398, tmp404 V_ADD_F32 vDst(VGPR491) src0(VGPR478) src1(VGPR488) // VOP2 V_ADD_F32 vDst(VGPR492) src0(VGPR479) src1(VGPR489) // VOP2 V_ADD_F32 vDst(VGPR493) src0(VGPR480) src1(VGPR490) // VOP2 # 406: OpExtInst(Length): Float: tmp406 << tmp405 V_MUL_F32 vDst(VGPR494) src0(VGPR491) src1(VGPR491) // VOP2 V_MAC_F32 vDst(VGPR494) src0(VGPR492) src1(VGPR492) // VOP2 V_MAC_F32 vDst(VGPR494) src0(VGPR493) src1(VGPR493) // VOP2 V_SQRT_F32 vDst(VGPR494) src0(VGPR494) # 407: OpFSub: Float: tmp407 << tmp406, const384 V_MOV_B32 vDst(VGPR495) src0(LITERAL_CONST) const: 0x3e4ccccd V_SUB_F32 vDst(VGPR496) src0(VGPR494) src1(VGPR495) // VOP2 # 408: OpLoad: FloatVector3: tmp408 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR497) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR498) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR499) src0(VGPR2) # 411: OpFAdd: Float: tmp411 << const55, const55 V_MOV_B32 vDst(VGPR500) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR501) src0(LITERAL_CONST) const: 0x00000000 V_ADD_F32 vDst(VGPR502) src0(VGPR500) src1(VGPR501) // VOP2 # 412: OpCompositeExtract: Float: tmp412 << tmp391, 0 V_MOV_B32 vDst(VGPR503) src0(VGPR469) # 413: OpCompositeExtract: Float: tmp413 << tmp391, 1 V_MOV_B32 vDst(VGPR504) src0(VGPR470) # 414: OpCompositeConstruct: FloatVector3: tmp414 << tmp412, tmp413, tmp411 V_MOV_B32 vDst(VGPR505) src0(VGPR503) V_MOV_B32 vDst(VGPR506) src0(VGPR504) V_MOV_B32 vDst(VGPR507) src0(VGPR502) # 415: OpFAdd: FloatVector3: tmp415 << tmp408, tmp414 V_ADD_F32 vDst(VGPR508) src0(VGPR497) src1(VGPR505) // VOP2 V_ADD_F32 vDst(VGPR509) src0(VGPR498) src1(VGPR506) // VOP2 V_ADD_F32 vDst(VGPR510) src0(VGPR499) src1(VGPR507) // VOP2 # 416: OpExtInst(Length): Float: tmp416 << tmp415 V_MUL_F32 vDst(VGPR511) src0(VGPR508) src1(VGPR508) // VOP2 V_MAC_F32 vDst(VGPR511) src0(VGPR509) src1(VGPR509) // VOP2 V_MAC_F32 vDst(VGPR511) src0(VGPR510) src1(VGPR510) // VOP2 V_SQRT_F32 vDst(VGPR511) src0(VGPR511) # 417: OpFSub: Float: tmp417 << tmp416, const384 V_MOV_B32 vDst(VGPR512) src0(LITERAL_CONST) const: 0x3e4ccccd V_SUB_F32 vDst(VGPR513) src0(VGPR511) src1(VGPR512) // VOP2 # 418: OpExtInst(FMin): Float: tmp418 << tmp407, tmp417 V_MIN_F32 vDst(VGPR514) src0(VGPR496) src1(VGPR513) // VOP2 # 419: OpLoad: FloatVector3: tmp419 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR49) const: 0x0 V_MOVRELS_B32 vDst(VGPR515) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR516) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR517) src0(VGPR2) # 422: OpFAdd: Float: tmp422 << const55, const55 V_MOV_B32 vDst(VGPR518) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR519) src0(LITERAL_CONST) const: 0x00000000 V_ADD_F32 vDst(VGPR520) src0(VGPR518) src1(VGPR519) // VOP2 # 423: OpCompositeExtract: Float: tmp423 << tmp396, 0 V_MOV_B32 vDst(VGPR521) src0(VGPR476) # 424: OpCompositeExtract: Float: tmp424 << tmp396, 1 V_MOV_B32 vDst(VGPR522) src0(VGPR477) # 425: OpCompositeConstruct: FloatVector3: tmp425 << tmp423, tmp424, tmp422 V_MOV_B32 vDst(VGPR523) src0(VGPR521) V_MOV_B32 vDst(VGPR524) src0(VGPR522) V_MOV_B32 vDst(VGPR525) src0(VGPR520) # 426: OpFAdd: FloatVector3: tmp426 << tmp419, tmp425 V_ADD_F32 vDst(VGPR526) src0(VGPR515) src1(VGPR523) // VOP2 V_ADD_F32 vDst(VGPR527) src0(VGPR516) src1(VGPR524) // VOP2 V_ADD_F32 vDst(VGPR528) src0(VGPR517) src1(VGPR525) // VOP2 # 427: OpExtInst(Length): Float: tmp427 << tmp426 V_MUL_F32 vDst(VGPR529) src0(VGPR526) src1(VGPR526) // VOP2 V_MAC_F32 vDst(VGPR529) src0(VGPR527) src1(VGPR527) // VOP2 V_MAC_F32 vDst(VGPR529) src0(VGPR528) src1(VGPR528) // VOP2 V_SQRT_F32 vDst(VGPR529) src0(VGPR529) # 428: OpFSub: Float: tmp428 << tmp427, const384 V_MOV_B32 vDst(VGPR530) src0(LITERAL_CONST) const: 0x3e4ccccd V_SUB_F32 vDst(VGPR531) src0(VGPR529) src1(VGPR530) // VOP2 # 429: OpExtInst(FMin): Float: tmp429 << tmp418, tmp428 V_MIN_F32 vDst(VGPR532) src0(VGPR514) src1(VGPR531) // VOP2 # 430: OpLoad: Float: tmp430 << d # 432: OpFNegate: Float: tmp432 << tmp429 V_MUL_F32 vDst(VGPR533) src0(M1_0_F) src1(VGPR532) // VOP2 # 433: OpExtInst(FMax): Float: tmp433 << tmp430, tmp432 V_MAX_F32 vDst(VGPR534) src0(VGPR217) src1(VGPR533) // VOP2 # OpStore: : tmp433 >> d V_MOV_B32 vDst(VGPR217) src0(VGPR534) # 434: OpLoad: Float: tmp434 << d # OpReturnValue: : << tmp434 S_MOV_B32 sDst(M0) src0(SGPR48) V_MOVRELD_B32 vDst(VGPR0) src0(VGPR217) S_SETPC_B64 sDst(SGPR46) src0(SGPR46) # FloatVector3 estimateNormal(vf3;(FloatVector3* p) Function: FloatVector3 estimateNormal(vf3;() S_MOV_B64 sDst(SGPR88) src0(EXEC) # lb34 Label: lb34 # 437: OpAccessChain: Float*: p[0] # 438: OpLoad: Float: tmp438 << p[0] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR553) src0(VGPR0) # 440: OpFAdd: Float: tmp440 << tmp438, const439 V_MOV_B32 vDst(VGPR554) src0(LITERAL_CONST) const: 0x3d4ccccd V_ADD_F32 vDst(VGPR555) src0(VGPR553) src1(VGPR554) // VOP2 # 441: OpAccessChain: Float*: p[1] # 442: OpLoad: Float: tmp442 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR556) src0(VGPR1) # 443: OpAccessChain: Float*: p[2] # 444: OpLoad: Float: tmp444 << p[2] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR557) src0(VGPR2) # 445: OpCompositeConstruct: FloatVector3: tmp445 << tmp440, tmp442, tmp444 V_MOV_B32 vDst(VGPR558) src0(VGPR555) V_MOV_B32 vDst(VGPR559) src0(VGPR556) V_MOV_B32 vDst(VGPR560) src0(VGPR557) # OpStore: : tmp445 >> param446 V_MOV_B32 vDst(VGPR535) src0(VGPR558) V_MOV_B32 vDst(VGPR536) src0(VGPR559) V_MOV_B32 vDst(VGPR537) src0(VGPR560) # 447: OpFunctionCall: Float: sceneSDF(vf3;(param446) S_ADD_U32 sDst(SGPR49) src0(LITERAL_CONST) src1(0) const: 0x217 # VGPR[535:537] S_MOV_B64 sDst(SGPR90) src0(EXEC) S_MOV_B32 sDst(SGPR48) src0(LITERAL_CONST) const: 0x231 # VGPR561 # Indirect branch to sceneSDF(vf3;: ??? S_GETPC_B64 sDst(SGPR46) src0(SGPR46) S_ADD_U32 sDst(SGPR46) src0(SGPR46) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR47) src0(SGPR47) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR46) src0(SGPR46) S_MOV_B64 sDst(EXEC) src0(SGPR90) # .lbl17 # 448: OpAccessChain: Float*: p[0] # 449: OpLoad: Float: tmp449 << p[0] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR562) src0(VGPR0) # 450: OpFSub: Float: tmp450 << tmp449, const439 V_MOV_B32 vDst(VGPR563) src0(LITERAL_CONST) const: 0x3d4ccccd V_SUB_F32 vDst(VGPR564) src0(VGPR562) src1(VGPR563) // VOP2 # 451: OpAccessChain: Float*: p[1] # 452: OpLoad: Float: tmp452 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR565) src0(VGPR1) # 453: OpAccessChain: Float*: p[2] # 454: OpLoad: Float: tmp454 << p[2] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR566) src0(VGPR2) # 455: OpCompositeConstruct: FloatVector3: tmp455 << tmp450, tmp452, tmp454 V_MOV_B32 vDst(VGPR567) src0(VGPR564) V_MOV_B32 vDst(VGPR568) src0(VGPR565) V_MOV_B32 vDst(VGPR569) src0(VGPR566) # OpStore: : tmp455 >> param456 V_MOV_B32 vDst(VGPR538) src0(VGPR567) V_MOV_B32 vDst(VGPR539) src0(VGPR568) V_MOV_B32 vDst(VGPR540) src0(VGPR569) # 457: OpFunctionCall: Float: sceneSDF(vf3;(param456) S_ADD_U32 sDst(SGPR49) src0(LITERAL_CONST) src1(0) const: 0x21a # VGPR[538:540] S_MOV_B64 sDst(SGPR92) src0(EXEC) S_MOV_B32 sDst(SGPR48) src0(LITERAL_CONST) const: 0x23a # VGPR570 # Indirect branch to sceneSDF(vf3;: ??? S_GETPC_B64 sDst(SGPR46) src0(SGPR46) S_ADD_U32 sDst(SGPR46) src0(SGPR46) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR47) src0(SGPR47) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR46) src0(SGPR46) S_MOV_B64 sDst(EXEC) src0(SGPR92) # .lbl18 # 458: OpFSub: Float: tmp458 << sceneSDF(vf3;, sceneSDF(vf3; V_SUB_F32 vDst(VGPR571) src0(VGPR561) src1(VGPR570) // VOP2 # 459: OpAccessChain: Float*: p[0] # 460: OpLoad: Float: tmp460 << p[0] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR572) src0(VGPR0) # 461: OpAccessChain: Float*: p[1] # 462: OpLoad: Float: tmp462 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR573) src0(VGPR1) # 463: OpFAdd: Float: tmp463 << tmp462, const439 V_MOV_B32 vDst(VGPR574) src0(LITERAL_CONST) const: 0x3d4ccccd V_ADD_F32 vDst(VGPR575) src0(VGPR573) src1(VGPR574) // VOP2 # 464: OpAccessChain: Float*: p[2] # 465: OpLoad: Float: tmp465 << p[2] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR576) src0(VGPR2) # 466: OpCompositeConstruct: FloatVector3: tmp466 << tmp460, tmp463, tmp465 V_MOV_B32 vDst(VGPR577) src0(VGPR572) V_MOV_B32 vDst(VGPR578) src0(VGPR575) V_MOV_B32 vDst(VGPR579) src0(VGPR576) # OpStore: : tmp466 >> param467 V_MOV_B32 vDst(VGPR541) src0(VGPR577) V_MOV_B32 vDst(VGPR542) src0(VGPR578) V_MOV_B32 vDst(VGPR543) src0(VGPR579) # 468: OpFunctionCall: Float: sceneSDF(vf3;(param467) S_ADD_U32 sDst(SGPR49) src0(LITERAL_CONST) src1(0) const: 0x21d # VGPR[541:543] S_MOV_B64 sDst(SGPR94) src0(EXEC) S_MOV_B32 sDst(SGPR48) src0(LITERAL_CONST) const: 0x244 # VGPR580 # Indirect branch to sceneSDF(vf3;: ??? S_GETPC_B64 sDst(SGPR46) src0(SGPR46) S_ADD_U32 sDst(SGPR46) src0(SGPR46) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR47) src0(SGPR47) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR46) src0(SGPR46) S_MOV_B64 sDst(EXEC) src0(SGPR94) # .lbl19 # 469: OpAccessChain: Float*: p[0] # 470: OpLoad: Float: tmp470 << p[0] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR581) src0(VGPR0) # 471: OpAccessChain: Float*: p[1] # 472: OpLoad: Float: tmp472 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR582) src0(VGPR1) # 473: OpFSub: Float: tmp473 << tmp472, const439 V_MOV_B32 vDst(VGPR583) src0(LITERAL_CONST) const: 0x3d4ccccd V_SUB_F32 vDst(VGPR584) src0(VGPR582) src1(VGPR583) // VOP2 # 474: OpAccessChain: Float*: p[2] # 475: OpLoad: Float: tmp475 << p[2] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR585) src0(VGPR2) # 476: OpCompositeConstruct: FloatVector3: tmp476 << tmp470, tmp473, tmp475 V_MOV_B32 vDst(VGPR586) src0(VGPR581) V_MOV_B32 vDst(VGPR587) src0(VGPR584) V_MOV_B32 vDst(VGPR588) src0(VGPR585) # OpStore: : tmp476 >> param477 V_MOV_B32 vDst(VGPR544) src0(VGPR586) V_MOV_B32 vDst(VGPR545) src0(VGPR587) V_MOV_B32 vDst(VGPR546) src0(VGPR588) # 478: OpFunctionCall: Float: sceneSDF(vf3;(param477) S_ADD_U32 sDst(SGPR49) src0(LITERAL_CONST) src1(0) const: 0x220 # VGPR[544:546] S_MOV_B64 sDst(SGPR96) src0(EXEC) S_MOV_B32 sDst(SGPR48) src0(LITERAL_CONST) const: 0x24d # VGPR589 # Indirect branch to sceneSDF(vf3;: ??? S_GETPC_B64 sDst(SGPR46) src0(SGPR46) S_ADD_U32 sDst(SGPR46) src0(SGPR46) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR47) src0(SGPR47) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR46) src0(SGPR46) S_MOV_B64 sDst(EXEC) src0(SGPR96) # .lbl20 # 479: OpFSub: Float: tmp479 << sceneSDF(vf3;, sceneSDF(vf3; V_SUB_F32 vDst(VGPR590) src0(VGPR580) src1(VGPR589) // VOP2 # 480: OpAccessChain: Float*: p[0] # 481: OpLoad: Float: tmp481 << p[0] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR591) src0(VGPR0) # 482: OpAccessChain: Float*: p[1] # 483: OpLoad: Float: tmp483 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR592) src0(VGPR1) # 484: OpAccessChain: Float*: p[2] # 485: OpLoad: Float: tmp485 << p[2] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR593) src0(VGPR2) # 486: OpFAdd: Float: tmp486 << tmp485, const439 V_MOV_B32 vDst(VGPR594) src0(LITERAL_CONST) const: 0x3d4ccccd V_ADD_F32 vDst(VGPR595) src0(VGPR593) src1(VGPR594) // VOP2 # 487: OpCompositeConstruct: FloatVector3: tmp487 << tmp481, tmp483, tmp486 V_MOV_B32 vDst(VGPR596) src0(VGPR591) V_MOV_B32 vDst(VGPR597) src0(VGPR592) V_MOV_B32 vDst(VGPR598) src0(VGPR595) # OpStore: : tmp487 >> param488 V_MOV_B32 vDst(VGPR547) src0(VGPR596) V_MOV_B32 vDst(VGPR548) src0(VGPR597) V_MOV_B32 vDst(VGPR549) src0(VGPR598) # 489: OpFunctionCall: Float: sceneSDF(vf3;(param488) S_ADD_U32 sDst(SGPR49) src0(LITERAL_CONST) src1(0) const: 0x223 # VGPR[547:549] S_MOV_B64 sDst(SGPR98) src0(EXEC) S_MOV_B32 sDst(SGPR48) src0(LITERAL_CONST) const: 0x257 # VGPR599 # Indirect branch to sceneSDF(vf3;: ??? S_GETPC_B64 sDst(SGPR46) src0(SGPR46) S_ADD_U32 sDst(SGPR46) src0(SGPR46) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR47) src0(SGPR47) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR46) src0(SGPR46) S_MOV_B64 sDst(EXEC) src0(SGPR98) # .lbl21 # 490: OpAccessChain: Float*: p[0] # 491: OpLoad: Float: tmp491 << p[0] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR600) src0(VGPR0) # 492: OpAccessChain: Float*: p[1] # 493: OpLoad: Float: tmp493 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR601) src0(VGPR1) # 494: OpAccessChain: Float*: p[2] # 495: OpLoad: Float: tmp495 << p[2] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR87) const: 0x0 V_MOVRELS_B32 vDst(VGPR602) src0(VGPR2) # 496: OpFSub: Float: tmp496 << tmp495, const439 V_MOV_B32 vDst(VGPR603) src0(LITERAL_CONST) const: 0x3d4ccccd V_SUB_F32 vDst(VGPR604) src0(VGPR602) src1(VGPR603) // VOP2 # 497: OpCompositeConstruct: FloatVector3: tmp497 << tmp491, tmp493, tmp496 V_MOV_B32 vDst(VGPR605) src0(VGPR600) V_MOV_B32 vDst(VGPR606) src0(VGPR601) V_MOV_B32 vDst(VGPR607) src0(VGPR604) # OpStore: : tmp497 >> param498 V_MOV_B32 vDst(VGPR550) src0(VGPR605) V_MOV_B32 vDst(VGPR551) src0(VGPR606) V_MOV_B32 vDst(VGPR552) src0(VGPR607) # 499: OpFunctionCall: Float: sceneSDF(vf3;(param498) S_ADD_U32 sDst(SGPR49) src0(LITERAL_CONST) src1(0) const: 0x226 # VGPR[550:552] S_MOV_B64 sDst(SGPR100) src0(EXEC) S_MOV_B32 sDst(SGPR48) src0(LITERAL_CONST) const: 0x260 # VGPR608 # Indirect branch to sceneSDF(vf3;: ??? S_GETPC_B64 sDst(SGPR46) src0(SGPR46) S_ADD_U32 sDst(SGPR46) src0(SGPR46) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR47) src0(SGPR47) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR46) src0(SGPR46) S_MOV_B64 sDst(EXEC) src0(SGPR100) # .lbl22 # 500: OpFSub: Float: tmp500 << sceneSDF(vf3;, sceneSDF(vf3; V_SUB_F32 vDst(VGPR609) src0(VGPR599) src1(VGPR608) // VOP2 # 501: OpCompositeConstruct: FloatVector3: tmp501 << tmp458, tmp479, tmp500 V_MOV_B32 vDst(VGPR610) src0(VGPR571) V_MOV_B32 vDst(VGPR611) src0(VGPR590) V_MOV_B32 vDst(VGPR612) src0(VGPR609) # 502: OpExtInst(Normalize): FloatVector3: tmp502 << tmp501 V_MUL_F32 vDst(VGPR613) src0(VGPR610) src1(VGPR610) // VOP2 V_MAC_F32 vDst(VGPR613) src0(VGPR611) src1(VGPR611) // VOP2 V_MAC_F32 vDst(VGPR613) src0(VGPR612) src1(VGPR612) // VOP2 V_RSQ_CLAMP_F32 vDst(VGPR613) src0(VGPR613) V_MUL_F32 vDst(VGPR614) src0(VGPR610) src1(VGPR613) // VOP2 V_MUL_F32 vDst(VGPR615) src0(VGPR611) src1(VGPR613) // VOP2 V_MUL_F32 vDst(VGPR616) src0(VGPR612) src1(VGPR613) // VOP2 # OpReturnValue: : << tmp502 S_MOV_B32 sDst(M0) src0(SGPR86) V_MOVRELD_B32 vDst(VGPR0) src0(VGPR614) V_MOVRELD_B32 vDst(VGPR1) src0(VGPR615) V_MOVRELD_B32 vDst(VGPR2) src0(VGPR616) S_SETPC_B64 sDst(SGPR84) src0(SGPR84) # Void mainImage(vf4;vf2;(FloatVector4* fragColor, FloatVector2* fragCoord) Function: Void mainImage(vf4;vf2;(, FloatVector2 main.fragCoord) S_MOV_B64 sDst(SGPR102) src0(EXEC) # lb42 Label: lb42 # 506: OpLoad: FloatVector2: tmp506 << fragCoord S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR13) const: 0x0 V_MOVRELS_B32 vDst(VGPR630) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR631) src0(VGPR1) # 510: OpLoad: FloatVector3: tmp510 << iResolution S_LOAD_DWORDX2_IMM offset(4) sBase(SGPR[0:1]) sDst(SGPR[104:105]) S_WAITCNT 0 S_LOAD_DWORD_IMM offset(12) sBase(SGPR[0:1]) sDst(SGPR106) S_WAITCNT 0 # 511: OpVectorShuffle: FloatVector2: tmp511 << tmp510, tmp510, 0, 1 V_MOV_B32 vDst(VGPR632) src0(SGPR104) V_MOV_B32 vDst(VGPR633) src0(SGPR105) # 512: OpVectorTimesScalar: FloatVector2: tmp512 << tmp511, const507 V_MOV_B32 vDst(VGPR636) src0(0_5_F) V_MUL_F32 vDst(VGPR634) src0(VGPR636) src1(VGPR632) // VOP2 V_MUL_F32 vDst(VGPR635) src0(VGPR636) src1(VGPR633) // VOP2 # 513: OpFSub: FloatVector2: tmp513 << tmp506, tmp512 V_SUB_F32 vDst(VGPR637) src0(VGPR630) src1(VGPR634) // VOP2 V_SUB_F32 vDst(VGPR638) src0(VGPR631) src1(VGPR635) // VOP2 # OpStore: : tmp513 >> uv V_MOV_B32 vDst(VGPR617) src0(VGPR637) V_MOV_B32 vDst(VGPR618) src0(VGPR638) # 514: OpAccessChain: Float*: iResolution[1] # 515: OpLoad: Float: tmp515 << iResolution[1] S_LOAD_DWORD_IMM offset(8) sBase(SGPR[0:1]) sDst(SGPR107) S_WAITCNT 0 # 516: OpFDiv: Float: tmp516 << const110, tmp515 V_MOV_B32 vDst(VGPR639) src0(SGPR107) V_RCP_F32 vDst(VGPR640) src0(VGPR639) V_MUL_F32 vDst(VGPR640) src0(2_0_F) src1(VGPR640) // VOP2 V_DIV_FIXUP_F32 vDst(VGPR640) src0(VGPR640) src1(VGPR639) src2(2_0_F) abs(0) clamp(0) omod(0) neg(0) // VOP3a # 517: OpLoad: FloatVector2: tmp517 << uv # 518: OpVectorTimesScalar: FloatVector2: tmp518 << tmp517, tmp516 V_MUL_F32 vDst(VGPR641) src0(VGPR640) src1(VGPR617) // VOP2 V_MUL_F32 vDst(VGPR642) src0(VGPR640) src1(VGPR618) // VOP2 # OpStore: : tmp518 >> uv V_MOV_B32 vDst(VGPR617) src0(VGPR641) V_MOV_B32 vDst(VGPR618) src0(VGPR642) # 519: OpLoad: FloatVector2: tmp519 << uv # 520: OpVectorTimesScalar: FloatVector2: tmp520 << tmp519, const329 V_MOV_B32 vDst(VGPR645) src0(4_0_F) V_MUL_F32 vDst(VGPR643) src0(VGPR645) src1(VGPR617) // VOP2 V_MUL_F32 vDst(VGPR644) src0(VGPR645) src1(VGPR618) // VOP2 # OpStore: : tmp520 >> uv V_MOV_B32 vDst(VGPR617) src0(VGPR643) V_MOV_B32 vDst(VGPR618) src0(VGPR644) # 525: OpExtInst(Tan): Float: tmp525 << const522 V_MOV_B32 vDst(VGPR646) src0(LITERAL_CONST) const: 0x3e20d97c V_MUL_F32 vDst(VGPR647) src0(LITERAL_CONST) src1(VGPR646) // VOP2 const: 0x3e22f983 V_SIN_F32 vDst(VGPR648) src0(VGPR647) V_COS_F32 vDst(VGPR647) src0(VGPR647) V_RCP_F32 vDst(VGPR649) src0(VGPR647) V_MUL_F32 vDst(VGPR649) src0(VGPR648) src1(VGPR649) // VOP2 V_DIV_FIXUP_F32 vDst(VGPR649) src0(VGPR649) src1(VGPR647) src2(VGPR648) abs(0) clamp(0) omod(0) neg(0) // VOP3a # 526: OpFDiv: Float: tmp526 << const54, tmp525 V_RCP_F32 vDst(VGPR650) src0(VGPR649) V_MUL_F32 vDst(VGPR650) src0(1_0_F) src1(VGPR650) // VOP2 V_DIV_FIXUP_F32 vDst(VGPR650) src0(VGPR650) src1(VGPR649) src2(1_0_F) abs(0) clamp(0) omod(0) neg(0) // VOP3a # 527: OpFAdd: Float: tmp527 << const54, tmp526 V_ADD_F32 vDst(VGPR651) src0(1_0_F) src1(VGPR650) // VOP2 # 528: OpFMul: Float: tmp528 << const54, tmp527 V_MUL_F32 vDst(VGPR652) src0(1_0_F) src1(VGPR651) // VOP2 # 529: OpCompositeConstruct: FloatVector3: tmp529 << const55, const55, tmp528 V_MOV_B32 vDst(VGPR656) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR653) src0(VGPR656) V_MOV_B32 vDst(VGPR657) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR654) src0(VGPR657) V_MOV_B32 vDst(VGPR655) src0(VGPR652) # OpStore: : tmp529 >> ray V_MOV_B32 vDst(VGPR619) src0(VGPR653) V_MOV_B32 vDst(VGPR620) src0(VGPR654) V_MOV_B32 vDst(VGPR621) src0(VGPR655) # 533: OpLoad: FloatVector2: tmp533 << uv # 534: OpCompositeExtract: Float: tmp534 << tmp533, 0 V_MOV_B32 vDst(VGPR658) src0(VGPR617) # 535: OpCompositeExtract: Float: tmp535 << tmp533, 1 V_MOV_B32 vDst(VGPR659) src0(VGPR618) # 536: OpCompositeConstruct: FloatVector3: tmp536 << tmp534, tmp535, const55 V_MOV_B32 vDst(VGPR660) src0(VGPR658) V_MOV_B32 vDst(VGPR661) src0(VGPR659) V_MOV_B32 vDst(VGPR663) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR662) src0(VGPR663) # 538: OpFSub: FloatVector3: tmp538 << tmp536, tmp529 V_SUB_F32 vDst(VGPR664) src0(VGPR660) src1(VGPR653) // VOP2 V_SUB_F32 vDst(VGPR665) src0(VGPR661) src1(VGPR654) // VOP2 V_SUB_F32 vDst(VGPR666) src0(VGPR662) src1(VGPR655) // VOP2 # 539: OpExtInst(Normalize): FloatVector3: tmp539 << tmp538 V_MUL_F32 vDst(VGPR667) src0(VGPR664) src1(VGPR664) // VOP2 V_MAC_F32 vDst(VGPR667) src0(VGPR665) src1(VGPR665) // VOP2 V_MAC_F32 vDst(VGPR667) src0(VGPR666) src1(VGPR666) // VOP2 V_RSQ_CLAMP_F32 vDst(VGPR667) src0(VGPR667) V_MUL_F32 vDst(VGPR668) src0(VGPR664) src1(VGPR667) // VOP2 V_MUL_F32 vDst(VGPR669) src0(VGPR665) src1(VGPR667) // VOP2 V_MUL_F32 vDst(VGPR670) src0(VGPR666) src1(VGPR667) // VOP2 # OpStore: : const55 >> shade V_MOV_B32 vDst(VGPR671) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR622) src0(VGPR671) # OpStore: : const549 >> i V_MOV_B32 vDst(VGPR623) src0(0) # OpBranch: to lb550 # lb550 Label: lb550 # OpLoopMerge: (merge: lb552, continue: lb553) # CF Block: Merge: lb552, Continue: lb553 S_MOV_B64 sDst(SGPR108) src0(EXEC) S_MOV_B64 sDst(SGPR110) src0(EXEC) S_MOV_B64 sDst(SGPR112) src0(EXEC) Label: lb550Loop # OpBranch: to lb554 # lb554 Label: lb554 # 555: OpLoad: Int: tmp555 << i Decorators: RelaxedPrecision # 558: OpSLessThan: Bool: tmp558 << tmp555, const556 V_MOV_B32 vDst(VGPR672) src0(LITERAL_CONST) const: 0x00000064 V_CMP_LT_I32 dst(SGPR114) src0(VGPR623) src1(VGPR672) // VOP3a # OpBranchConditional: if(tmp558) then branch to lb551, else branch to lb552 # CF Block: Cond Branch: true: lb551, false: lb552 S_AND_B64 sDst(EXEC) src0(SGPR114) src1(EXEC) S_CBRANCH_EXECZ ??? lb552 # lb551 Label: lb551 S_MOV_B64 sDst(SGPR110) src0(EXEC) S_MOV_B64 sDst(SGPR112) src0(EXEC) # 561: OpLoad: FloatVector3: tmp561 << ray # OpStore: : tmp561 >> param560 V_MOV_B32 vDst(VGPR624) src0(VGPR619) V_MOV_B32 vDst(VGPR625) src0(VGPR620) V_MOV_B32 vDst(VGPR626) src0(VGPR621) # 562: OpFunctionCall: Float: sceneSDF(vf3;(param560) S_ADD_U32 sDst(SGPR49) src0(LITERAL_CONST) src1(0) const: 0x270 # VGPR[624:626] S_MOV_B64 sDst(SGPR116) src0(EXEC) S_MOV_B32 sDst(SGPR48) src0(LITERAL_CONST) const: 0x2a1 # VGPR673 # Indirect branch to sceneSDF(vf3;: ??? S_GETPC_B64 sDst(SGPR46) src0(SGPR46) S_ADD_U32 sDst(SGPR46) src0(SGPR46) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR47) src0(SGPR47) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR46) src0(SGPR46) S_MOV_B64 sDst(EXEC) src0(SGPR116) # .lbl23 # 565: OpFOrdLessThan: Bool: tmp565 << sceneSDF(vf3;, const564 V_MOV_B32 vDst(VGPR674) src0(LITERAL_CONST) const: 0x3ba3d70a V_CMP_LT_F32 dst(SGPR118) src0(VGPR673) src1(VGPR674) // VOP3a # OpSelectionMerge: (merge: lb567) # CF Block: Merge: lb567 S_MOV_B64 sDst(SGPR120) src0(EXEC) # OpBranchConditional: if(tmp565) then branch to lb566, else branch to lb604 # CF Block: Cond Branch: true: lb566, false: lb604 S_AND_B64 sDst(EXEC) src0(SGPR118) src1(EXEC) S_CBRANCH_EXECZ ??? lb604 # lb566 Label: lb566 # 570: OpLoad: FloatVector3: tmp570 << ray # OpStore: : tmp570 >> param569 V_MOV_B32 vDst(VGPR627) src0(VGPR619) V_MOV_B32 vDst(VGPR628) src0(VGPR620) V_MOV_B32 vDst(VGPR629) src0(VGPR621) # 571: OpFunctionCall: FloatVector3: estimateNormal(vf3;(param569) S_ADD_U32 sDst(SGPR87) src0(LITERAL_CONST) src1(0) const: 0x273 # VGPR[627:629] S_MOV_B64 sDst(SGPR122) src0(EXEC) S_MOV_B32 sDst(SGPR86) src0(LITERAL_CONST) const: 0x2a3 # VGPR[675:677] # Indirect branch to estimateNormal(vf3;: ??? S_GETPC_B64 sDst(SGPR84) src0(SGPR84) S_ADD_U32 sDst(SGPR84) src0(SGPR84) src1(LITERAL_CONST) const: 0x0 S_ADDC_U32 sDst(SGPR85) src0(SGPR85) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR84) src0(SGPR84) S_MOV_B64 sDst(EXEC) src0(SGPR122) # .lbl24 # 575: OpDot: Float: tmp575 << const543, estimateNormal(vf3; V_MOV_B32 vDst(VGPR678) src0(LITERAL_CONST) const: 0x3ed105ec V_MOV_B32 vDst(VGPR679) src0(LITERAL_CONST) const: 0x3ed105ec V_MOV_B32 vDst(VGPR680) src0(LITERAL_CONST) const: 0x3f5105ec V_MUL_F32 vDst(VGPR681) src0(VGPR678) src1(VGPR675) // VOP2 V_MAC_F32 vDst(VGPR681) src0(VGPR679) src1(VGPR676) // VOP2 V_MAC_F32 vDst(VGPR681) src0(VGPR680) src1(VGPR677) // VOP2 # 578: OpFSub: Float: tmp578 << tmp575, const54 V_MOV_B32 vDst(VGPR682) src0(1_0_F) V_SUB_F32 vDst(VGPR683) src0(VGPR681) src1(VGPR682) // VOP2 # 581: OpFMul: Float: tmp581 << const579, tmp575 V_MOV_B32 vDst(VGPR684) src0(LITERAL_CONST) const: 0x3f4ccccd V_MUL_F32 vDst(VGPR685) src0(VGPR684) src1(VGPR681) // VOP2 # 582: OpLoad: Float: tmp582 << shade # 583: OpFAdd: Float: tmp583 << tmp582, tmp581 V_ADD_F32 vDst(VGPR686) src0(VGPR622) src1(VGPR685) // VOP2 # OpStore: : tmp583 >> shade V_MOV_B32 vDst(VGPR622) src0(VGPR686) # 585: OpFNegate: Float: tmp585 << tmp575 V_MUL_F32 vDst(VGPR687) src0(M1_0_F) src1(VGPR681) // VOP2 # 587: OpFMul: Float: tmp587 << tmp585, tmp575 V_MUL_F32 vDst(VGPR688) src0(VGPR687) src1(VGPR681) // VOP2 # 588: OpFMul: Float: tmp588 << tmp587, const209 V_MOV_B32 vDst(VGPR689) src0(LITERAL_CONST) const: 0x41200000 V_MUL_F32 vDst(VGPR690) src0(VGPR688) src1(VGPR689) // VOP2 # 589: OpExtInst(Exp): Float: tmp589 << tmp588 V_MOV_B32 vDst(VGPR692) src0(LITERAL_CONST) const: 0x3fb8aa3b V_MUL_F32 vDst(VGPR691) src0(VGPR690) src1(VGPR692) // VOP2 V_EXP_F32 vDst(VGPR691) src0(VGPR691) # 590: OpExtInst(FClamp): Float: tmp590 << tmp589, const55, const54 V_MOV_B32 vDst(VGPR693) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR694) src0(1_0_F) V_MAX_F32 vDst(VGPR695) src0(VGPR691) src1(VGPR693) // VOP2 V_MIN_F32 vDst(VGPR695) src0(VGPR695) src1(VGPR694) // VOP2 # 591: OpLoad: Float: tmp591 << shade # 592: OpFAdd: Float: tmp592 << tmp591, tmp590 V_ADD_F32 vDst(VGPR696) src0(VGPR622) src1(VGPR695) // VOP2 # OpStore: : tmp592 >> shade V_MOV_B32 vDst(VGPR622) src0(VGPR696) # 594: OpFNegate: Float: tmp594 << tmp578 V_MUL_F32 vDst(VGPR697) src0(M1_0_F) src1(VGPR683) // VOP2 # 596: OpFMul: Float: tmp596 << tmp594, tmp578 V_MUL_F32 vDst(VGPR698) src0(VGPR697) src1(VGPR683) // VOP2 # 598: OpFMul: Float: tmp598 << tmp596, const597 V_MOV_B32 vDst(VGPR699) src0(LITERAL_CONST) const: 0x461c4000 V_MUL_F32 vDst(VGPR700) src0(VGPR698) src1(VGPR699) // VOP2 # 599: OpExtInst(Exp): Float: tmp599 << tmp598 V_MOV_B32 vDst(VGPR702) src0(LITERAL_CONST) const: 0x3fb8aa3b V_MUL_F32 vDst(VGPR701) src0(VGPR700) src1(VGPR702) // VOP2 V_EXP_F32 vDst(VGPR701) src0(VGPR701) # 600: OpExtInst(FClamp): Float: tmp600 << tmp599, const55, const54 V_MOV_B32 vDst(VGPR703) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR704) src0(1_0_F) V_MAX_F32 vDst(VGPR705) src0(VGPR701) src1(VGPR703) // VOP2 V_MIN_F32 vDst(VGPR705) src0(VGPR705) src1(VGPR704) // VOP2 # 601: OpLoad: Float: tmp601 << shade # 602: OpFAdd: Float: tmp602 << tmp601, tmp600 V_ADD_F32 vDst(VGPR706) src0(VGPR622) src1(VGPR705) // VOP2 # OpStore: : tmp602 >> shade V_MOV_B32 vDst(VGPR622) src0(VGPR706) # OpBranch: to lb552 S_ANDN2_B64 sDst(SGPR110) src0(SGPR110) src1(EXEC) S_ANDN2_B64 sDst(SGPR112) src0(SGPR112) src1(EXEC) S_AND_B64 sDst(EXEC) src0(SGPR112) src1(EXEC) # lb604 Label: lb604 S_ANDN2_B64 sDst(EXEC) src0(SGPR120) src1(EXEC) S_AND_B64 sDst(EXEC) src0(EXEC) src1(SGPR112) S_CBRANCH_EXECZ ??? lb567 # 605: OpLoad: FloatVector3: tmp605 << ray # 606: OpExtInst(Length): Float: tmp606 << tmp605 V_MUL_F32 vDst(VGPR707) src0(VGPR619) src1(VGPR619) // VOP2 V_MAC_F32 vDst(VGPR707) src0(VGPR620) src1(VGPR620) // VOP2 V_MAC_F32 vDst(VGPR707) src0(VGPR621) src1(VGPR621) // VOP2 V_SQRT_F32 vDst(VGPR707) src0(VGPR707) # 608: OpFOrdGreaterThan: Bool: tmp608 << tmp606, const607 V_MOV_B32 vDst(VGPR708) src0(LITERAL_CONST) const: 0x41f00000 V_CMP_GT_F32 dst(SGPR124) src0(VGPR707) src1(VGPR708) // VOP3a # OpSelectionMerge: (merge: lb610) # CF Block: Merge: lb610 S_MOV_B64 sDst(SGPR126) src0(EXEC) # OpBranchConditional: if(tmp608) then branch to lb609, else branch to lb610 # CF Block: Cond Branch: true: lb609, false: lb610 S_AND_B64 sDst(EXEC) src0(SGPR124) src1(EXEC) S_CBRANCH_EXECZ ??? lb610 # lb609 Label: lb609 # OpBranch: to lb552 S_ANDN2_B64 sDst(SGPR110) src0(SGPR110) src1(EXEC) S_ANDN2_B64 sDst(SGPR112) src0(SGPR112) src1(EXEC) S_AND_B64 sDst(EXEC) src0(SGPR112) src1(EXEC) # lb610 Label: lb610 # CF Merge Point: Restore EXEC. S_MOV_B64 sDst(EXEC) src0(SGPR126) S_AND_B64 sDst(EXEC) src0(EXEC) src1(SGPR112) # OpBranch: to lb567 # lb567 Label: lb567 # CF Merge Point: Restore EXEC. S_MOV_B64 sDst(EXEC) src0(SGPR120) S_AND_B64 sDst(EXEC) src0(EXEC) src1(SGPR112) # 614: OpVectorTimesScalar: FloatVector3: tmp614 << tmp539, const612 V_MOV_B32 vDst(VGPR712) src0(LITERAL_CONST) const: 0x3f35c28f V_MUL_F32 vDst(VGPR709) src0(VGPR712) src1(VGPR668) // VOP2 V_MUL_F32 vDst(VGPR710) src0(VGPR712) src1(VGPR669) // VOP2 V_MUL_F32 vDst(VGPR711) src0(VGPR712) src1(VGPR670) // VOP2 # 616: OpVectorTimesScalar: FloatVector3: tmp616 << tmp614, sceneSDF(vf3; V_MUL_F32 vDst(VGPR713) src0(VGPR673) src1(VGPR709) // VOP2 V_MUL_F32 vDst(VGPR714) src0(VGPR673) src1(VGPR710) // VOP2 V_MUL_F32 vDst(VGPR715) src0(VGPR673) src1(VGPR711) // VOP2 # 617: OpLoad: FloatVector3: tmp617 << ray # 618: OpFAdd: FloatVector3: tmp618 << tmp617, tmp616 V_ADD_F32 vDst(VGPR716) src0(VGPR619) src1(VGPR713) // VOP2 V_ADD_F32 vDst(VGPR717) src0(VGPR620) src1(VGPR714) // VOP2 V_ADD_F32 vDst(VGPR718) src0(VGPR621) src1(VGPR715) // VOP2 # OpStore: : tmp618 >> ray V_MOV_B32 vDst(VGPR619) src0(VGPR716) V_MOV_B32 vDst(VGPR620) src0(VGPR717) V_MOV_B32 vDst(VGPR621) src0(VGPR718) # OpBranch: to lb553 # lb553 Label: lb553 # CF Continue Point: Restore EXEC. S_MOV_B64 sDst(EXEC) src0(SGPR110) # 619: OpLoad: Int: tmp619 << i Decorators: RelaxedPrecision # 621: OpIAdd: Int: tmp621 << tmp619, const620 Decorators: RelaxedPrecision V_MOV_B32 vDst(VGPR719) src0(1_INT) V_ADD_I32 vDst(VGPR720) src0(VGPR623) src1(VGPR719) // VOP2 # OpStore: : tmp621 >> i V_MOV_B32 vDst(VGPR623) src0(VGPR720) # OpBranch: to lb550 S_BRANCH ??? lb550Loop # lb552 Label: lb552 # CF Merge Point: Restore EXEC. S_MOV_B64 sDst(EXEC) src0(SGPR108) S_AND_B64 sDst(EXEC) src0(EXEC) src1(SGPR102) # 624: OpLoad: Float: tmp624 << shade # 625: OpVectorTimesScalar: FloatVector4: tmp625 << const623, tmp624 V_MOV_B32 vDst(VGPR725) src0(1_0_F) V_MOV_B32 vDst(VGPR726) src0(LITERAL_CONST) const: 0x3f666666 V_MOV_B32 vDst(VGPR727) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR728) src0(LITERAL_CONST) const: 0x00000000 V_MUL_F32 vDst(VGPR721) src0(VGPR622) src1(VGPR725) // VOP2 V_MUL_F32 vDst(VGPR722) src0(VGPR622) src1(VGPR726) // VOP2 V_MUL_F32 vDst(VGPR723) src0(VGPR622) src1(VGPR727) // VOP2 V_MUL_F32 vDst(VGPR724) src0(VGPR622) src1(VGPR728) // VOP2 # OpStore: : tmp625 >> fragColor S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR12) const: 0x0 V_MOVRELD_B32 vDst(VGPR0) src0(VGPR721) V_MOVRELD_B32 vDst(VGPR1) src0(VGPR722) V_MOVRELD_B32 vDst(VGPR2) src0(VGPR723) V_MOVRELD_B32 vDst(VGPR3) src0(VGPR724) # OpReturn: S_SETPC_B64 sDst(SGPR10) src0(SGPR10) Performing register allocation... Register VGPR[24:27] contains scalar/constant data. Will try converting to SGPR. Register VGPR[28:29] contains scalar/constant data. Will try converting to SGPR. Register VGPR68 contains scalar/constant data. Will try converting to SGPR. Register VGPR68 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR69) src0(VGPR68) src1(VGPR67) // VOP2 Register VGPR72 contains scalar/constant data. Will try converting to SGPR. Register VGPR72 can't be converted to SGPR, because the following instruction can't be converted: V_ADD_F32 vDst(VGPR73) src0(VGPR72) src1(VGPR71) // VOP2 Register VGPR74 contains scalar/constant data. Will try converting to SGPR. Register VGPR74 can't be converted to SGPR, because the following instruction can't be converted: V_MAX_F32 vDst(VGPR76) src0(VGPR73) src1(VGPR74) // VOP2 Register VGPR75 contains scalar/constant data. Will try converting to SGPR. Register VGPR75 can't be converted to SGPR, because the following instruction can't be converted: V_MIN_F32 vDst(VGPR76) src0(VGPR76) src1(VGPR75) // VOP2 Register VGPR96 contains scalar/constant data. Will try converting to SGPR. Register VGPR96 can't be converted to SGPR, because the following instruction can't be converted: V_SUB_F32 vDst(VGPR97) src0(VGPR95) src1(VGPR96) // VOP2 Register VGPR99 contains scalar/constant data. Will try converting to SGPR. Register VGPR99 can't be converted to SGPR, because the following instruction can't be converted: V_SUB_F32 vDst(VGPR100) src0(VGPR98) src1(VGPR99) // VOP2 Register VGPR101 contains scalar/constant data. Will try converting to SGPR. Register VGPR101 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR102) src0(VGPR101) src1(VGPR97) // VOP2 Register VGPR104 contains scalar/constant data. Will try converting to SGPR. Register VGPR104 can't be converted to SGPR, because the following instruction can't be converted: V_ADD_F32 vDst(VGPR105) src0(VGPR104) src1(VGPR103) // VOP2 Register VGPR106 contains scalar/constant data. Will try converting to SGPR. Register VGPR106 can't be converted to SGPR, because the following instruction can't be converted: V_MAX_F32 vDst(VGPR108) src0(VGPR105) src1(VGPR106) // VOP2 Register VGPR107 contains scalar/constant data. Will try converting to SGPR. Register VGPR107 can't be converted to SGPR, because the following instruction can't be converted: V_MIN_F32 vDst(VGPR108) src0(VGPR108) src1(VGPR107) // VOP2 Register VGPR109 contains scalar/constant data. Will try converting to SGPR. Register VGPR109 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR110) src0(VGPR109) src1(VGPR100) // VOP2 Register VGPR113 contains scalar/constant data. Will try converting to SGPR. Register VGPR113 can't be converted to SGPR, because the following instruction can't be converted: V_MAX_F32 vDst(VGPR115) src0(VGPR112) src1(VGPR113) // VOP2 Register VGPR114 contains scalar/constant data. Will try converting to SGPR. Register VGPR114 can't be converted to SGPR, because the following instruction can't be converted: V_MIN_F32 vDst(VGPR115) src0(VGPR115) src1(VGPR114) // VOP2 Register VGPR124 contains scalar/constant data. Will try converting to SGPR. Register VGPR124 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR125) src0(VGPR124) src1(VGPR123) // VOP2 Register VGPR128 contains scalar/constant data. Will try converting to SGPR. Register VGPR128 can't be converted to SGPR, because the following instruction can't be converted: V_SUB_F32 vDst(VGPR129) src0(VGPR128) src1(VGPR127) // VOP2 Register VGPR130 contains scalar/constant data. Will try converting to SGPR. Register VGPR130 can't be converted to SGPR, because the following instruction can't be converted: V_MAX_F32 vDst(VGPR131) src0(VGPR122) src1(VGPR130) // VOP2 Register VGPR135 contains scalar/constant data. Will try converting to SGPR. Register VGPR140 contains scalar/constant data. Will try converting to SGPR. Register VGPR140 can't be converted to SGPR, because the following instruction can't be converted: V_SUB_F32 vDst(VGPR141) src0(VGPR139) src1(VGPR140) // VOP2 Register VGPR[147:148] contains scalar/constant data. Will try converting to SGPR. Register VGPR[147:148] can't be converted to SGPR, because the following instruction can't be converted: V_RCP_F32 vDst(VGPR151) src0(VGPR147) Register VGPR149 contains scalar/constant data. Will try converting to SGPR. Register VGPR150 contains scalar/constant data. Will try converting to SGPR. Register VGPR155 contains scalar/constant data. Will try converting to SGPR. Register VGPR155 can't be converted to SGPR, because the following instruction can't be converted: V_RCP_F32 vDst(VGPR156) src0(VGPR155) Register VGPR[161:162] contains scalar/constant data. Will try converting to SGPR. Register VGPR[161:162] can't be converted to SGPR, because the following instruction can't be converted: V_SUB_F32 vDst(VGPR163) src0(VGPR159) src1(VGPR161) // VOP2 Register VGPR168 contains scalar/constant data. Will try converting to SGPR. Register VGPR168 can't be converted to SGPR, because the following instruction can't be converted: V_MIN_F32 vDst(VGPR169) src0(VGPR167) src1(VGPR168) // VOP2 Register VGPR[170:171] contains scalar/constant data. Will try converting to SGPR. Register VGPR[170:171] can't be converted to SGPR, because the following instruction can't be converted: V_MAX_F32 vDst(VGPR174) src0(VGPR163) src1(VGPR170) // VOP2 Register VGPR172 contains scalar/constant data. Will try converting to SGPR. Register VGPR173 contains scalar/constant data. Will try converting to SGPR. Register VGPR[183:184] contains scalar/constant data. Will try converting to SGPR. Register VGPR[183:184] can't be converted to SGPR, because the following instruction can't be converted: V_RCP_F32 vDst(VGPR187) src0(VGPR183) Register VGPR185 contains scalar/constant data. Will try converting to SGPR. Register VGPR186 contains scalar/constant data. Will try converting to SGPR. Register VGPR191 contains scalar/constant data. Will try converting to SGPR. Register VGPR191 can't be converted to SGPR, because the following instruction can't be converted: V_RCP_F32 vDst(VGPR192) src0(VGPR191) Register VGPR[197:198] contains scalar/constant data. Will try converting to SGPR. Register VGPR[197:198] can't be converted to SGPR, because the following instruction can't be converted: V_SUB_F32 vDst(VGPR199) src0(VGPR195) src1(VGPR197) // VOP2 Register VGPR204 contains scalar/constant data. Will try converting to SGPR. Register VGPR204 can't be converted to SGPR, because the following instruction can't be converted: V_MIN_F32 vDst(VGPR205) src0(VGPR203) src1(VGPR204) // VOP2 Register VGPR[206:207] contains scalar/constant data. Will try converting to SGPR. Register VGPR[206:207] can't be converted to SGPR, because the following instruction can't be converted: V_MAX_F32 vDst(VGPR210) src0(VGPR199) src1(VGPR206) // VOP2 Register VGPR208 contains scalar/constant data. Will try converting to SGPR. Register VGPR209 contains scalar/constant data. Will try converting to SGPR. Register VGPR255 contains scalar/constant data. Will try converting to SGPR. Register VGPR255 can't be converted to SGPR, because the following instruction can't be converted: V_ADD_F32 vDst(VGPR256) src0(VGPR254) src1(VGPR255) // VOP2 Register VGPR274 contains scalar/constant data. Will try converting to SGPR. Register VGPR274 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR276) src0(VGPR274) src1(VGPR275) // VOP2 Register VGPR275 contains scalar/constant data. Will try converting to SGPR. Register VGPR275 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR276) src0(VGPR274) src1(VGPR275) // VOP2 Register VGPR276 contains scalar/constant data. Will try converting to SGPR. Register VGPR276 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR276) src0(VGPR274) src1(VGPR275) // VOP2 Register VGPR294 contains scalar/constant data. Will try converting to SGPR. Register VGPR[299:300] contains scalar/constant data. Will try converting to SGPR. Register VGPR[299:300] can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR301) src0(VGPR295) src1(VGPR299) // VOP2 Register VGPR316 contains scalar/constant data. Will try converting to SGPR. Register VGPR317 contains scalar/constant data. Will try converting to SGPR. Register VGPR318 contains scalar/constant data. Will try converting to SGPR. Register VGPR319 contains scalar/constant data. Will try converting to SGPR. Register VGPR[320:322] contains scalar/constant data. Will try converting to SGPR. Register VGPR[320:322] can't be converted to SGPR, because the following instruction can't be converted: V_ADD_F32 vDst(VGPR324) src0(VGPR313) src1(VGPR320) // VOP2 Register VGPR323 contains scalar/constant data. Will try converting to SGPR. Register VGPR327 contains scalar/constant data. Will try converting to SGPR. Register VGPR327 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR329) src0(VGPR327) src1(VGPR328) // VOP2 Register VGPR328 contains scalar/constant data. Will try converting to SGPR. Register VGPR328 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR329) src0(VGPR327) src1(VGPR328) // VOP2 Register VGPR329 contains scalar/constant data. Will try converting to SGPR. Register VGPR329 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR329) src0(VGPR327) src1(VGPR328) // VOP2 Register VGPR339 contains scalar/constant data. Will try converting to SGPR. Register VGPR343 contains scalar/constant data. Will try converting to SGPR. Register VGPR343 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR344) src0(1_0_F) src1(VGPR343) // VOP2 Register VGPR344 contains scalar/constant data. Will try converting to SGPR. Register VGPR344 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR344) src0(1_0_F) src1(VGPR343) // VOP2 Register VGPR355 contains scalar/constant data. Will try converting to SGPR. Register VGPR359 contains scalar/constant data. Will try converting to SGPR. Register VGPR359 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR360) src0(2_0_F) src1(VGPR359) // VOP2 Register VGPR360 contains scalar/constant data. Will try converting to SGPR. Register VGPR360 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR360) src0(2_0_F) src1(VGPR359) // VOP2 Register VGPR370 contains scalar/constant data. Will try converting to SGPR. Register VGPR374 contains scalar/constant data. Will try converting to SGPR. Register VGPR374 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR376) src0(VGPR374) src1(VGPR375) // VOP2 Register VGPR375 contains scalar/constant data. Will try converting to SGPR. Register VGPR375 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR376) src0(VGPR374) src1(VGPR375) // VOP2 Register VGPR376 contains scalar/constant data. Will try converting to SGPR. Register VGPR376 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR376) src0(VGPR374) src1(VGPR375) // VOP2 Register VGPR388 contains scalar/constant data. Will try converting to SGPR. Register VGPR392 contains scalar/constant data. Will try converting to SGPR. Register VGPR392 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR393) src0(4_0_F) src1(VGPR392) // VOP2 Register VGPR393 contains scalar/constant data. Will try converting to SGPR. Register VGPR393 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR393) src0(4_0_F) src1(VGPR392) // VOP2 Register VGPR404 contains scalar/constant data. Will try converting to SGPR. Register VGPR408 contains scalar/constant data. Will try converting to SGPR. Register VGPR408 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR410) src0(VGPR408) src1(VGPR409) // VOP2 Register VGPR409 contains scalar/constant data. Will try converting to SGPR. Register VGPR409 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR410) src0(VGPR408) src1(VGPR409) // VOP2 Register VGPR410 contains scalar/constant data. Will try converting to SGPR. Register VGPR410 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR410) src0(VGPR408) src1(VGPR409) // VOP2 Register VGPR420 contains scalar/constant data. Will try converting to SGPR. Register VGPR424 contains scalar/constant data. Will try converting to SGPR. Register VGPR424 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR426) src0(VGPR424) src1(VGPR425) // VOP2 Register VGPR425 contains scalar/constant data. Will try converting to SGPR. Register VGPR425 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR426) src0(VGPR424) src1(VGPR425) // VOP2 Register VGPR426 contains scalar/constant data. Will try converting to SGPR. Register VGPR426 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR426) src0(VGPR424) src1(VGPR425) // VOP2 Register VGPR433 contains scalar/constant data. Will try converting to SGPR. Register VGPR433 can't be converted to SGPR, because the following instruction can't be converted: V_ADD_F32 vDst(VGPR435) src0(VGPR433) src1(VGPR434) // VOP2 Register VGPR434 contains scalar/constant data. Will try converting to SGPR. Register VGPR434 can't be converted to SGPR, because the following instruction can't be converted: V_ADD_F32 vDst(VGPR435) src0(VGPR433) src1(VGPR434) // VOP2 Register VGPR435 contains scalar/constant data. Will try converting to SGPR. Register VGPR435 can't be converted to SGPR, because the following instruction can't be converted: V_ADD_F32 vDst(VGPR435) src0(VGPR433) src1(VGPR434) // VOP2 Register VGPR[436:438] contains scalar/constant data. Will try converting to SGPR. Register VGPR[436:438] can't be converted to SGPR, because the following instruction can't be converted: V_ADD_F32 vDst(VGPR441) src0(VGPR430) src1(VGPR436) // VOP2 Register VGPR439 contains scalar/constant data. Will try converting to SGPR. Register VGPR440 contains scalar/constant data. Will try converting to SGPR. Register VGPR449 contains scalar/constant data. Will try converting to SGPR. Register VGPR449 can't be converted to SGPR, because the following instruction can't be converted: V_ADD_F32 vDst(VGPR450) src0(1_0_F) src1(VGPR449) // VOP2 Register VGPR450 contains scalar/constant data. Will try converting to SGPR. Register VGPR450 can't be converted to SGPR, because the following instruction can't be converted: V_ADD_F32 vDst(VGPR450) src0(1_0_F) src1(VGPR449) // VOP2 Register VGPR[451:453] contains scalar/constant data. Will try converting to SGPR. Register VGPR[451:453] can't be converted to SGPR, because the following instruction can't be converted: V_ADD_F32 vDst(VGPR456) src0(VGPR446) src1(VGPR451) // VOP2 Register VGPR454 contains scalar/constant data. Will try converting to SGPR. Register VGPR455 contains scalar/constant data. Will try converting to SGPR. Register VGPR462 contains scalar/constant data. Will try converting to SGPR. Register VGPR[467:468] contains scalar/constant data. Will try converting to SGPR. Register VGPR[467:468] can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR469) src0(VGPR463) src1(VGPR467) // VOP2 Register VGPR471 contains scalar/constant data. Will try converting to SGPR. Register VGPR481 contains scalar/constant data. Will try converting to SGPR. Register VGPR481 can't be converted to SGPR, because the following instruction can't be converted: V_ADD_F32 vDst(VGPR483) src0(VGPR481) src1(VGPR482) // VOP2 Register VGPR482 contains scalar/constant data. Will try converting to SGPR. Register VGPR482 can't be converted to SGPR, because the following instruction can't be converted: V_ADD_F32 vDst(VGPR483) src0(VGPR481) src1(VGPR482) // VOP2 Register VGPR483 contains scalar/constant data. Will try converting to SGPR. Register VGPR483 can't be converted to SGPR, because the following instruction can't be converted: V_ADD_F32 vDst(VGPR483) src0(VGPR481) src1(VGPR482) // VOP2 Register VGPR484 contains scalar/constant data. Will try converting to SGPR. Register VGPR485 contains scalar/constant data. Will try converting to SGPR. Register VGPR486 contains scalar/constant data. Will try converting to SGPR. Register VGPR487 contains scalar/constant data. Will try converting to SGPR. Register VGPR[488:490] contains scalar/constant data. Will try converting to SGPR. Register VGPR[488:490] can't be converted to SGPR, because the following instruction can't be converted: V_ADD_F32 vDst(VGPR491) src0(VGPR478) src1(VGPR488) // VOP2 Register VGPR495 contains scalar/constant data. Will try converting to SGPR. Register VGPR495 can't be converted to SGPR, because the following instruction can't be converted: V_SUB_F32 vDst(VGPR496) src0(VGPR494) src1(VGPR495) // VOP2 Register VGPR500 contains scalar/constant data. Will try converting to SGPR. Register VGPR500 can't be converted to SGPR, because the following instruction can't be converted: V_ADD_F32 vDst(VGPR502) src0(VGPR500) src1(VGPR501) // VOP2 Register VGPR501 contains scalar/constant data. Will try converting to SGPR. Register VGPR501 can't be converted to SGPR, because the following instruction can't be converted: V_ADD_F32 vDst(VGPR502) src0(VGPR500) src1(VGPR501) // VOP2 Register VGPR502 contains scalar/constant data. Will try converting to SGPR. Register VGPR502 can't be converted to SGPR, because the following instruction can't be converted: V_ADD_F32 vDst(VGPR502) src0(VGPR500) src1(VGPR501) // VOP2 Register VGPR512 contains scalar/constant data. Will try converting to SGPR. Register VGPR512 can't be converted to SGPR, because the following instruction can't be converted: V_SUB_F32 vDst(VGPR513) src0(VGPR511) src1(VGPR512) // VOP2 Register VGPR518 contains scalar/constant data. Will try converting to SGPR. Register VGPR518 can't be converted to SGPR, because the following instruction can't be converted: V_ADD_F32 vDst(VGPR520) src0(VGPR518) src1(VGPR519) // VOP2 Register VGPR519 contains scalar/constant data. Will try converting to SGPR. Register VGPR519 can't be converted to SGPR, because the following instruction can't be converted: V_ADD_F32 vDst(VGPR520) src0(VGPR518) src1(VGPR519) // VOP2 Register VGPR520 contains scalar/constant data. Will try converting to SGPR. Register VGPR520 can't be converted to SGPR, because the following instruction can't be converted: V_ADD_F32 vDst(VGPR520) src0(VGPR518) src1(VGPR519) // VOP2 Register VGPR530 contains scalar/constant data. Will try converting to SGPR. Register VGPR530 can't be converted to SGPR, because the following instruction can't be converted: V_SUB_F32 vDst(VGPR531) src0(VGPR529) src1(VGPR530) // VOP2 Register VGPR554 contains scalar/constant data. Will try converting to SGPR. Register VGPR554 can't be converted to SGPR, because the following instruction can't be converted: V_ADD_F32 vDst(VGPR555) src0(VGPR553) src1(VGPR554) // VOP2 Register VGPR563 contains scalar/constant data. Will try converting to SGPR. Register VGPR563 can't be converted to SGPR, because the following instruction can't be converted: V_SUB_F32 vDst(VGPR564) src0(VGPR562) src1(VGPR563) // VOP2 Register VGPR574 contains scalar/constant data. Will try converting to SGPR. Register VGPR574 can't be converted to SGPR, because the following instruction can't be converted: V_ADD_F32 vDst(VGPR575) src0(VGPR573) src1(VGPR574) // VOP2 Register VGPR583 contains scalar/constant data. Will try converting to SGPR. Register VGPR583 can't be converted to SGPR, because the following instruction can't be converted: V_SUB_F32 vDst(VGPR584) src0(VGPR582) src1(VGPR583) // VOP2 Register VGPR594 contains scalar/constant data. Will try converting to SGPR. Register VGPR594 can't be converted to SGPR, because the following instruction can't be converted: V_ADD_F32 vDst(VGPR595) src0(VGPR593) src1(VGPR594) // VOP2 Register VGPR603 contains scalar/constant data. Will try converting to SGPR. Register VGPR603 can't be converted to SGPR, because the following instruction can't be converted: V_SUB_F32 vDst(VGPR604) src0(VGPR602) src1(VGPR603) // VOP2 Register VGPR623 contains scalar/constant data. Will try converting to SGPR. Register VGPR[632:633] contains scalar/constant data. Will try converting to SGPR. Register VGPR[632:633] can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR634) src0(VGPR636) src1(VGPR632) // VOP2 Register VGPR[634:635] contains scalar/constant data. Will try converting to SGPR. Register VGPR[634:635] can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR634) src0(VGPR636) src1(VGPR632) // VOP2 Register VGPR636 contains scalar/constant data. Will try converting to SGPR. Register VGPR636 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR634) src0(VGPR636) src1(VGPR632) // VOP2 Register VGPR639 contains scalar/constant data. Will try converting to SGPR. Register VGPR639 can't be converted to SGPR, because the following instruction can't be converted: V_RCP_F32 vDst(VGPR640) src0(VGPR639) Register VGPR640 contains scalar/constant data. Will try converting to SGPR. Register VGPR640 can't be converted to SGPR, because the following instruction can't be converted: V_RCP_F32 vDst(VGPR640) src0(VGPR639) Register VGPR645 contains scalar/constant data. Will try converting to SGPR. Register VGPR645 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR643) src0(VGPR645) src1(VGPR617) // VOP2 Register VGPR646 contains scalar/constant data. Will try converting to SGPR. Register VGPR646 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR647) src0(LITERAL_CONST) src1(VGPR646) // VOP2 const: 0x3e22f983 Register VGPR647 contains scalar/constant data. Will try converting to SGPR. Register VGPR647 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR647) src0(LITERAL_CONST) src1(VGPR646) // VOP2 const: 0x3e22f983 Register VGPR648 contains scalar/constant data. Will try converting to SGPR. Register VGPR648 can't be converted to SGPR, because the following instruction can't be converted: V_SIN_F32 vDst(VGPR648) src0(VGPR647) Register VGPR649 contains scalar/constant data. Will try converting to SGPR. Register VGPR649 can't be converted to SGPR, because the following instruction can't be converted: V_RCP_F32 vDst(VGPR649) src0(VGPR647) Register VGPR650 contains scalar/constant data. Will try converting to SGPR. Register VGPR650 can't be converted to SGPR, because the following instruction can't be converted: V_RCP_F32 vDst(VGPR650) src0(VGPR649) Register VGPR651 contains scalar/constant data. Will try converting to SGPR. Register VGPR651 can't be converted to SGPR, because the following instruction can't be converted: V_ADD_F32 vDst(VGPR651) src0(1_0_F) src1(VGPR650) // VOP2 Register VGPR652 contains scalar/constant data. Will try converting to SGPR. Register VGPR652 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR652) src0(1_0_F) src1(VGPR651) // VOP2 Register VGPR[653:655] contains scalar/constant data. Will try converting to SGPR. Register VGPR[653:655] can't be converted to SGPR, because the following instruction can't be converted: V_SUB_F32 vDst(VGPR664) src0(VGPR660) src1(VGPR653) // VOP2 Register VGPR656 contains scalar/constant data. Will try converting to SGPR. Register VGPR657 contains scalar/constant data. Will try converting to SGPR. Register VGPR663 contains scalar/constant data. Will try converting to SGPR. Register VGPR671 contains scalar/constant data. Will try converting to SGPR. Register VGPR672 contains scalar/constant data. Will try converting to SGPR. Register VGPR674 contains scalar/constant data. Will try converting to SGPR. Register VGPR[678:680] contains scalar/constant data. Will try converting to SGPR. Register VGPR[678:680] can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR681) src0(VGPR678) src1(VGPR675) // VOP2 Register VGPR682 contains scalar/constant data. Will try converting to SGPR. Register VGPR682 can't be converted to SGPR, because the following instruction can't be converted: V_SUB_F32 vDst(VGPR683) src0(VGPR681) src1(VGPR682) // VOP2 Register VGPR684 contains scalar/constant data. Will try converting to SGPR. Register VGPR684 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR685) src0(VGPR684) src1(VGPR681) // VOP2 Register VGPR689 contains scalar/constant data. Will try converting to SGPR. Register VGPR689 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR690) src0(VGPR688) src1(VGPR689) // VOP2 Register VGPR692 contains scalar/constant data. Will try converting to SGPR. Register VGPR692 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR691) src0(VGPR690) src1(VGPR692) // VOP2 Register VGPR693 contains scalar/constant data. Will try converting to SGPR. Register VGPR693 can't be converted to SGPR, because the following instruction can't be converted: V_MAX_F32 vDst(VGPR695) src0(VGPR691) src1(VGPR693) // VOP2 Register VGPR694 contains scalar/constant data. Will try converting to SGPR. Register VGPR694 can't be converted to SGPR, because the following instruction can't be converted: V_MIN_F32 vDst(VGPR695) src0(VGPR695) src1(VGPR694) // VOP2 Register VGPR699 contains scalar/constant data. Will try converting to SGPR. Register VGPR699 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR700) src0(VGPR698) src1(VGPR699) // VOP2 Register VGPR702 contains scalar/constant data. Will try converting to SGPR. Register VGPR702 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR701) src0(VGPR700) src1(VGPR702) // VOP2 Register VGPR703 contains scalar/constant data. Will try converting to SGPR. Register VGPR703 can't be converted to SGPR, because the following instruction can't be converted: V_MAX_F32 vDst(VGPR705) src0(VGPR701) src1(VGPR703) // VOP2 Register VGPR704 contains scalar/constant data. Will try converting to SGPR. Register VGPR704 can't be converted to SGPR, because the following instruction can't be converted: V_MIN_F32 vDst(VGPR705) src0(VGPR705) src1(VGPR704) // VOP2 Register VGPR708 contains scalar/constant data. Will try converting to SGPR. Register VGPR712 contains scalar/constant data. Will try converting to SGPR. Register VGPR712 can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR709) src0(VGPR712) src1(VGPR668) // VOP2 Register VGPR719 contains scalar/constant data. Will try converting to SGPR. Register VGPR720 contains scalar/constant data. Will try converting to SGPR. Register VGPR[725:728] contains scalar/constant data. Will try converting to SGPR. Register VGPR[725:728] can't be converted to SGPR, because the following instruction can't be converted: V_MUL_F32 vDst(VGPR721) src0(VGPR622) src1(VGPR725) // VOP2 Register VGPR135 contains scalar/constant data. Will try converting to SGPR. Register VGPR149 contains scalar/constant data. Will try converting to SGPR. Register VGPR150 contains scalar/constant data. Will try converting to SGPR. Register VGPR172 contains scalar/constant data. Will try converting to SGPR. Register VGPR173 contains scalar/constant data. Will try converting to SGPR. Register VGPR185 contains scalar/constant data. Will try converting to SGPR. Register VGPR186 contains scalar/constant data. Will try converting to SGPR. Register VGPR208 contains scalar/constant data. Will try converting to SGPR. Register VGPR209 contains scalar/constant data. Will try converting to SGPR. Register VGPR294 contains scalar/constant data. Will try converting to SGPR. Register VGPR316 contains scalar/constant data. Will try converting to SGPR. Register VGPR317 contains scalar/constant data. Will try converting to SGPR. Register VGPR318 contains scalar/constant data. Will try converting to SGPR. Register VGPR319 contains scalar/constant data. Will try converting to SGPR. Register VGPR323 contains scalar/constant data. Will try converting to SGPR. Register VGPR339 contains scalar/constant data. Will try converting to SGPR. Register VGPR355 contains scalar/constant data. Will try converting to SGPR. Register VGPR370 contains scalar/constant data. Will try converting to SGPR. Register VGPR388 contains scalar/constant data. Will try converting to SGPR. Register VGPR404 contains scalar/constant data. Will try converting to SGPR. Register VGPR420 contains scalar/constant data. Will try converting to SGPR. Register VGPR439 contains scalar/constant data. Will try converting to SGPR. Register VGPR440 contains scalar/constant data. Will try converting to SGPR. Register VGPR454 contains scalar/constant data. Will try converting to SGPR. Register VGPR455 contains scalar/constant data. Will try converting to SGPR. Register VGPR462 contains scalar/constant data. Will try converting to SGPR. Register VGPR471 contains scalar/constant data. Will try converting to SGPR. Register VGPR484 contains scalar/constant data. Will try converting to SGPR. Register VGPR485 contains scalar/constant data. Will try converting to SGPR. Register VGPR486 contains scalar/constant data. Will try converting to SGPR. Register VGPR487 contains scalar/constant data. Will try converting to SGPR. Register VGPR623 contains scalar/constant data. Will try converting to SGPR. Register VGPR656 contains scalar/constant data. Will try converting to SGPR. Register VGPR657 contains scalar/constant data. Will try converting to SGPR. Register VGPR663 contains scalar/constant data. Will try converting to SGPR. Register VGPR671 contains scalar/constant data. Will try converting to SGPR. Register VGPR672 contains scalar/constant data. Will try converting to SGPR. Register VGPR674 contains scalar/constant data. Will try converting to SGPR. Register VGPR708 contains scalar/constant data. Will try converting to SGPR. Register VGPR719 contains scalar/constant data. Will try converting to SGPR. Register VGPR720 contains scalar/constant data. Will try converting to SGPR. No need to convert VGPR672 because it's only used for VGPR comparisons. No need to convert VGPR674 because it's only used for VGPR comparisons. No need to convert VGPR708 because it's only used for VGPR comparisons. Converting VGPR135 to SGPR, and adjusting instructions. Converting VGPR149 to SGPR, and adjusting instructions. Converting VGPR150 to SGPR, and adjusting instructions. Converting VGPR172 to SGPR, and adjusting instructions. Converting VGPR173 to SGPR, and adjusting instructions. Converting VGPR185 to SGPR, and adjusting instructions. Converting VGPR186 to SGPR, and adjusting instructions. Converting VGPR208 to SGPR, and adjusting instructions. Converting VGPR209 to SGPR, and adjusting instructions. Converting VGPR294 to SGPR, and adjusting instructions. Converting VGPR316 to SGPR, and adjusting instructions. Converting VGPR317 to SGPR, and adjusting instructions. Converting VGPR318 to SGPR, and adjusting instructions. Converting VGPR319 to SGPR, and adjusting instructions. Converting VGPR323 to SGPR, and adjusting instructions. Converting VGPR339 to SGPR, and adjusting instructions. Converting VGPR355 to SGPR, and adjusting instructions. Converting VGPR370 to SGPR, and adjusting instructions. Converting VGPR388 to SGPR, and adjusting instructions. Converting VGPR404 to SGPR, and adjusting instructions. Converting VGPR420 to SGPR, and adjusting instructions. Converting VGPR439 to SGPR, and adjusting instructions. Converting VGPR440 to SGPR, and adjusting instructions. Converting VGPR454 to SGPR, and adjusting instructions. Converting VGPR455 to SGPR, and adjusting instructions. Converting VGPR462 to SGPR, and adjusting instructions. Converting VGPR471 to SGPR, and adjusting instructions. Converting VGPR484 to SGPR, and adjusting instructions. Converting VGPR485 to SGPR, and adjusting instructions. Converting VGPR486 to SGPR, and adjusting instructions. Converting VGPR487 to SGPR, and adjusting instructions. Converting VGPR623 to SGPR, and adjusting instructions. Converting VGPR656 to SGPR, and adjusting instructions. Converting VGPR657 to SGPR, and adjusting instructions. Converting VGPR663 to SGPR, and adjusting instructions. Converting VGPR671 to SGPR, and adjusting instructions. Converting VGPR719 to SGPR, and adjusting instructions. Converting VGPR720 to SGPR, and adjusting instructions. VGPR=>SGPR conversions done. Register lifetime ranges REG NAME START END SGPR[0:1] 0 1629 fixed SGPR2 0 1629 fixed SGPR3 0 1629 fixed SGPR[4:5] 0 1629 fixed SGPR[6:7] 0 1629 fixed SGPR8 0 1629 fixed SGPR[10:11] 0 1629 keep-active SGPR12 0 1629 keep-active SGPR13 0 1629 keep-active SGPR[14:15] 0 1629 keep-active SGPR[16:17] 0 1629 keep-active SGPR18 0 1629 keep-active SGPR19 0 1629 keep-active SGPR[20:21] 39 39 SGPR[22:23] 0 1629 keep-active SGPR24 0 1629 keep-active SGPR25 0 1629 keep-active SGPR26 0 1629 keep-active SGPR[28:29] 78 78 SGPR[30:31] 0 1629 keep-active SGPR[32:33] 0 1629 keep-active SGPR[34:35] 0 1629 keep-active SGPR36 0 1629 keep-active SGPR37 0 1629 keep-active SGPR[38:39] 283 283 SGPR[40:41] 0 1629 keep-active SGPR42 0 1629 keep-active SGPR43 0 1629 keep-active SGPR[44:45] 362 362 SGPR[46:47] 0 1629 keep-active SGPR48 0 1629 keep-active SGPR49 0 1629 keep-active SGPR[50:51] 441 441 SGPR52 456 459 SGPR[54:55] 0 1629 keep-active SGPR56 497 501 SGPR[58:59] 0 1629 keep-active SGPR[60:61] 0 1629 keep-active SGPR[62:63] 0 1629 keep-active SGPR[64:65] 0 1629 keep-active SGPR[66:67] 0 1629 keep-active SGPR[68:69] 0 1629 keep-active SGPR[70:71] 0 1629 keep-active SGPR[72:73] 0 1629 keep-active SGPR[74:75] 0 1629 keep-active SGPR[76:77] 0 1629 keep-active SGPR[78:79] 0 1629 keep-active SGPR[80:81] 0 1629 keep-active SGPR[82:83] 0 1629 keep-active SGPR[84:85] 0 1629 keep-active SGPR86 0 1629 keep-active SGPR87 0 1629 keep-active SGPR[88:89] 1092 1092 SGPR[90:91] 0 1629 keep-active SGPR[92:93] 0 1629 keep-active SGPR[94:95] 0 1629 keep-active SGPR[96:97] 0 1629 keep-active SGPR[98:99] 0 1629 keep-active SGPR[100:101] 0 1629 keep-active SGPR[102:103] 0 1629 keep-active SGPR[104:106] 1321 1327 SGPR107 1340 1343 SGPR[108:109] 0 1629 keep-active SGPR[110:111] 0 1629 keep-active SGPR[112:113] 0 1629 keep-active SGPR[114:115] 1427 1430 SGPR[116:117] 0 1629 keep-active SGPR[118:119] 1452 1457 SGPR[120:121] 0 1629 keep-active SGPR[122:123] 0 1629 keep-active SGPR[124:125] 1552 1557 SGPR[126:127] 1554 1568 SGPR128 263 264 SGPR129 295 296 SGPR130 297 298 SGPR131 343 344 SGPR132 345 346 SGPR133 374 375 SGPR134 376 377 SGPR135 422 423 SGPR136 424 425 SGPR137 542 543 SGPR138 592 597 SGPR139 591 592 SGPR140 595 598 SGPR141 594 595 SGPR142 599 600 SGPR143 638 639 SGPR144 678 679 SGPR145 716 717 SGPR146 762 763 SGPR147 802 803 SGPR148 841 842 SGPR149 885 886 SGPR150 887 888 SGPR151 921 922 SGPR152 923 924 SGPR153 950 951 SGPR154 969 970 SGPR155 996 1001 SGPR156 995 996 SGPR157 999 1002 SGPR158 998 999 SGPR159 0 1629 keep-active SGPR160 1379 1380 SGPR161 1381 1382 SGPR162 1396 1397 SGPR163 1411 1412 SGPR164 1601 1602 SGPR165 1602 1604 VGPR[0:1] 0 1629 fixed VGPR[0:1] 0 1629 fixed VGPR[4:5] 0 1629 fixed VGPR[6:7] 0 1629 fixed VGPR[8:9] 0 1629 fixed VGPR[10:11] 0 1629 fixed VGPR12 0 1629 fixed VGPR[2:5] 0 1629 fixed VGPR17 0 1629 fixed VGPR[18:21] 0 1629 keep-active VGPR[22:23] 0 1629 keep-active VGPR[24:27] 6 12 VGPR[28:29] 11 15 VGPR[30:33] 27 34 VGPR34 44 46 VGPR35 46 63 VGPR36 51 53 VGPR37 53 60 VGPR38 57 62 VGPR[39:40] 59 66 VGPR[41:42] 62 68 VGPR[43:46] 65 74 VGPR47 0 1629 keep-active VGPR48 0 1629 keep-active VGPR49 83 85 VGPR[50:53] 0 1629 keep-active VGPR[54:56] 97 102 VGPR[57:58] 101 107 VGPR[59:60] 104 115 VGPR[61:63] 110 116 VGPR[64:66] 114 121 VGPR67 125 128 VGPR68 127 128 VGPR69 128 134 VGPR70 132 134 VGPR71 134 137 VGPR72 136 137 VGPR73 137 141 VGPR74 139 141 VGPR75 140 142 VGPR76 141 144 VGPR77 144 146 VGPR[78:81] 0 1629 keep-active VGPR[82:84] 158 163 VGPR[85:86] 162 168 VGPR[87:88] 165 177 VGPR[89:91] 171 176 VGPR[92:94] 175 182 VGPR95 186 189 VGPR96 188 189 VGPR97 189 201 VGPR98 193 196 VGPR99 195 196 VGPR100 196 214 VGPR101 198 199 VGPR102 199 201 VGPR103 201 204 VGPR104 203 204 VGPR105 204 208 VGPR106 206 208 VGPR107 207 209 VGPR108 208 232 VGPR109 211 212 VGPR110 212 214 VGPR111 214 216 VGPR112 216 220 VGPR113 218 220 VGPR114 219 221 VGPR115 220 235 VGPR[116:118] 224 268 VGPR119 230 234 VGPR120 232 234 VGPR121 234 261 VGPR122 239 258 VGPR123 243 246 VGPR124 245 246 VGPR125 246 252 VGPR126 250 252 VGPR127 252 255 VGPR128 254 255 VGPR129 255 259 VGPR130 257 258 VGPR131 258 262 VGPR[132:134] 261 268 VGPR[136:138] 266 272 VGPR139 270 276 VGPR140 275 276 VGPR141 276 279 VGPR[142:144] 288 293 VGPR[145:146] 292 305 VGPR[147:148] 296 305 VGPR[151:152] 300 308 VGPR153 307 320 VGPR154 313 318 VGPR155 315 318 VGPR156 316 321 VGPR[157:158] 320 324 VGPR[159:160] 323 330 VGPR[161:162] 326 330 VGPR[163:164] 329 349 VGPR165 333 338 VGPR166 336 338 VGPR167 338 341 VGPR168 340 341 VGPR169 341 355 VGPR[170:171] 344 349 VGPR[174:175] 348 352 VGPR176 351 355 VGPR177 355 358 VGPR[178:180] 367 372 VGPR[181:182] 371 384 VGPR[183:184] 375 384 VGPR[187:188] 379 387 VGPR189 386 399 VGPR190 392 397 VGPR191 394 397 VGPR192 395 400 VGPR[193:194] 399 403 VGPR[195:196] 402 409 VGPR[197:198] 405 409 VGPR[199:200] 408 428 VGPR201 412 417 VGPR202 415 417 VGPR203 417 420 VGPR204 419 420 VGPR205 420 434 VGPR[206:207] 423 428 VGPR[210:211] 427 431 VGPR212 430 434 VGPR213 434 437 VGPR214 0 1629 keep-active VGPR215 0 1629 keep-active VGPR216 0 1629 keep-active VGPR217 0 1629 keep-active VGPR[218:220] 0 1629 keep-active VGPR221 0 1629 keep-active VGPR[222:224] 0 1629 keep-active VGPR225 0 1629 keep-active VGPR[226:228] 0 1629 keep-active VGPR229 0 1629 keep-active VGPR[230:232] 0 1629 keep-active VGPR233 0 1629 keep-active VGPR[234:236] 0 1629 keep-active VGPR237 0 1629 keep-active VGPR[238:240] 0 1629 keep-active VGPR241 0 1629 keep-active VGPR[242:244] 0 1629 keep-active VGPR245 0 1629 keep-active VGPR[246:248] 0 1629 keep-active VGPR[249:251] 0 1629 keep-active VGPR252 0 1629 keep-active VGPR253 0 1629 keep-active VGPR254 447 450 VGPR255 449 450 VGPR256 450 454 VGPR[257:260] 0 1629 keep-active VGPR[261:263] 471 476 VGPR[264:265] 475 481 VGPR[266:267] 478 490 VGPR[268:270] 484 489 VGPR[271:273] 488 495 VGPR274 500 502 VGPR275 501 502 VGPR276 502 504 VGPR[277:280] 0 1629 keep-active VGPR[281:283] 516 521 VGPR[284:285] 520 526 VGPR[286:287] 523 534 VGPR[288:290] 529 535 VGPR[291:293] 533 540 VGPR[295:298] 0 1629 keep-active VGPR[299:300] 554 559 VGPR[301:302] 0 1629 keep-active VGPR[303:304] 0 1629 keep-active VGPR[305:306] 0 1629 keep-active VGPR[307:308] 0 1629 keep-active VGPR[309:310] 0 1629 keep-active VGPR[311:312] 0 1629 keep-active VGPR[313:315] 587 604 VGPR[320:322] 597 604 VGPR[324:326] 602 612 VGPR327 606 608 VGPR328 607 608 VGPR329 608 614 VGPR330 0 1629 keep-active VGPR[331:333] 628 643 VGPR334 632 636 VGPR335 634 637 VGPR[336:338] 636 643 VGPR[340:342] 641 650 VGPR343 645 646 VGPR344 646 652 VGPR345 0 1629 keep-active VGPR346 0 1629 keep-active VGPR[347:349] 668 683 VGPR350 672 676 VGPR351 674 677 VGPR[352:354] 676 683 VGPR[356:358] 681 690 VGPR359 685 686 VGPR360 686 692 VGPR361 0 1629 keep-active VGPR[362:364] 706 721 VGPR365 710 714 VGPR366 712 715 VGPR[367:369] 714 721 VGPR[371:373] 719 729 VGPR374 723 725 VGPR375 724 725 VGPR376 725 731 VGPR377 0 1629 keep-active VGPR378 744 746 VGPR379 746 748 VGPR[380:382] 752 767 VGPR383 756 760 VGPR384 758 761 VGPR[385:387] 760 767 VGPR[389:391] 765 774 VGPR392 769 770 VGPR393 770 776 VGPR394 0 1629 keep-active VGPR395 0 1629 keep-active VGPR[396:398] 792 807 VGPR399 796 800 VGPR400 798 801 VGPR[401:403] 800 807 VGPR[405:407] 805 815 VGPR408 809 811 VGPR409 810 811 VGPR410 811 817 VGPR411 0 1629 keep-active VGPR[412:414] 831 846 VGPR415 835 839 VGPR416 837 840 VGPR[417:419] 839 846 VGPR[421:423] 844 854 VGPR424 848 850 VGPR425 849 850 VGPR426 850 856 VGPR427 0 1629 keep-active VGPR428 869 871 VGPR429 871 873 VGPR[430:432] 877 893 VGPR433 881 883 VGPR434 882 883 VGPR435 883 889 VGPR[436:438] 886 893 VGPR[441:443] 891 897 VGPR444 0 1629 keep-active VGPR445 908 910 VGPR[446:448] 914 929 VGPR449 918 919 VGPR450 919 925 VGPR[451:453] 922 929 VGPR[456:458] 927 933 VGPR459 0 1629 keep-active VGPR460 944 946 VGPR461 946 948 VGPR[463:466] 0 1629 keep-active VGPR[467:468] 962 967 VGPR[469:470] 0 1629 keep-active VGPR[472:475] 0 1629 keep-active VGPR[476:477] 981 1059 VGPR[478:480] 987 1007 VGPR481 991 993 VGPR482 992 993 VGPR483 993 1003 VGPR[488:490] 1001 1007 VGPR[491:493] 1005 1011 VGPR494 1009 1015 VGPR495 1014 1015 VGPR496 1015 1046 VGPR[497:499] 1018 1036 VGPR500 1022 1024 VGPR501 1023 1024 VGPR502 1024 1032 VGPR503 1026 1030 VGPR504 1028 1031 VGPR[505:507] 1030 1036 VGPR[508:510] 1034 1040 VGPR511 1038 1044 VGPR512 1043 1044 VGPR513 1044 1046 VGPR514 1046 1077 VGPR[515:517] 1049 1067 VGPR518 1053 1055 VGPR519 1054 1055 VGPR520 1055 1063 VGPR521 1057 1061 VGPR522 1059 1062 VGPR[523:525] 1061 1067 VGPR[526:528] 1065 1071 VGPR529 1069 1075 VGPR530 1074 1075 VGPR531 1075 1077 VGPR532 1077 1080 VGPR533 1080 1082 VGPR534 1082 1084 VGPR[535:537] 0 1629 keep-active VGPR[538:540] 0 1629 keep-active VGPR[541:543] 0 1629 keep-active VGPR[544:546] 0 1629 keep-active VGPR[547:549] 0 1629 keep-active VGPR[550:552] 0 1629 keep-active VGPR553 1098 1101 VGPR554 1100 1101 VGPR555 1101 1111 VGPR556 1105 1112 VGPR557 1109 1113 VGPR[558:560] 1111 1117 VGPR561 0 1629 keep-active VGPR562 1130 1133 VGPR563 1132 1133 VGPR564 1133 1143 VGPR565 1137 1144 VGPR566 1141 1145 VGPR[567:569] 1143 1149 VGPR570 0 1629 keep-active VGPR571 0 1629 keep-active VGPR572 1164 1177 VGPR573 1168 1171 VGPR574 1170 1171 VGPR575 1171 1178 VGPR576 1175 1179 VGPR[577:579] 1177 1183 VGPR580 0 1629 keep-active VGPR581 1196 1209 VGPR582 1200 1203 VGPR583 1202 1203 VGPR584 1203 1210 VGPR585 1207 1211 VGPR[586:588] 1209 1215 VGPR589 0 1629 keep-active VGPR590 0 1629 keep-active VGPR591 1230 1243 VGPR592 1234 1244 VGPR593 1238 1241 VGPR594 1240 1241 VGPR595 1241 1245 VGPR[596:598] 1243 1249 VGPR599 0 1629 keep-active VGPR600 1262 1275 VGPR601 1266 1276 VGPR602 1270 1273 VGPR603 1272 1273 VGPR604 1273 1277 VGPR[605:607] 1275 1281 VGPR608 0 1629 keep-active VGPR609 1292 1296 VGPR[610:612] 1294 1304 VGPR613 1298 1304 VGPR[614:616] 1302 1309 VGPR[617:618] 1336 1392 VGPR[619:621] 0 1629 keep-active VGPR622 0 1629 keep-active VGPR[624:626] 0 1629 keep-active VGPR[627:629] 0 1629 keep-active VGPR[630:631] 1318 1334 VGPR[632:633] 1326 1331 VGPR[634:635] 1330 1334 VGPR636 1329 1331 VGPR[637:638] 1333 1337 VGPR639 1343 1346 VGPR640 1344 1350 VGPR[641:642] 1349 1353 VGPR[643:644] 1357 1361 VGPR645 1356 1358 VGPR646 1363 1364 VGPR647 1364 1369 VGPR648 1365 1369 VGPR649 1367 1373 VGPR650 1371 1375 VGPR651 1375 1377 VGPR652 1377 1383 VGPR[653:655] 1380 1401 VGPR658 1390 1394 VGPR659 1392 1395 VGPR[660:662] 1394 1401 VGPR[664:666] 1399 1409 VGPR667 1403 1409 VGPR[668:670] 0 1629 keep-active VGPR672 1426 1427 VGPR673 0 1629 keep-active VGPR674 1451 1452 VGPR[675:677] 0 1629 keep-active VGPR[678:680] 1476 1481 VGPR681 1479 1496 VGPR682 1483 1484 VGPR683 1484 1517 VGPR684 1486 1487 VGPR685 1487 1490 VGPR686 1490 1492 VGPR687 1494 1496 VGPR688 1496 1499 VGPR689 1498 1499 VGPR690 1499 1502 VGPR691 1502 1507 VGPR692 1501 1502 VGPR693 1505 1507 VGPR694 1506 1508 VGPR695 1507 1511 VGPR696 1511 1513 VGPR697 1515 1517 VGPR698 1517 1520 VGPR699 1519 1520 VGPR700 1520 1523 VGPR701 1523 1528 VGPR702 1522 1523 VGPR703 1526 1528 VGPR704 1527 1529 VGPR705 1528 1532 VGPR706 1532 1534 VGPR707 1546 1552 VGPR708 1551 1552 VGPR[709:711] 1578 1584 VGPR712 1577 1580 VGPR[713:715] 1582 1589 VGPR[716:718] 1587 1593 VGPR[721:724] 1618 1627 VGPR[725:728] 1614 1621 Register final registers REG NAME START END SGPR[0:1] 0 1629 fixed SGPR2 0 1629 fixed SGPR3 0 1629 fixed SGPR[4:5] 0 1629 fixed SGPR[6:7] 0 1629 fixed SGPR8 0 1629 fixed SGPR9 0 1629 keep-active SGPR[10:11] 0 1629 keep-active SGPR12 0 1629 keep-active SGPR13 0 1629 keep-active SGPR[14:15] 0 1629 keep-active SGPR[16:17] 0 1629 keep-active SGPR18 0 1629 keep-active SGPR19 0 1629 keep-active SGPR[20:21] 0 1629 keep-active SGPR22 0 1629 keep-active SGPR23 0 1629 keep-active SGPR[24:25] 0 1629 keep-active SGPR[26:27] 0 1629 keep-active SGPR[28:29] 0 1629 keep-active SGPR30 0 1629 keep-active SGPR31 0 1629 keep-active SGPR[32:33] 0 1629 keep-active SGPR34 0 1629 keep-active SGPR35 0 1629 keep-active SGPR[36:37] 0 1629 keep-active SGPR38 0 1629 keep-active SGPR39 0 1629 keep-active SGPR[40:41] 0 1629 keep-active SGPR[42:43] 0 1629 keep-active SGPR[44:45] 0 1629 keep-active SGPR[46:47] 0 1629 keep-active SGPR[48:49] 0 1629 keep-active SGPR[50:51] 0 1629 keep-active SGPR[52:53] 0 1629 keep-active SGPR[54:55] 0 1629 keep-active SGPR[56:57] 0 1629 keep-active SGPR[58:59] 0 1629 keep-active SGPR[60:61] 0 1629 keep-active SGPR[62:63] 0 1629 keep-active SGPR[64:65] 0 1629 keep-active SGPR[66:67] 0 1629 keep-active SGPR[68:69] 0 1629 keep-active SGPR70 0 1629 keep-active SGPR71 0 1629 keep-active SGPR[72:73] 0 1629 keep-active SGPR[74:75] 0 1629 keep-active SGPR[76:77] 0 1629 keep-active SGPR[78:79] 0 1629 keep-active SGPR[80:81] 0 1629 keep-active SGPR[82:83] 0 1629 keep-active SGPR[84:85] 0 1629 keep-active SGPR[86:87] 0 1629 keep-active SGPR[88:89] 0 1629 keep-active SGPR[90:91] 0 1629 keep-active SGPR[92:93] 0 1629 keep-active SGPR[94:95] 0 1629 keep-active SGPR[96:97] 0 1629 keep-active SGPR98 0 1629 keep-active SGPR99 263 264 SGPR99 295 296 SGPR99 297 298 SGPR99 343 344 SGPR99 345 346 SGPR99 374 375 SGPR99 376 377 SGPR99 422 423 SGPR99 424 425 SGPR99 456 459 SGPR99 497 501 SGPR99 542 543 SGPR99 591 592 SGPR99 594 595 SGPR99 599 600 SGPR99 638 639 SGPR99 678 679 SGPR99 716 717 SGPR99 762 763 SGPR99 802 803 SGPR99 841 842 SGPR99 885 886 SGPR99 887 888 SGPR99 921 922 SGPR99 923 924 SGPR99 950 951 SGPR99 969 970 SGPR99 995 996 SGPR99 998 999 SGPR99 1340 1343 SGPR99 1379 1380 SGPR99 1381 1382 SGPR99 1396 1397 SGPR99 1411 1412 SGPR99 1601 1602 SGPR[100:101] 39 39 SGPR[100:101] 78 78 SGPR[100:101] 283 283 SGPR[100:101] 362 362 SGPR[100:101] 441 441 SGPR100 592 597 SGPR100 996 1001 SGPR[100:101] 1092 1092 SGPR[100:102] 1321 1327 SGPR[100:101] 1427 1430 SGPR[100:101] 1452 1457 SGPR[100:101] 1552 1557 SGPR100 1602 1604 SGPR101 595 598 SGPR101 999 1002 SGPR[102:103] 1554 1568 VGPR[0:1] 0 1629 fixed VGPR[0:1] 0 1629 fixed VGPR[2:5] 0 1629 fixed VGPR[4:5] 0 1629 fixed VGPR[6:7] 0 1629 fixed VGPR[8:9] 0 1629 fixed VGPR[10:11] 0 1629 fixed VGPR12 0 1629 fixed VGPR[13:16] 0 1629 keep-active VGPR17 0 1629 fixed VGPR[18:19] 0 1629 keep-active VGPR20 0 1629 keep-active VGPR21 0 1629 keep-active VGPR[22:25] 0 1629 keep-active VGPR[26:29] 0 1629 keep-active VGPR30 0 1629 keep-active VGPR31 0 1629 keep-active VGPR32 0 1629 keep-active VGPR33 0 1629 keep-active VGPR[34:36] 0 1629 keep-active VGPR37 0 1629 keep-active VGPR[38:40] 0 1629 keep-active VGPR41 0 1629 keep-active VGPR[42:44] 0 1629 keep-active VGPR45 0 1629 keep-active VGPR[46:48] 0 1629 keep-active VGPR49 0 1629 keep-active VGPR[50:52] 0 1629 keep-active VGPR53 0 1629 keep-active VGPR[54:56] 0 1629 keep-active VGPR57 0 1629 keep-active VGPR[58:60] 0 1629 keep-active VGPR61 0 1629 keep-active VGPR[62:64] 0 1629 keep-active VGPR[65:67] 0 1629 keep-active VGPR68 0 1629 keep-active VGPR69 0 1629 keep-active VGPR[70:73] 0 1629 keep-active VGPR[74:77] 0 1629 keep-active VGPR[78:81] 0 1629 keep-active VGPR[82:83] 0 1629 keep-active VGPR[84:85] 0 1629 keep-active VGPR[86:87] 0 1629 keep-active VGPR[88:89] 0 1629 keep-active VGPR[90:91] 0 1629 keep-active VGPR[92:93] 0 1629 keep-active VGPR94 0 1629 keep-active VGPR95 0 1629 keep-active VGPR96 0 1629 keep-active VGPR97 0 1629 keep-active VGPR98 0 1629 keep-active VGPR99 0 1629 keep-active VGPR100 0 1629 keep-active VGPR101 0 1629 keep-active VGPR102 0 1629 keep-active VGPR103 0 1629 keep-active VGPR104 0 1629 keep-active VGPR[105:108] 0 1629 keep-active VGPR[109:110] 0 1629 keep-active VGPR[111:114] 0 1629 keep-active VGPR[115:117] 0 1629 keep-active VGPR[118:120] 0 1629 keep-active VGPR[121:123] 0 1629 keep-active VGPR[124:126] 0 1629 keep-active VGPR[127:129] 0 1629 keep-active VGPR[130:132] 0 1629 keep-active VGPR133 0 1629 keep-active VGPR134 0 1629 keep-active VGPR135 0 1629 keep-active VGPR136 0 1629 keep-active VGPR137 0 1629 keep-active VGPR138 0 1629 keep-active VGPR139 0 1629 keep-active VGPR140 0 1629 keep-active VGPR[141:143] 0 1629 keep-active VGPR144 0 1629 keep-active VGPR[145:147] 0 1629 keep-active VGPR[148:150] 0 1629 keep-active VGPR[151:153] 0 1629 keep-active VGPR154 0 1629 keep-active VGPR[155:157] 0 1629 keep-active VGPR[158:161] 6 12 VGPR[158:161] 27 34 VGPR158 44 46 VGPR158 51 53 VGPR158 57 62 VGPR158 83 85 VGPR[158:160] 97 102 VGPR[158:159] 104 115 VGPR158 125 128 VGPR158 132 134 VGPR158 136 137 VGPR158 139 141 VGPR158 144 146 VGPR[158:160] 158 163 VGPR[158:159] 165 177 VGPR158 186 189 VGPR158 193 196 VGPR158 198 199 VGPR158 201 204 VGPR158 206 208 VGPR158 211 212 VGPR158 214 216 VGPR158 218 220 VGPR158 230 234 VGPR158 239 258 VGPR158 270 276 VGPR[158:160] 288 293 VGPR[158:159] 296 305 VGPR158 307 320 VGPR[158:159] 323 330 VGPR158 333 338 VGPR158 340 341 VGPR158 351 355 VGPR[158:159] 371 384 VGPR158 386 399 VGPR[158:159] 402 409 VGPR158 412 417 VGPR158 419 420 VGPR158 430 434 VGPR158 447 450 VGPR[158:160] 471 476 VGPR[158:159] 478 490 VGPR158 500 502 VGPR[158:160] 516 521 VGPR[158:159] 523 534 VGPR[158:159] 554 559 VGPR[158:160] 587 604 VGPR158 606 608 VGPR158 632 636 VGPR158 645 646 VGPR[158:160] 668 683 VGPR158 685 686 VGPR[158:160] 706 721 VGPR158 723 725 VGPR158 744 746 VGPR[158:160] 752 767 VGPR158 769 770 VGPR[158:160] 792 807 VGPR158 809 811 VGPR158 835 839 VGPR158 848 850 VGPR158 869 871 VGPR[158:160] 877 893 VGPR158 908 910 VGPR[158:160] 914 929 VGPR158 944 946 VGPR[158:159] 981 1059 VGPR158 1069 1075 VGPR158 1077 1080 VGPR158 1082 1084 VGPR158 1098 1101 VGPR158 1105 1112 VGPR158 1130 1133 VGPR158 1137 1144 VGPR158 1164 1177 VGPR158 1196 1209 VGPR158 1230 1243 VGPR158 1262 1275 VGPR158 1292 1296 VGPR158 1298 1304 VGPR[158:159] 1318 1334 VGPR[158:159] 1336 1392 VGPR[158:160] 1399 1409 VGPR158 1426 1427 VGPR158 1451 1452 VGPR[158:160] 1476 1481 VGPR158 1483 1484 VGPR158 1486 1487 VGPR158 1490 1492 VGPR158 1494 1496 VGPR158 1498 1499 VGPR158 1501 1502 VGPR158 1505 1507 VGPR158 1511 1513 VGPR158 1515 1517 VGPR158 1519 1520 VGPR158 1522 1523 VGPR158 1526 1528 VGPR158 1532 1534 VGPR158 1546 1552 VGPR158 1577 1580 VGPR[158:160] 1587 1593 VGPR[158:161] 1614 1621 VGPR159 46 63 VGPR159 127 128 VGPR159 134 137 VGPR159 140 142 VGPR159 188 189 VGPR159 195 196 VGPR159 199 201 VGPR159 203 204 VGPR159 207 209 VGPR159 212 214 VGPR159 216 220 VGPR159 232 234 VGPR159 243 246 VGPR159 250 252 VGPR159 254 255 VGPR159 257 258 VGPR159 275 276 VGPR159 313 318 VGPR159 336 338 VGPR159 341 355 VGPR159 392 397 VGPR159 415 417 VGPR159 420 434 VGPR159 449 450 VGPR159 501 502 VGPR159 607 608 VGPR159 634 637 VGPR159 646 652 VGPR159 686 692 VGPR159 724 725 VGPR159 746 748 VGPR159 770 776 VGPR159 810 811 VGPR159 837 840 VGPR159 849 850 VGPR159 871 873 VGPR159 946 948 VGPR159 1074 1075 VGPR159 1080 1082 VGPR159 1100 1101 VGPR159 1109 1113 VGPR159 1132 1133 VGPR159 1141 1145 VGPR159 1168 1171 VGPR159 1175 1179 VGPR159 1200 1203 VGPR159 1207 1211 VGPR159 1234 1244 VGPR159 1266 1276 VGPR[159:161] 1294 1304 VGPR159 1484 1517 VGPR159 1520 1523 VGPR159 1527 1529 VGPR159 1551 1552 VGPR[159:161] 1578 1584 VGPR160 53 60 VGPR[160:162] 110 116 VGPR160 128 134 VGPR160 137 141 VGPR[160:162] 171 176 VGPR160 189 201 VGPR160 204 208 VGPR160 219 221 VGPR160 234 261 VGPR160 276 279 VGPR160 315 318 VGPR[160:161] 326 330 VGPR160 338 341 VGPR[160:161] 344 349 VGPR160 355 358 VGPR[160:162] 367 372 VGPR[160:161] 375 384 VGPR160 394 397 VGPR[160:161] 405 409 VGPR160 417 420 VGPR[160:161] 423 428 VGPR160 434 437 VGPR160 450 454 VGPR[160:162] 484 489 VGPR160 502 504 VGPR[160:162] 529 535 VGPR160 608 614 VGPR[160:162] 628 643 VGPR160 725 731 VGPR160 811 817 VGPR[160:162] 831 846 VGPR160 850 856 VGPR[160:161] 962 967 VGPR[160:162] 987 1007 VGPR160 1009 1015 VGPR160 1022 1024 VGPR160 1026 1030 VGPR160 1038 1044 VGPR160 1046 1077 VGPR160 1101 1111 VGPR160 1133 1143 VGPR160 1170 1171 VGPR160 1202 1203 VGPR160 1238 1241 VGPR160 1270 1273 VGPR[160:161] 1326 1331 VGPR[160:161] 1333 1337 VGPR160 1343 1346 VGPR160 1356 1358 VGPR160 1363 1364 VGPR160 1365 1369 VGPR160 1371 1375 VGPR160 1377 1383 VGPR160 1390 1394 VGPR160 1487 1490 VGPR160 1496 1499 VGPR160 1502 1507 VGPR160 1517 1520 VGPR160 1523 1528 VGPR[161:162] 59 66 VGPR[161:162] 101 107 VGPR161 141 144 VGPR[161:162] 162 168 VGPR161 196 214 VGPR161 220 235 VGPR161 245 246 VGPR161 252 255 VGPR161 258 262 VGPR[161:162] 292 305 VGPR161 316 321 VGPR161 395 400 VGPR[161:162] 475 481 VGPR[161:162] 520 526 VGPR[161:163] 597 604 VGPR161 672 676 VGPR161 710 714 VGPR161 756 760 VGPR161 796 800 VGPR161 881 883 VGPR161 918 919 VGPR161 1014 1015 VGPR161 1023 1024 VGPR161 1028 1031 VGPR161 1043 1044 VGPR[161:163] 1049 1067 VGPR161 1075 1077 VGPR[161:163] 1111 1117 VGPR[161:163] 1143 1149 VGPR161 1171 1178 VGPR161 1203 1210 VGPR161 1240 1241 VGPR161 1272 1273 VGPR161 1344 1350 VGPR[161:162] 1357 1361 VGPR161 1364 1369 VGPR161 1375 1377 VGPR[161:163] 1380 1401 VGPR161 1403 1409 VGPR161 1479 1496 VGPR161 1499 1502 VGPR161 1506 1508 VGPR161 1528 1532 VGPR[162:163] 11 15 VGPR162 208 232 VGPR162 246 252 VGPR162 255 259 VGPR[162:163] 320 324 VGPR[162:163] 329 349 VGPR[162:163] 379 387 VGPR[162:163] 399 403 VGPR[162:163] 408 428 VGPR162 674 677 VGPR162 712 715 VGPR162 758 761 VGPR162 798 801 VGPR162 882 883 VGPR162 919 925 VGPR162 1015 1046 VGPR[162:164] 1177 1183 VGPR[162:164] 1209 1215 VGPR162 1241 1245 VGPR162 1273 1277 VGPR[162:164] 1302 1309 VGPR162 1329 1331 VGPR[162:163] 1349 1353 VGPR162 1367 1373 VGPR162 1507 1511 VGPR[162:164] 1582 1589 VGPR[162:165] 1618 1627 VGPR[163:164] 62 68 VGPR[163:165] 114 121 VGPR[163:165] 175 182 VGPR[163:165] 224 268 VGPR[163:164] 300 308 VGPR[163:165] 488 495 VGPR[163:165] 533 540 VGPR[163:165] 636 643 VGPR[163:165] 676 683 VGPR[163:165] 714 721 VGPR[163:165] 760 767 VGPR[163:165] 800 807 VGPR[163:165] 839 846 VGPR163 883 889 VGPR[163:165] 922 929 VGPR163 991 993 VGPR[163:165] 1018 1036 VGPR163 1044 1046 VGPR[163:165] 1243 1249 VGPR[163:165] 1275 1281 VGPR[163:164] 1330 1334 VGPR[164:165] 348 352 VGPR[164:165] 427 431 VGPR[164:166] 602 612 VGPR[164:166] 886 893 VGPR164 992 993 VGPR164 1053 1055 VGPR164 1057 1061 VGPR164 1392 1395 VGPR[165:168] 65 74 VGPR165 993 1003 VGPR165 1054 1055 VGPR165 1059 1062 VGPR[165:167] 1394 1401 VGPR[166:168] 261 268 VGPR[166:168] 641 650 VGPR[166:168] 681 690 VGPR[166:168] 719 729 VGPR[166:168] 765 774 VGPR[166:168] 805 815 VGPR[166:168] 844 854 VGPR[166:168] 927 933 VGPR[166:168] 1001 1007 VGPR166 1024 1032 VGPR166 1055 1063 VGPR[167:169] 891 897 VGPR[167:169] 1030 1036 VGPR[167:169] 1061 1067 VGPR[169:171] 266 272 VGPR[169:171] 1005 1011 VGPR[170:172] 1034 1040 VGPR[170:172] 1065 1071 Linking branch instructions to their targets... Final disassembly: Program Type: Fragment Special Input Variables: offset: unset, size: 16, FloatVector4 gl_FragCoord BuiltIn(FragCoord) Textures: offset: 0, size: 4, Float iChannel0 offset: 1, size: 4, Float iChannel1 offset: 2, size: 4, Float iChannel2 offset: 3, size: 4, Float iChannel3 Output Variables: offset: 0, size: 16, FloatVector4 finalColor Uniform Constants: offset: 0, size: 4, Float iTime offset: 4, size: 12, FloatVector3 iResolution offset: 16, size: 16, FloatVector4 iMouse offset: 32, size: 16, FloatVector4 iDate offset: 48, size: 4, Float iFrame offset: 52, size: 48, FloatVector3 iChannelResolution[4] Constants: Float const54: 1 Float const55: 0 Float const69: 0.3 Float const70: 0.03 UInt32 const72: 1 Float const80: 0.6 Float const93: 3 Float const100: 0.4 Float const101: -0.04 Float const107: -1.5 Float const110: 2 Float const111: 0.02 Float const117: 2.5 UInt32 const120: 0 Float const123: -2 Float const130: -3 Float const131: 0.1 Float const148: 0.7 UInt32 const156: 2 Float const179: 2.3 Float const209: 10 Float const224: 2.6 Float const235: 0.897598 Float const242: -3.5 FloatVector2 const243: {0, -3.5} Float const329: 4 Float const343: 5 Float const356: 6 Float const384: 0.2 FloatVector2 const385: {0.2, 0.2} Float const387: 2.0944 Float const439: 0.05 Float const507: 0.5 Float const522: 0.15708 Float const541: 0.408248 Float const542: 0.816497 FloatVector3 const543: {0.408248, 0.408248, 0.816497} Int32 const549: 0 Int32 const556: 100 Float const564: 0.005 Float const579: 0.8 Float const597: 10000 Float const607: 30 Float const612: 0.71 Int32 const620: 1 Float const622: 0.9 FloatVector4 const623: {1, 0.9, 0, 0} UInt32 const642: 4 Function Local Variables: offset: unset, size: 16, FloatVector4 main.param629 offset: unset, size: 8, FloatVector2 main.param630 offset: unset, size: 16, FloatVector4 main.fragColor offset: unset, size: 8, FloatVector2 main.fragCoord offset: unset, size: 4, Float main.a offset: unset, size: 12, FloatVector3 rot(f1;.p offset: unset, size: 4, Float rot(f1;.a offset: unset, size: 4, Float blade(vf3;f1;.param61 offset: unset, size: 4, Float blade(vf3;f1;.param83 offset: unset, size: 12, FloatVector3 blade(vf3;f1;.p offset: unset, size: 12, FloatVector3 centre(vf3;.p offset: unset, size: 12, FloatVector3 concav(vf3;.p offset: unset, size: 4, Float sceneSDF(vf3;.param216 offset: unset, size: 4, Float sceneSDF(vf3;.param227 offset: unset, size: 4, Float sceneSDF(vf3;.param238 offset: unset, size: 4, Float sceneSDF(vf3;.d offset: unset, size: 12, FloatVector3 sceneSDF(vf3;.param279 offset: unset, size: 4, Float sceneSDF(vf3;.param280 offset: unset, size: 12, FloatVector3 sceneSDF(vf3;.param291 offset: unset, size: 4, Float sceneSDF(vf3;.param292 offset: unset, size: 12, FloatVector3 sceneSDF(vf3;.param304 offset: unset, size: 4, Float sceneSDF(vf3;.param305 offset: unset, size: 12, FloatVector3 sceneSDF(vf3;.param316 offset: unset, size: 4, Float sceneSDF(vf3;.param317 offset: unset, size: 12, FloatVector3 sceneSDF(vf3;.param332 offset: unset, size: 4, Float sceneSDF(vf3;.param333 offset: unset, size: 12, FloatVector3 sceneSDF(vf3;.param346 offset: unset, size: 4, Float sceneSDF(vf3;.param347 offset: unset, size: 12, FloatVector3 sceneSDF(vf3;.param359 offset: unset, size: 4, Float sceneSDF(vf3;.param360 offset: unset, size: 12, FloatVector3 sceneSDF(vf3;.param370 offset: unset, size: 12, FloatVector3 sceneSDF(vf3;.param379 offset: unset, size: 4, Float sceneSDF(vf3;.param388 offset: unset, size: 4, Float sceneSDF(vf3;.param393 offset: unset, size: 12, FloatVector3 sceneSDF(vf3;.p offset: unset, size: 12, FloatVector3 estimateNormal(vf3;.param446 offset: unset, size: 12, FloatVector3 estimateNormal(vf3;.param456 offset: unset, size: 12, FloatVector3 estimateNormal(vf3;.param467 offset: unset, size: 12, FloatVector3 estimateNormal(vf3;.param477 offset: unset, size: 12, FloatVector3 estimateNormal(vf3;.param488 offset: unset, size: 12, FloatVector3 estimateNormal(vf3;.param498 offset: unset, size: 8, FloatVector2 mainImage(vf4;vf2;.uv offset: unset, size: 12, FloatVector3 mainImage(vf4;vf2;.ray offset: unset, size: 4, Float mainImage(vf4;vf2;.shade offset: unset, size: 4, Int32 mainImage(vf4;vf2;.i offset: unset, size: 12, FloatVector3 mainImage(vf4;vf2;.param560 offset: unset, size: 12, FloatVector3 mainImage(vf4;vf2;.param569 Instructions: V_SUB_F32 vDst(VGPR3) src0(SGPR2) src1(VGPR3) // VOP2 # Void main() Function: Void main() # lb5 Label: lb5 # 631: OpLoad: FloatVector4: tmp631 << gl_FragCoord V_MOV_B32 vDst(VGPR158) src0(VGPR2) V_MOV_B32 vDst(VGPR159) src0(VGPR3) V_MOV_B32 vDst(VGPR160) src0(VGPR4) V_MOV_B32 vDst(VGPR161) src0(VGPR5) # 632: OpVectorShuffle: FloatVector2: tmp632 << tmp631, tmp631, 0, 1 V_MOV_B32 vDst(VGPR162) src0(VGPR158) V_MOV_B32 vDst(VGPR163) src0(VGPR159) # OpStore: : tmp632 >> param630 V_MOV_B32 vDst(VGPR18) src0(VGPR162) V_MOV_B32 vDst(VGPR19) src0(VGPR163) # 633: OpFunctionCall: Void: mainImage(vf4;vf2;(param629, param630) S_ADD_U32 sDst(SGPR9) src0(LITERAL_CONST) src1(0) const: 0xd # VGPR[18:21] S_ADD_U32 sDst(SGPR12) src0(LITERAL_CONST) src1(0) const: 0x12 # VGPR[22:23] S_MOV_B64 sDst(SGPR14) src0(EXEC) # Indirect branch to mainImage(vf4;vf2;: 4672 S_GETPC_B64 sDst(SGPR10) src0(SGPR10) S_ADD_U32 sDst(SGPR10) src0(SGPR10) src1(LITERAL_CONST) const: 0x1240 S_ADDC_U32 sDst(SGPR11) src0(SGPR11) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR10) src0(SGPR10) S_MOV_B64 sDst(EXEC) src0(SGPR14) # .lbl0 # 634: OpLoad: FloatVector4: tmp634 << param629 # OpStore: : tmp634 >> finalColor V_MOV_B32 vDst(VGPR158) src0(VGPR13) V_MOV_B32 vDst(VGPR159) src0(VGPR14) V_MOV_B32 vDst(VGPR160) src0(VGPR15) V_MOV_B32 vDst(VGPR161) src0(VGPR16) # OpReturn: V_CVT_PKRTZ_F16_F32 vDst(VGPR158) src0(VGPR158) src1(VGPR159) src2(N/A) abs(0) clamp(0) omod(0) neg(0) // VOP3a V_CVT_PKRTZ_F16_F32 vDst(VGPR159) src0(VGPR160) src1(VGPR161) src2(N/A) abs(0) clamp(0) omod(0) neg(0) // VOP3a EXP en(0xf) tgt(0) compr(1) done(1) vm(1) vsrc0(VGPR158) vsrc1(VGPR159) vsrc2(VGPR160) vsrc3(VGPR161) S_WAITCNT 0 S_ENDPGM 0 # FloatMatrix2x2 rot(f1;(Float* a) Function: FloatMatrix2x2 rot(f1;() S_MOV_B64 sDst(SGPR100) src0(EXEC) # lb13 Label: lb13 # 44: OpLoad: Float: tmp44 << a S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR18) const: 0x0 V_MOVRELS_B32 vDst(VGPR158) src0(VGPR0) # 45: OpExtInst(Cos): Float: tmp45 << tmp44 V_MUL_F32 vDst(VGPR159) src0(LITERAL_CONST) src1(VGPR158) // VOP2 const: 0x3e22f983 V_FRACT_F32 vDst(VGPR159) src0(VGPR159) V_COS_F32 vDst(VGPR159) src0(VGPR159) # 47: OpLoad: Float: tmp47 << a S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR18) const: 0x0 V_MOVRELS_B32 vDst(VGPR158) src0(VGPR0) # 48: OpExtInst(Sin): Float: tmp48 << tmp47 V_MUL_F32 vDst(VGPR160) src0(LITERAL_CONST) src1(VGPR158) // VOP2 const: 0x3e22f983 V_FRACT_F32 vDst(VGPR160) src0(VGPR160) V_SIN_F32 vDst(VGPR160) src0(VGPR160) # 52: OpFNegate: Float: tmp52 << tmp48 V_MUL_F32 vDst(VGPR158) src0(M1_0_F) src1(VGPR160) // VOP2 # 56: OpCompositeConstruct: FloatVector2: tmp56 << tmp45, tmp48 V_MOV_B32 vDst(VGPR161) src0(VGPR159) V_MOV_B32 vDst(VGPR162) src0(VGPR160) # 57: OpCompositeConstruct: FloatVector2: tmp57 << tmp52, tmp45 V_MOV_B32 vDst(VGPR163) src0(VGPR158) V_MOV_B32 vDst(VGPR164) src0(VGPR159) # 58: OpCompositeConstruct: FloatMatrix2x2: tmp58 << tmp56, tmp57 V_MOV_B32 vDst(VGPR165) src0(VGPR161) V_MOV_B32 vDst(VGPR166) src0(VGPR162) V_MOV_B32 vDst(VGPR167) src0(VGPR163) V_MOV_B32 vDst(VGPR168) src0(VGPR164) # OpReturnValue: : << tmp58 S_MOV_B32 sDst(M0) src0(SGPR13) V_MOVRELD_B32 vDst(VGPR0) src0(VGPR165) V_MOVRELD_B32 vDst(VGPR1) src0(VGPR166) V_MOVRELD_B32 vDst(VGPR2) src0(VGPR167) V_MOVRELD_B32 vDst(VGPR3) src0(VGPR168) S_SETPC_B64 sDst(SGPR16) src0(SGPR16) # Float blade(vf3;f1;(FloatVector3* p, Float* a) Function: Float blade(vf3;f1;(, Float rot(f1;.a) S_MOV_B64 sDst(SGPR100) src0(EXEC) # lb20 Label: lb20 # 62: OpLoad: Float: tmp62 << a S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR23) const: 0x0 V_MOVRELS_B32 vDst(VGPR158) src0(VGPR0) # OpStore: : tmp62 >> param61 V_MOV_B32 vDst(VGPR20) src0(VGPR158) # 63: OpFunctionCall: FloatMatrix2x2: rot(f1;(param61) S_ADD_U32 sDst(SGPR18) src0(LITERAL_CONST) src1(0) const: 0x14 # VGPR47 S_MOV_B64 sDst(SGPR24) src0(EXEC) S_MOV_B32 sDst(SGPR13) src0(LITERAL_CONST) const: 0x16 # VGPR[50:53] # Indirect branch to rot(f1;: -164 S_GETPC_B64 sDst(SGPR16) src0(SGPR16) S_SUB_U32 sDst(SGPR16) src0(SGPR16) src1(LITERAL_CONST) const: 0xa4 S_SUBB_U32 sDst(SGPR17) src0(SGPR17) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR16) src0(SGPR16) S_MOV_B64 sDst(EXEC) src0(SGPR24) # .lbl1 # 64: OpLoad: FloatVector3: tmp64 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR22) const: 0x0 V_MOVRELS_B32 vDst(VGPR158) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR159) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR160) src0(VGPR2) # 65: OpVectorShuffle: FloatVector2: tmp65 << tmp64, tmp64, 0, 1 V_MOV_B32 vDst(VGPR161) src0(VGPR158) V_MOV_B32 vDst(VGPR162) src0(VGPR159) # 66: OpVectorTimesMatrix: FloatVector2: tmp66 << tmp65, rot(f1; V_MUL_F32 vDst(VGPR158) src0(VGPR161) src1(VGPR22) // VOP2 V_MUL_F32 vDst(VGPR159) src0(VGPR161) src1(VGPR24) // VOP2 V_MAC_F32 vDst(VGPR158) src0(VGPR162) src1(VGPR23) // VOP2 V_MAC_F32 vDst(VGPR159) src0(VGPR162) src1(VGPR25) // VOP2 # 67: OpLoad: FloatVector3: tmp67 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR22) const: 0x0 V_MOVRELS_B32 vDst(VGPR160) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR161) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR162) src0(VGPR2) # 68: OpVectorShuffle: FloatVector3: tmp68 << tmp67, tmp66, 3, 4, 2 V_MOV_B32 vDst(VGPR163) src0(VGPR158) V_MOV_B32 vDst(VGPR164) src0(VGPR159) V_MOV_B32 vDst(VGPR165) src0(VGPR162) # OpStore: : tmp68 >> p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR22) const: 0x0 V_MOVRELD_B32 vDst(VGPR0) src0(VGPR163) V_MOVRELD_B32 vDst(VGPR1) src0(VGPR164) V_MOVRELD_B32 vDst(VGPR2) src0(VGPR165) # 73: OpAccessChain: Float*: p[1] # 74: OpLoad: Float: tmp74 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR22) const: 0x0 V_MOVRELS_B32 vDst(VGPR158) src0(VGPR1) # 75: OpFMul: Float: tmp75 << const70, tmp74 V_MOV_B32 vDst(VGPR159) src0(LITERAL_CONST) const: 0x3cf5c28f V_MUL_F32 vDst(VGPR160) src0(VGPR159) src1(VGPR158) // VOP2 # 76: OpAccessChain: Float*: p[1] # 77: OpLoad: Float: tmp77 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR22) const: 0x0 V_MOVRELS_B32 vDst(VGPR158) src0(VGPR1) # 78: OpFMul: Float: tmp78 << tmp75, tmp77 V_MUL_F32 vDst(VGPR159) src0(VGPR160) src1(VGPR158) // VOP2 # 79: OpFAdd: Float: tmp79 << const69, tmp78 V_MOV_B32 vDst(VGPR158) src0(LITERAL_CONST) const: 0x3e99999a V_ADD_F32 vDst(VGPR160) src0(VGPR158) src1(VGPR159) // VOP2 # 81: OpExtInst(FClamp): Float: tmp81 << tmp79, const69, const80 V_MOV_B32 vDst(VGPR158) src0(LITERAL_CONST) const: 0x3e99999a V_MOV_B32 vDst(VGPR159) src0(LITERAL_CONST) const: 0x3f19999a V_MAX_F32 vDst(VGPR161) src0(VGPR160) src1(VGPR158) // VOP2 V_MIN_F32 vDst(VGPR161) src0(VGPR161) src1(VGPR159) // VOP2 # 82: OpFNegate: Float: tmp82 << tmp81 V_MUL_F32 vDst(VGPR158) src0(M1_0_F) src1(VGPR161) // VOP2 # OpStore: : tmp82 >> param83 V_MOV_B32 vDst(VGPR21) src0(VGPR158) # 84: OpFunctionCall: FloatMatrix2x2: rot(f1;(param83) S_ADD_U32 sDst(SGPR18) src0(LITERAL_CONST) src1(0) const: 0x15 # VGPR48 S_MOV_B64 sDst(SGPR26) src0(EXEC) S_MOV_B32 sDst(SGPR13) src0(LITERAL_CONST) const: 0x1a # VGPR[78:81] # Indirect branch to rot(f1;: -392 S_GETPC_B64 sDst(SGPR16) src0(SGPR16) S_SUB_U32 sDst(SGPR16) src0(SGPR16) src1(LITERAL_CONST) const: 0x188 S_SUBB_U32 sDst(SGPR17) src0(SGPR17) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR16) src0(SGPR16) S_MOV_B64 sDst(EXEC) src0(SGPR26) # .lbl2 # 85: OpLoad: FloatVector3: tmp85 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR22) const: 0x0 V_MOVRELS_B32 vDst(VGPR158) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR159) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR160) src0(VGPR2) # 86: OpVectorShuffle: FloatVector2: tmp86 << tmp85, tmp85, 0, 2 V_MOV_B32 vDst(VGPR161) src0(VGPR158) V_MOV_B32 vDst(VGPR162) src0(VGPR160) # 87: OpVectorTimesMatrix: FloatVector2: tmp87 << tmp86, rot(f1; V_MUL_F32 vDst(VGPR158) src0(VGPR161) src1(VGPR26) // VOP2 V_MUL_F32 vDst(VGPR159) src0(VGPR161) src1(VGPR28) // VOP2 V_MAC_F32 vDst(VGPR158) src0(VGPR162) src1(VGPR27) // VOP2 V_MAC_F32 vDst(VGPR159) src0(VGPR162) src1(VGPR29) // VOP2 # 88: OpLoad: FloatVector3: tmp88 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR22) const: 0x0 V_MOVRELS_B32 vDst(VGPR160) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR161) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR162) src0(VGPR2) # 89: OpVectorShuffle: FloatVector3: tmp89 << tmp88, tmp87, 3, 1, 4 V_MOV_B32 vDst(VGPR163) src0(VGPR158) V_MOV_B32 vDst(VGPR164) src0(VGPR161) V_MOV_B32 vDst(VGPR165) src0(VGPR159) # OpStore: : tmp89 >> p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR22) const: 0x0 V_MOVRELD_B32 vDst(VGPR0) src0(VGPR163) V_MOVRELD_B32 vDst(VGPR1) src0(VGPR164) V_MOVRELD_B32 vDst(VGPR2) src0(VGPR165) # 91: OpAccessChain: Float*: p[1] # 92: OpLoad: Float: tmp92 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR22) const: 0x0 V_MOVRELS_B32 vDst(VGPR158) src0(VGPR1) # 94: OpFSub: Float: tmp94 << tmp92, const93 V_MOV_B32 vDst(VGPR159) src0(LITERAL_CONST) const: 0x40400000 V_SUB_F32 vDst(VGPR160) src0(VGPR158) src1(VGPR159) // VOP2 # 96: OpAccessChain: Float*: p[1] # 97: OpLoad: Float: tmp97 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR22) const: 0x0 V_MOVRELS_B32 vDst(VGPR158) src0(VGPR1) # 98: OpFSub: Float: tmp98 << tmp97, const54 V_MOV_B32 vDst(VGPR159) src0(1_0_F) V_SUB_F32 vDst(VGPR161) src0(VGPR158) src1(VGPR159) // VOP2 # 103: OpFMul: Float: tmp103 << const101, tmp94 V_MOV_B32 vDst(VGPR158) src0(LITERAL_CONST) const: 0xbd23d70a V_MUL_F32 vDst(VGPR159) src0(VGPR158) src1(VGPR160) // VOP2 # 105: OpFMul: Float: tmp105 << tmp103, tmp94 V_MUL_F32 vDst(VGPR158) src0(VGPR159) src1(VGPR160) // VOP2 # 106: OpFAdd: Float: tmp106 << const100, tmp105 V_MOV_B32 vDst(VGPR159) src0(LITERAL_CONST) const: 0x3ecccccd V_ADD_F32 vDst(VGPR160) src0(VGPR159) src1(VGPR158) // VOP2 # 108: OpExtInst(FClamp): Float: tmp108 << tmp106, const107, const54 V_MOV_B32 vDst(VGPR158) src0(LITERAL_CONST) const: 0xbfc00000 V_MOV_B32 vDst(VGPR159) src0(1_0_F) V_MAX_F32 vDst(VGPR162) src0(VGPR160) src1(VGPR158) // VOP2 V_MIN_F32 vDst(VGPR162) src0(VGPR162) src1(VGPR159) // VOP2 # 113: OpFMul: Float: tmp113 << const111, tmp98 V_MOV_B32 vDst(VGPR158) src0(LITERAL_CONST) const: 0x3ca3d70a V_MUL_F32 vDst(VGPR159) src0(VGPR158) src1(VGPR161) // VOP2 # 115: OpFMul: Float: tmp115 << tmp113, tmp98 V_MUL_F32 vDst(VGPR158) src0(VGPR159) src1(VGPR161) // VOP2 # 116: OpFAdd: Float: tmp116 << const110, tmp115 V_ADD_F32 vDst(VGPR159) src0(2_0_F) src1(VGPR158) // VOP2 # 118: OpExtInst(FClamp): Float: tmp118 << tmp116, const54, const117 V_MOV_B32 vDst(VGPR158) src0(1_0_F) V_MOV_B32 vDst(VGPR160) src0(LITERAL_CONST) const: 0x40200000 V_MAX_F32 vDst(VGPR161) src0(VGPR159) src1(VGPR158) // VOP2 V_MIN_F32 vDst(VGPR161) src0(VGPR161) src1(VGPR160) // VOP2 # 119: OpLoad: FloatVector3: tmp119 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR22) const: 0x0 V_MOVRELS_B32 vDst(VGPR163) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR164) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR165) src0(VGPR2) # 121: OpAccessChain: Float*: p[0] # 122: OpLoad: Float: tmp122 << p[0] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR22) const: 0x0 V_MOVRELS_B32 vDst(VGPR158) src0(VGPR0) # 125: OpFMul: Float: tmp125 << const123, tmp108 V_MUL_F32 vDst(VGPR159) src0(M2_0_F) src1(VGPR162) // VOP2 # 127: OpExtInst(FClamp): Float: tmp127 << tmp122, tmp125, tmp118 V_MAX_F32 vDst(VGPR160) src0(VGPR158) src1(VGPR159) // VOP2 V_MIN_F32 vDst(VGPR160) src0(VGPR160) src1(VGPR161) // VOP2 # 128: OpAccessChain: Float*: p[1] # 129: OpLoad: Float: tmp129 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR22) const: 0x0 V_MOVRELS_B32 vDst(VGPR158) src0(VGPR1) # 132: OpAccessChain: Float*: p[0] # 133: OpLoad: Float: tmp133 << p[0] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR22) const: 0x0 V_MOVRELS_B32 vDst(VGPR159) src0(VGPR0) # 134: OpFMul: Float: tmp134 << const131, tmp133 V_MOV_B32 vDst(VGPR161) src0(LITERAL_CONST) const: 0x3dcccccd V_MUL_F32 vDst(VGPR162) src0(VGPR161) src1(VGPR159) // VOP2 # 135: OpAccessChain: Float*: p[0] # 136: OpLoad: Float: tmp136 << p[0] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR22) const: 0x0 V_MOVRELS_B32 vDst(VGPR159) src0(VGPR0) # 137: OpFMul: Float: tmp137 << tmp134, tmp136 V_MUL_F32 vDst(VGPR161) src0(VGPR162) src1(VGPR159) // VOP2 # 138: OpFSub: Float: tmp138 << const93, tmp137 V_MOV_B32 vDst(VGPR159) src0(LITERAL_CONST) const: 0x40400000 V_SUB_F32 vDst(VGPR162) src0(VGPR159) src1(VGPR161) // VOP2 # 139: OpExtInst(FClamp): Float: tmp139 << tmp129, const130, tmp138 V_MOV_B32 vDst(VGPR159) src0(LITERAL_CONST) const: 0xc0400000 V_MAX_F32 vDst(VGPR161) src0(VGPR158) src1(VGPR159) // VOP2 V_MIN_F32 vDst(VGPR161) src0(VGPR161) src1(VGPR162) // VOP2 # 140: OpCompositeConstruct: FloatVector3: tmp140 << tmp127, tmp139, const55 V_MOV_B32 vDst(VGPR166) src0(VGPR160) V_MOV_B32 vDst(VGPR167) src0(VGPR161) S_MOV_B32 sDst(SGPR99) src0(LITERAL_CONST) const: 0x0 V_MOV_B32 vDst(VGPR168) src0(SGPR99) # 141: OpFSub: FloatVector3: tmp141 << tmp119, tmp140 V_SUB_F32 vDst(VGPR169) src0(VGPR163) src1(VGPR166) // VOP2 V_SUB_F32 vDst(VGPR170) src0(VGPR164) src1(VGPR167) // VOP2 V_SUB_F32 vDst(VGPR171) src0(VGPR165) src1(VGPR168) // VOP2 # 142: OpExtInst(Length): Float: tmp142 << tmp141 V_MUL_F32 vDst(VGPR158) src0(VGPR169) src1(VGPR169) // VOP2 V_MAC_F32 vDst(VGPR158) src0(VGPR170) src1(VGPR170) // VOP2 V_MAC_F32 vDst(VGPR158) src0(VGPR171) src1(VGPR171) // VOP2 V_SQRT_F32 vDst(VGPR158) src0(VGPR158) # 143: OpFSub: Float: tmp143 << tmp142, const131 V_MOV_B32 vDst(VGPR159) src0(LITERAL_CONST) const: 0x3dcccccd V_SUB_F32 vDst(VGPR160) src0(VGPR158) src1(VGPR159) // VOP2 # OpReturnValue: : << tmp143 S_MOV_B32 sDst(M0) src0(SGPR19) V_MOVRELD_B32 vDst(VGPR0) src0(VGPR160) S_SETPC_B64 sDst(SGPR20) src0(SGPR20) # Float centre(vf3;(FloatVector3* p) Function: Float centre(vf3;() S_MOV_B64 sDst(SGPR100) src0(EXEC) # lb24 Label: lb24 # 150: OpLoad: FloatVector3: tmp150 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR31) const: 0x0 V_MOVRELS_B32 vDst(VGPR158) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR159) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR160) src0(VGPR2) # 151: OpVectorShuffle: FloatVector2: tmp151 << tmp150, tmp150, 0, 1 V_MOV_B32 vDst(VGPR161) src0(VGPR158) V_MOV_B32 vDst(VGPR162) src0(VGPR159) # 153: OpCompositeConstruct: FloatVector2: tmp153 << const117, const117 S_MOV_B32 sDst(SGPR99) src0(LITERAL_CONST) const: 0x40200000 V_MOV_B32 vDst(VGPR158) src0(SGPR99) S_MOV_B32 sDst(SGPR99) src0(LITERAL_CONST) const: 0x40200000 V_MOV_B32 vDst(VGPR159) src0(SGPR99) # 154: OpFDiv: FloatVector2: tmp154 << tmp151, tmp153 V_RCP_F32 vDst(VGPR163) src0(VGPR158) V_RCP_F32 vDst(VGPR164) src0(VGPR159) V_MUL_F32 vDst(VGPR163) src0(VGPR161) src1(VGPR163) // VOP2 V_MUL_F32 vDst(VGPR164) src0(VGPR162) src1(VGPR164) // VOP2 V_DIV_FIXUP_F32 vDst(VGPR163) src0(VGPR163) src1(VGPR158) src2(VGPR161) abs(0) clamp(0) omod(0) neg(0) // VOP3a V_DIV_FIXUP_F32 vDst(VGPR164) src0(VGPR164) src1(VGPR159) src2(VGPR162) abs(0) clamp(0) omod(0) neg(0) // VOP3a # 155: OpExtInst(Length): Float: tmp155 << tmp154 V_MUL_F32 vDst(VGPR158) src0(VGPR163) src1(VGPR163) // VOP2 V_MAC_F32 vDst(VGPR158) src0(VGPR164) src1(VGPR164) // VOP2 V_SQRT_F32 vDst(VGPR158) src0(VGPR158) # 157: OpAccessChain: Float*: p[2] # 158: OpLoad: Float: tmp158 << p[2] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR31) const: 0x0 V_MOVRELS_B32 vDst(VGPR159) src0(VGPR2) # 160: OpFDiv: Float: tmp160 << tmp158, const148 V_MOV_B32 vDst(VGPR160) src0(LITERAL_CONST) const: 0x3f333333 V_RCP_F32 vDst(VGPR161) src0(VGPR160) V_MUL_F32 vDst(VGPR161) src0(VGPR159) src1(VGPR161) // VOP2 V_DIV_FIXUP_F32 vDst(VGPR161) src0(VGPR161) src1(VGPR160) src2(VGPR159) abs(0) clamp(0) omod(0) neg(0) // VOP3a # 161: OpCompositeConstruct: FloatVector2: tmp161 << tmp155, tmp160 V_MOV_B32 vDst(VGPR162) src0(VGPR158) V_MOV_B32 vDst(VGPR163) src0(VGPR161) # 162: OpExtInst(FAbs): FloatVector2: tmp162 << tmp161 V_ADD_F32 vDst(VGPR158) src0(VGPR162) src1(0) src2(N/A) abs(1) clamp(0) omod(0) neg(0) // VOP3a V_ADD_F32 vDst(VGPR159) src0(VGPR163) src1(0) src2(N/A) abs(1) clamp(0) omod(0) neg(0) // VOP3a # 163: OpCompositeConstruct: FloatVector2: tmp163 << const54, const54 V_MOV_B32 vDst(VGPR160) src0(1_0_F) V_MOV_B32 vDst(VGPR161) src0(1_0_F) # 164: OpFSub: FloatVector2: tmp164 << tmp162, tmp163 V_SUB_F32 vDst(VGPR162) src0(VGPR158) src1(VGPR160) // VOP2 V_SUB_F32 vDst(VGPR163) src0(VGPR159) src1(VGPR161) // VOP2 # 165: OpAccessChain: Float*: d[0] # 166: OpCompositeExtract: Float: tmp166 << tmp164, 0 V_MOV_B32 vDst(VGPR158) src0(VGPR162) # 167: OpAccessChain: Float*: d[1] # 168: OpCompositeExtract: Float: tmp168 << tmp164, 1 V_MOV_B32 vDst(VGPR159) src0(VGPR163) # 169: OpExtInst(FMax): Float: tmp169 << tmp166, tmp168 V_MAX_F32 vDst(VGPR160) src0(VGPR158) src1(VGPR159) // VOP2 # 170: OpExtInst(FMin): Float: tmp170 << tmp169, const55 V_MOV_B32 vDst(VGPR158) src0(LITERAL_CONST) const: 0x00000000 V_MIN_F32 vDst(VGPR159) src0(VGPR160) src1(VGPR158) // VOP2 # 172: OpCompositeConstruct: FloatVector2: tmp172 << const55, const55 S_MOV_B32 sDst(SGPR99) src0(LITERAL_CONST) const: 0x0 V_MOV_B32 vDst(VGPR160) src0(SGPR99) S_MOV_B32 sDst(SGPR99) src0(LITERAL_CONST) const: 0x0 V_MOV_B32 vDst(VGPR161) src0(SGPR99) # 173: OpExtInst(FMax): FloatVector2: tmp173 << tmp164, tmp172 V_MAX_F32 vDst(VGPR164) src0(VGPR162) src1(VGPR160) // VOP2 V_MAX_F32 vDst(VGPR165) src0(VGPR163) src1(VGPR161) // VOP2 # 174: OpExtInst(Length): Float: tmp174 << tmp173 V_MUL_F32 vDst(VGPR158) src0(VGPR164) src1(VGPR164) // VOP2 V_MAC_F32 vDst(VGPR158) src0(VGPR165) src1(VGPR165) // VOP2 V_SQRT_F32 vDst(VGPR158) src0(VGPR158) # 175: OpFAdd: Float: tmp175 << tmp170, tmp174 V_ADD_F32 vDst(VGPR160) src0(VGPR159) src1(VGPR158) // VOP2 # OpReturnValue: : << tmp175 S_MOV_B32 sDst(M0) src0(SGPR30) V_MOVRELD_B32 vDst(VGPR0) src0(VGPR160) S_SETPC_B64 sDst(SGPR28) src0(SGPR28) # Float concav(vf3;(FloatVector3* p) Function: Float concav(vf3;() S_MOV_B64 sDst(SGPR100) src0(EXEC) # lb27 Label: lb27 # 182: OpLoad: FloatVector3: tmp182 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR35) const: 0x0 V_MOVRELS_B32 vDst(VGPR160) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR161) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR162) src0(VGPR2) # 183: OpVectorShuffle: FloatVector2: tmp183 << tmp182, tmp182, 0, 1 V_MOV_B32 vDst(VGPR158) src0(VGPR160) V_MOV_B32 vDst(VGPR159) src0(VGPR161) # 185: OpCompositeConstruct: FloatVector2: tmp185 << const179, const179 S_MOV_B32 sDst(SGPR99) src0(LITERAL_CONST) const: 0x40133333 V_MOV_B32 vDst(VGPR160) src0(SGPR99) S_MOV_B32 sDst(SGPR99) src0(LITERAL_CONST) const: 0x40133333 V_MOV_B32 vDst(VGPR161) src0(SGPR99) # 186: OpFDiv: FloatVector2: tmp186 << tmp183, tmp185 V_RCP_F32 vDst(VGPR162) src0(VGPR160) V_RCP_F32 vDst(VGPR163) src0(VGPR161) V_MUL_F32 vDst(VGPR162) src0(VGPR158) src1(VGPR162) // VOP2 V_MUL_F32 vDst(VGPR163) src0(VGPR159) src1(VGPR163) // VOP2 V_DIV_FIXUP_F32 vDst(VGPR162) src0(VGPR162) src1(VGPR160) src2(VGPR158) abs(0) clamp(0) omod(0) neg(0) // VOP3a V_DIV_FIXUP_F32 vDst(VGPR163) src0(VGPR163) src1(VGPR161) src2(VGPR159) abs(0) clamp(0) omod(0) neg(0) // VOP3a # 187: OpExtInst(Length): Float: tmp187 << tmp186 V_MUL_F32 vDst(VGPR158) src0(VGPR162) src1(VGPR162) // VOP2 V_MAC_F32 vDst(VGPR158) src0(VGPR163) src1(VGPR163) // VOP2 V_SQRT_F32 vDst(VGPR158) src0(VGPR158) # 188: OpAccessChain: Float*: p[2] # 189: OpLoad: Float: tmp189 << p[2] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR35) const: 0x0 V_MOVRELS_B32 vDst(VGPR159) src0(VGPR2) # 191: OpFDiv: Float: tmp191 << tmp189, const148 V_MOV_B32 vDst(VGPR160) src0(LITERAL_CONST) const: 0x3f333333 V_RCP_F32 vDst(VGPR161) src0(VGPR160) V_MUL_F32 vDst(VGPR161) src0(VGPR159) src1(VGPR161) // VOP2 V_DIV_FIXUP_F32 vDst(VGPR161) src0(VGPR161) src1(VGPR160) src2(VGPR159) abs(0) clamp(0) omod(0) neg(0) // VOP3a # 192: OpCompositeConstruct: FloatVector2: tmp192 << tmp187, tmp191 V_MOV_B32 vDst(VGPR162) src0(VGPR158) V_MOV_B32 vDst(VGPR163) src0(VGPR161) # 193: OpExtInst(FAbs): FloatVector2: tmp193 << tmp192 V_ADD_F32 vDst(VGPR158) src0(VGPR162) src1(0) src2(N/A) abs(1) clamp(0) omod(0) neg(0) // VOP3a V_ADD_F32 vDst(VGPR159) src0(VGPR163) src1(0) src2(N/A) abs(1) clamp(0) omod(0) neg(0) // VOP3a # 194: OpCompositeConstruct: FloatVector2: tmp194 << const54, const54 V_MOV_B32 vDst(VGPR160) src0(1_0_F) V_MOV_B32 vDst(VGPR161) src0(1_0_F) # 195: OpFSub: FloatVector2: tmp195 << tmp193, tmp194 V_SUB_F32 vDst(VGPR162) src0(VGPR158) src1(VGPR160) // VOP2 V_SUB_F32 vDst(VGPR163) src0(VGPR159) src1(VGPR161) // VOP2 # 196: OpAccessChain: Float*: d[0] # 197: OpCompositeExtract: Float: tmp197 << tmp195, 0 V_MOV_B32 vDst(VGPR158) src0(VGPR162) # 198: OpAccessChain: Float*: d[1] # 199: OpCompositeExtract: Float: tmp199 << tmp195, 1 V_MOV_B32 vDst(VGPR159) src0(VGPR163) # 200: OpExtInst(FMax): Float: tmp200 << tmp197, tmp199 V_MAX_F32 vDst(VGPR160) src0(VGPR158) src1(VGPR159) // VOP2 # 201: OpExtInst(FMin): Float: tmp201 << tmp200, const55 V_MOV_B32 vDst(VGPR158) src0(LITERAL_CONST) const: 0x00000000 V_MIN_F32 vDst(VGPR159) src0(VGPR160) src1(VGPR158) // VOP2 # 203: OpCompositeConstruct: FloatVector2: tmp203 << const55, const55 S_MOV_B32 sDst(SGPR99) src0(LITERAL_CONST) const: 0x0 V_MOV_B32 vDst(VGPR160) src0(SGPR99) S_MOV_B32 sDst(SGPR99) src0(LITERAL_CONST) const: 0x0 V_MOV_B32 vDst(VGPR161) src0(SGPR99) # 204: OpExtInst(FMax): FloatVector2: tmp204 << tmp195, tmp203 V_MAX_F32 vDst(VGPR164) src0(VGPR162) src1(VGPR160) // VOP2 V_MAX_F32 vDst(VGPR165) src0(VGPR163) src1(VGPR161) // VOP2 # 205: OpExtInst(Length): Float: tmp205 << tmp204 V_MUL_F32 vDst(VGPR158) src0(VGPR164) src1(VGPR164) // VOP2 V_MAC_F32 vDst(VGPR158) src0(VGPR165) src1(VGPR165) // VOP2 V_SQRT_F32 vDst(VGPR158) src0(VGPR158) # 206: OpFAdd: Float: tmp206 << tmp201, tmp205 V_ADD_F32 vDst(VGPR160) src0(VGPR159) src1(VGPR158) // VOP2 # OpReturnValue: : << tmp206 S_MOV_B32 sDst(M0) src0(SGPR34) V_MOVRELD_B32 vDst(VGPR0) src0(VGPR160) S_SETPC_B64 sDst(SGPR32) src0(SGPR32) # Float sceneSDF(vf3;(FloatVector3* p) Function: Float sceneSDF(vf3;() S_MOV_B64 sDst(SGPR100) src0(EXEC) # lb30 Label: lb30 # 210: OpAccessChain: Float*: p[2] # 211: OpLoad: Float: tmp211 << p[2] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR39) const: 0x0 V_MOVRELS_B32 vDst(VGPR158) src0(VGPR2) # 212: OpFAdd: Float: tmp212 << tmp211, const209 V_MOV_B32 vDst(VGPR159) src0(LITERAL_CONST) const: 0x41200000 V_ADD_F32 vDst(VGPR160) src0(VGPR158) src1(VGPR159) // VOP2 # 213: OpAccessChain: Float*: p[2] # OpStore: : tmp212 >> p[2] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR39) const: 0x0 V_MOVRELD_B32 vDst(VGPR2) src0(VGPR160) # 217: OpLoad: Float: tmp217 << iTime S_LOAD_DWORD_IMM offset(0) sBase(SGPR[0:1]) sDst(SGPR99) S_WAITCNT 0 # OpStore: : tmp217 >> param216 V_MOV_B32 vDst(VGPR30) src0(SGPR99) # 218: OpFunctionCall: FloatMatrix2x2: rot(f1;(param216) S_ADD_U32 sDst(SGPR18) src0(LITERAL_CONST) src1(0) const: 0x1e # VGPR214 S_MOV_B64 sDst(SGPR40) src0(EXEC) S_MOV_B32 sDst(SGPR13) src0(LITERAL_CONST) const: 0x46 # VGPR[257:260] # Indirect branch to rot(f1;: -1440 S_GETPC_B64 sDst(SGPR16) src0(SGPR16) S_SUB_U32 sDst(SGPR16) src0(SGPR16) src1(LITERAL_CONST) const: 0x5a0 S_SUBB_U32 sDst(SGPR17) src0(SGPR17) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR16) src0(SGPR16) S_MOV_B64 sDst(EXEC) src0(SGPR40) # .lbl3 # 219: OpLoad: FloatVector3: tmp219 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR39) const: 0x0 V_MOVRELS_B32 vDst(VGPR158) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR159) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR160) src0(VGPR2) # 220: OpVectorShuffle: FloatVector2: tmp220 << tmp219, tmp219, 0, 2 V_MOV_B32 vDst(VGPR161) src0(VGPR158) V_MOV_B32 vDst(VGPR162) src0(VGPR160) # 221: OpVectorTimesMatrix: FloatVector2: tmp221 << tmp220, rot(f1; V_MUL_F32 vDst(VGPR158) src0(VGPR161) src1(VGPR70) // VOP2 V_MUL_F32 vDst(VGPR159) src0(VGPR161) src1(VGPR72) // VOP2 V_MAC_F32 vDst(VGPR158) src0(VGPR162) src1(VGPR71) // VOP2 V_MAC_F32 vDst(VGPR159) src0(VGPR162) src1(VGPR73) // VOP2 # 222: OpLoad: FloatVector3: tmp222 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR39) const: 0x0 V_MOVRELS_B32 vDst(VGPR160) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR161) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR162) src0(VGPR2) # 223: OpVectorShuffle: FloatVector3: tmp223 << tmp222, tmp221, 3, 1, 4 V_MOV_B32 vDst(VGPR163) src0(VGPR158) V_MOV_B32 vDst(VGPR164) src0(VGPR161) V_MOV_B32 vDst(VGPR165) src0(VGPR159) # OpStore: : tmp223 >> p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR39) const: 0x0 V_MOVRELD_B32 vDst(VGPR0) src0(VGPR163) V_MOVRELD_B32 vDst(VGPR1) src0(VGPR164) V_MOVRELD_B32 vDst(VGPR2) src0(VGPR165) # 225: OpLoad: Float: tmp225 << iTime S_LOAD_DWORD_IMM offset(0) sBase(SGPR[0:1]) sDst(SGPR99) S_WAITCNT 0 # 226: OpFMul: Float: tmp226 << const224, tmp225 V_MOV_B32 vDst(VGPR158) src0(LITERAL_CONST) const: 0x40266666 V_MOV_B32 vDst(VGPR159) src0(SGPR99) V_MUL_F32 vDst(VGPR160) src0(VGPR158) src1(VGPR159) // VOP2 # OpStore: : tmp226 >> param227 V_MOV_B32 vDst(VGPR31) src0(VGPR160) # 228: OpFunctionCall: FloatMatrix2x2: rot(f1;(param227) S_ADD_U32 sDst(SGPR18) src0(LITERAL_CONST) src1(0) const: 0x1f # VGPR215 S_MOV_B64 sDst(SGPR42) src0(EXEC) S_MOV_B32 sDst(SGPR13) src0(LITERAL_CONST) const: 0x4a # VGPR[277:280] # Indirect branch to rot(f1;: -1616 S_GETPC_B64 sDst(SGPR16) src0(SGPR16) S_SUB_U32 sDst(SGPR16) src0(SGPR16) src1(LITERAL_CONST) const: 0x650 S_SUBB_U32 sDst(SGPR17) src0(SGPR17) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR16) src0(SGPR16) S_MOV_B64 sDst(EXEC) src0(SGPR42) # .lbl4 # 229: OpLoad: FloatVector3: tmp229 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR39) const: 0x0 V_MOVRELS_B32 vDst(VGPR158) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR159) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR160) src0(VGPR2) # 230: OpVectorShuffle: FloatVector2: tmp230 << tmp229, tmp229, 0, 1 V_MOV_B32 vDst(VGPR161) src0(VGPR158) V_MOV_B32 vDst(VGPR162) src0(VGPR159) # 231: OpVectorTimesMatrix: FloatVector2: tmp231 << tmp230, rot(f1; V_MUL_F32 vDst(VGPR158) src0(VGPR161) src1(VGPR74) // VOP2 V_MUL_F32 vDst(VGPR159) src0(VGPR161) src1(VGPR76) // VOP2 V_MAC_F32 vDst(VGPR158) src0(VGPR162) src1(VGPR75) // VOP2 V_MAC_F32 vDst(VGPR159) src0(VGPR162) src1(VGPR77) // VOP2 # 232: OpLoad: FloatVector3: tmp232 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR39) const: 0x0 V_MOVRELS_B32 vDst(VGPR160) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR161) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR162) src0(VGPR2) # 233: OpVectorShuffle: FloatVector3: tmp233 << tmp232, tmp231, 3, 4, 2 V_MOV_B32 vDst(VGPR163) src0(VGPR158) V_MOV_B32 vDst(VGPR164) src0(VGPR159) V_MOV_B32 vDst(VGPR165) src0(VGPR162) # OpStore: : tmp233 >> p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR39) const: 0x0 V_MOVRELD_B32 vDst(VGPR0) src0(VGPR163) V_MOVRELD_B32 vDst(VGPR1) src0(VGPR164) V_MOVRELD_B32 vDst(VGPR2) src0(VGPR165) # OpStore: : const235 >> param238 S_MOV_B32 sDst(SGPR99) src0(LITERAL_CONST) const: 0x3f65c8fa V_MOV_B32 vDst(VGPR32) src0(SGPR99) # 240: OpFunctionCall: FloatMatrix2x2: rot(f1;(param238) S_ADD_U32 sDst(SGPR18) src0(LITERAL_CONST) src1(0) const: 0x20 # VGPR216 S_MOV_B64 sDst(SGPR44) src0(EXEC) S_MOV_B32 sDst(SGPR13) src0(LITERAL_CONST) const: 0x4e # VGPR[295:298] # Indirect branch to rot(f1;: -1772 S_GETPC_B64 sDst(SGPR16) src0(SGPR16) S_SUB_U32 sDst(SGPR16) src0(SGPR16) src1(LITERAL_CONST) const: 0x6ec S_SUBB_U32 sDst(SGPR17) src0(SGPR17) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR16) src0(SGPR16) S_MOV_B64 sDst(EXEC) src0(SGPR44) # .lbl5 # 247: OpMatrixTimesVector: FloatVector2: tmp247 << rot(f1;, const243 V_MOV_B32 vDst(VGPR158) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR159) src0(LITERAL_CONST) const: 0xc0600000 V_MUL_F32 vDst(VGPR82) src0(VGPR78) src1(VGPR158) // VOP2 V_MUL_F32 vDst(VGPR83) src0(VGPR79) src1(VGPR158) // VOP2 V_MAC_F32 vDst(VGPR82) src0(VGPR80) src1(VGPR159) // VOP2 V_MAC_F32 vDst(VGPR83) src0(VGPR81) src1(VGPR159) // VOP2 # 251: OpMatrixTimesVector: FloatVector2: tmp251 << rot(f1;, tmp247 V_MUL_F32 vDst(VGPR84) src0(VGPR78) src1(VGPR82) // VOP2 V_MUL_F32 vDst(VGPR85) src0(VGPR79) src1(VGPR82) // VOP2 V_MAC_F32 vDst(VGPR84) src0(VGPR80) src1(VGPR83) // VOP2 V_MAC_F32 vDst(VGPR85) src0(VGPR81) src1(VGPR83) // VOP2 # 255: OpMatrixTimesVector: FloatVector2: tmp255 << rot(f1;, tmp251 V_MUL_F32 vDst(VGPR86) src0(VGPR78) src1(VGPR84) // VOP2 V_MUL_F32 vDst(VGPR87) src0(VGPR79) src1(VGPR84) // VOP2 V_MAC_F32 vDst(VGPR86) src0(VGPR80) src1(VGPR85) // VOP2 V_MAC_F32 vDst(VGPR87) src0(VGPR81) src1(VGPR85) // VOP2 # 259: OpMatrixTimesVector: FloatVector2: tmp259 << rot(f1;, tmp255 V_MUL_F32 vDst(VGPR88) src0(VGPR78) src1(VGPR86) // VOP2 V_MUL_F32 vDst(VGPR89) src0(VGPR79) src1(VGPR86) // VOP2 V_MAC_F32 vDst(VGPR88) src0(VGPR80) src1(VGPR87) // VOP2 V_MAC_F32 vDst(VGPR89) src0(VGPR81) src1(VGPR87) // VOP2 # 263: OpMatrixTimesVector: FloatVector2: tmp263 << rot(f1;, tmp259 V_MUL_F32 vDst(VGPR90) src0(VGPR78) src1(VGPR88) // VOP2 V_MUL_F32 vDst(VGPR91) src0(VGPR79) src1(VGPR88) // VOP2 V_MAC_F32 vDst(VGPR90) src0(VGPR80) src1(VGPR89) // VOP2 V_MAC_F32 vDst(VGPR91) src0(VGPR81) src1(VGPR89) // VOP2 # 267: OpMatrixTimesVector: FloatVector2: tmp267 << rot(f1;, tmp263 V_MUL_F32 vDst(VGPR92) src0(VGPR78) src1(VGPR90) // VOP2 V_MUL_F32 vDst(VGPR93) src0(VGPR79) src1(VGPR90) // VOP2 V_MAC_F32 vDst(VGPR92) src0(VGPR80) src1(VGPR91) // VOP2 V_MAC_F32 vDst(VGPR93) src0(VGPR81) src1(VGPR91) // VOP2 # 270: OpLoad: FloatVector3: tmp270 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR39) const: 0x0 V_MOVRELS_B32 vDst(VGPR158) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR159) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR160) src0(VGPR2) # 273: OpCompositeExtract: Float: tmp273 << const243, 0 S_MOV_B32 sDst(SGPR99) src0(LITERAL_CONST) const: 0x0 S_MOV_B32 sDst(SGPR100) src0(SGPR99) # 274: OpCompositeExtract: Float: tmp274 << const243, 1 S_MOV_B32 sDst(SGPR99) src0(LITERAL_CONST) const: 0xc0600000 S_MOV_B32 sDst(SGPR101) src0(SGPR100) # 275: OpCompositeConstruct: FloatVector3: tmp275 << tmp273, tmp274, const55 V_MOV_B32 vDst(VGPR161) src0(SGPR100) V_MOV_B32 vDst(VGPR162) src0(SGPR101) S_MOV_B32 sDst(SGPR99) src0(LITERAL_CONST) const: 0x0 V_MOV_B32 vDst(VGPR163) src0(SGPR99) # 276: OpFAdd: FloatVector3: tmp276 << tmp270, tmp275 V_ADD_F32 vDst(VGPR164) src0(VGPR158) src1(VGPR161) // VOP2 V_ADD_F32 vDst(VGPR165) src0(VGPR159) src1(VGPR162) // VOP2 V_ADD_F32 vDst(VGPR166) src0(VGPR160) src1(VGPR163) // VOP2 # 278: OpFMul: Float: tmp278 << const55, const235 V_MOV_B32 vDst(VGPR158) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR159) src0(LITERAL_CONST) const: 0x3f65c8fa V_MUL_F32 vDst(VGPR160) src0(VGPR158) src1(VGPR159) // VOP2 # OpStore: : tmp276 >> param279 V_MOV_B32 vDst(VGPR34) src0(VGPR164) V_MOV_B32 vDst(VGPR35) src0(VGPR165) V_MOV_B32 vDst(VGPR36) src0(VGPR166) # OpStore: : tmp278 >> param280 V_MOV_B32 vDst(VGPR37) src0(VGPR160) # 281: OpFunctionCall: Float: blade(vf3;f1;(param279, param280) S_ADD_U32 sDst(SGPR22) src0(LITERAL_CONST) src1(0) const: 0x22 # VGPR[218:220] S_ADD_U32 sDst(SGPR23) src0(LITERAL_CONST) src1(0) const: 0x25 # VGPR221 S_MOV_B64 sDst(SGPR46) src0(EXEC) S_MOV_B32 sDst(SGPR19) src0(LITERAL_CONST) const: 0x5e # VGPR330 # Indirect branch to blade(vf3;f1;: -1932 S_GETPC_B64 sDst(SGPR20) src0(SGPR20) S_SUB_U32 sDst(SGPR20) src0(SGPR20) src1(LITERAL_CONST) const: 0x78c S_SUBB_U32 sDst(SGPR21) src0(SGPR21) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR20) src0(SGPR20) S_MOV_B64 sDst(EXEC) src0(SGPR46) # .lbl6 # 282: OpLoad: FloatVector3: tmp282 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR39) const: 0x0 V_MOVRELS_B32 vDst(VGPR160) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR161) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR162) src0(VGPR2) # 285: OpCompositeExtract: Float: tmp285 << tmp247, 0 V_MOV_B32 vDst(VGPR158) src0(VGPR82) # 286: OpCompositeExtract: Float: tmp286 << tmp247, 1 V_MOV_B32 vDst(VGPR159) src0(VGPR83) # 287: OpCompositeConstruct: FloatVector3: tmp287 << tmp285, tmp286, const55 V_MOV_B32 vDst(VGPR163) src0(VGPR158) V_MOV_B32 vDst(VGPR164) src0(VGPR159) S_MOV_B32 sDst(SGPR99) src0(LITERAL_CONST) const: 0x0 V_MOV_B32 vDst(VGPR165) src0(SGPR99) # 288: OpFAdd: FloatVector3: tmp288 << tmp282, tmp287 V_ADD_F32 vDst(VGPR166) src0(VGPR160) src1(VGPR163) // VOP2 V_ADD_F32 vDst(VGPR167) src0(VGPR161) src1(VGPR164) // VOP2 V_ADD_F32 vDst(VGPR168) src0(VGPR162) src1(VGPR165) // VOP2 # 290: OpFMul: Float: tmp290 << const54, const235 V_MOV_B32 vDst(VGPR158) src0(LITERAL_CONST) const: 0x3f65c8fa V_MUL_F32 vDst(VGPR159) src0(1_0_F) src1(VGPR158) // VOP2 # OpStore: : tmp288 >> param291 V_MOV_B32 vDst(VGPR38) src0(VGPR166) V_MOV_B32 vDst(VGPR39) src0(VGPR167) V_MOV_B32 vDst(VGPR40) src0(VGPR168) # OpStore: : tmp290 >> param292 V_MOV_B32 vDst(VGPR41) src0(VGPR159) # 293: OpFunctionCall: Float: blade(vf3;f1;(param291, param292) S_ADD_U32 sDst(SGPR22) src0(LITERAL_CONST) src1(0) const: 0x26 # VGPR[222:224] S_ADD_U32 sDst(SGPR23) src0(LITERAL_CONST) src1(0) const: 0x29 # VGPR225 S_MOV_B64 sDst(SGPR48) src0(EXEC) S_MOV_B32 sDst(SGPR19) src0(LITERAL_CONST) const: 0x5f # VGPR345 # Indirect branch to blade(vf3;f1;: -2076 S_GETPC_B64 sDst(SGPR20) src0(SGPR20) S_SUB_U32 sDst(SGPR20) src0(SGPR20) src1(LITERAL_CONST) const: 0x81c S_SUBB_U32 sDst(SGPR21) src0(SGPR21) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR20) src0(SGPR20) S_MOV_B64 sDst(EXEC) src0(SGPR48) # .lbl7 # 294: OpExtInst(FMin): Float: tmp294 << blade(vf3;f1;, blade(vf3;f1; V_MIN_F32 vDst(VGPR96) src0(VGPR94) src1(VGPR95) // VOP2 # 295: OpLoad: FloatVector3: tmp295 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR39) const: 0x0 V_MOVRELS_B32 vDst(VGPR158) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR159) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR160) src0(VGPR2) # 298: OpCompositeExtract: Float: tmp298 << tmp251, 0 V_MOV_B32 vDst(VGPR161) src0(VGPR84) # 299: OpCompositeExtract: Float: tmp299 << tmp251, 1 V_MOV_B32 vDst(VGPR162) src0(VGPR85) # 300: OpCompositeConstruct: FloatVector3: tmp300 << tmp298, tmp299, const55 V_MOV_B32 vDst(VGPR163) src0(VGPR161) V_MOV_B32 vDst(VGPR164) src0(VGPR162) S_MOV_B32 sDst(SGPR99) src0(LITERAL_CONST) const: 0x0 V_MOV_B32 vDst(VGPR165) src0(SGPR99) # 301: OpFAdd: FloatVector3: tmp301 << tmp295, tmp300 V_ADD_F32 vDst(VGPR166) src0(VGPR158) src1(VGPR163) // VOP2 V_ADD_F32 vDst(VGPR167) src0(VGPR159) src1(VGPR164) // VOP2 V_ADD_F32 vDst(VGPR168) src0(VGPR160) src1(VGPR165) // VOP2 # 303: OpFMul: Float: tmp303 << const110, const235 V_MOV_B32 vDst(VGPR158) src0(LITERAL_CONST) const: 0x3f65c8fa V_MUL_F32 vDst(VGPR159) src0(2_0_F) src1(VGPR158) // VOP2 # OpStore: : tmp301 >> param304 V_MOV_B32 vDst(VGPR42) src0(VGPR166) V_MOV_B32 vDst(VGPR43) src0(VGPR167) V_MOV_B32 vDst(VGPR44) src0(VGPR168) # OpStore: : tmp303 >> param305 V_MOV_B32 vDst(VGPR45) src0(VGPR159) # 306: OpFunctionCall: Float: blade(vf3;f1;(param304, param305) S_ADD_U32 sDst(SGPR22) src0(LITERAL_CONST) src1(0) const: 0x2a # VGPR[226:228] S_ADD_U32 sDst(SGPR23) src0(LITERAL_CONST) src1(0) const: 0x2d # VGPR229 S_MOV_B64 sDst(SGPR50) src0(EXEC) S_MOV_B32 sDst(SGPR19) src0(LITERAL_CONST) const: 0x61 # VGPR361 # Indirect branch to blade(vf3;f1;: -2224 S_GETPC_B64 sDst(SGPR20) src0(SGPR20) S_SUB_U32 sDst(SGPR20) src0(SGPR20) src1(LITERAL_CONST) const: 0x8b0 S_SUBB_U32 sDst(SGPR21) src0(SGPR21) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR20) src0(SGPR20) S_MOV_B64 sDst(EXEC) src0(SGPR50) # .lbl8 # 307: OpLoad: FloatVector3: tmp307 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR39) const: 0x0 V_MOVRELS_B32 vDst(VGPR158) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR159) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR160) src0(VGPR2) # 310: OpCompositeExtract: Float: tmp310 << tmp255, 0 V_MOV_B32 vDst(VGPR161) src0(VGPR86) # 311: OpCompositeExtract: Float: tmp311 << tmp255, 1 V_MOV_B32 vDst(VGPR162) src0(VGPR87) # 312: OpCompositeConstruct: FloatVector3: tmp312 << tmp310, tmp311, const55 V_MOV_B32 vDst(VGPR163) src0(VGPR161) V_MOV_B32 vDst(VGPR164) src0(VGPR162) S_MOV_B32 sDst(SGPR99) src0(LITERAL_CONST) const: 0x0 V_MOV_B32 vDst(VGPR165) src0(SGPR99) # 313: OpFAdd: FloatVector3: tmp313 << tmp307, tmp312 V_ADD_F32 vDst(VGPR166) src0(VGPR158) src1(VGPR163) // VOP2 V_ADD_F32 vDst(VGPR167) src0(VGPR159) src1(VGPR164) // VOP2 V_ADD_F32 vDst(VGPR168) src0(VGPR160) src1(VGPR165) // VOP2 # 315: OpFMul: Float: tmp315 << const93, const235 V_MOV_B32 vDst(VGPR158) src0(LITERAL_CONST) const: 0x40400000 V_MOV_B32 vDst(VGPR159) src0(LITERAL_CONST) const: 0x3f65c8fa V_MUL_F32 vDst(VGPR160) src0(VGPR158) src1(VGPR159) // VOP2 # OpStore: : tmp313 >> param316 V_MOV_B32 vDst(VGPR46) src0(VGPR166) V_MOV_B32 vDst(VGPR47) src0(VGPR167) V_MOV_B32 vDst(VGPR48) src0(VGPR168) # OpStore: : tmp315 >> param317 V_MOV_B32 vDst(VGPR49) src0(VGPR160) # 318: OpFunctionCall: Float: blade(vf3;f1;(param316, param317) S_ADD_U32 sDst(SGPR22) src0(LITERAL_CONST) src1(0) const: 0x2e # VGPR[230:232] S_ADD_U32 sDst(SGPR23) src0(LITERAL_CONST) src1(0) const: 0x31 # VGPR233 S_MOV_B64 sDst(SGPR52) src0(EXEC) S_MOV_B32 sDst(SGPR19) src0(LITERAL_CONST) const: 0x62 # VGPR377 # Indirect branch to blade(vf3;f1;: -2376 S_GETPC_B64 sDst(SGPR20) src0(SGPR20) S_SUB_U32 sDst(SGPR20) src0(SGPR20) src1(LITERAL_CONST) const: 0x948 S_SUBB_U32 sDst(SGPR21) src0(SGPR21) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR20) src0(SGPR20) S_MOV_B64 sDst(EXEC) src0(SGPR52) # .lbl9 # 319: OpExtInst(FMin): Float: tmp319 << blade(vf3;f1;, blade(vf3;f1; V_MIN_F32 vDst(VGPR158) src0(VGPR97) src1(VGPR98) // VOP2 # 320: OpExtInst(FMin): Float: tmp320 << tmp294, tmp319 V_MIN_F32 vDst(VGPR159) src0(VGPR96) src1(VGPR158) // VOP2 # OpStore: : tmp320 >> d V_MOV_B32 vDst(VGPR33) src0(VGPR159) # 321: OpLoad: Float: tmp321 << d # 322: OpLoad: FloatVector3: tmp322 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR39) const: 0x0 V_MOVRELS_B32 vDst(VGPR158) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR159) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR160) src0(VGPR2) # 325: OpCompositeExtract: Float: tmp325 << tmp259, 0 V_MOV_B32 vDst(VGPR161) src0(VGPR88) # 326: OpCompositeExtract: Float: tmp326 << tmp259, 1 V_MOV_B32 vDst(VGPR162) src0(VGPR89) # 327: OpCompositeConstruct: FloatVector3: tmp327 << tmp325, tmp326, const55 V_MOV_B32 vDst(VGPR163) src0(VGPR161) V_MOV_B32 vDst(VGPR164) src0(VGPR162) S_MOV_B32 sDst(SGPR99) src0(LITERAL_CONST) const: 0x0 V_MOV_B32 vDst(VGPR165) src0(SGPR99) # 328: OpFAdd: FloatVector3: tmp328 << tmp322, tmp327 V_ADD_F32 vDst(VGPR166) src0(VGPR158) src1(VGPR163) // VOP2 V_ADD_F32 vDst(VGPR167) src0(VGPR159) src1(VGPR164) // VOP2 V_ADD_F32 vDst(VGPR168) src0(VGPR160) src1(VGPR165) // VOP2 # 331: OpFMul: Float: tmp331 << const329, const235 V_MOV_B32 vDst(VGPR158) src0(LITERAL_CONST) const: 0x3f65c8fa V_MUL_F32 vDst(VGPR159) src0(4_0_F) src1(VGPR158) // VOP2 # OpStore: : tmp328 >> param332 V_MOV_B32 vDst(VGPR50) src0(VGPR166) V_MOV_B32 vDst(VGPR51) src0(VGPR167) V_MOV_B32 vDst(VGPR52) src0(VGPR168) # OpStore: : tmp331 >> param333 V_MOV_B32 vDst(VGPR53) src0(VGPR159) # 334: OpFunctionCall: Float: blade(vf3;f1;(param332, param333) S_ADD_U32 sDst(SGPR22) src0(LITERAL_CONST) src1(0) const: 0x32 # VGPR[234:236] S_ADD_U32 sDst(SGPR23) src0(LITERAL_CONST) src1(0) const: 0x35 # VGPR237 S_MOV_B64 sDst(SGPR54) src0(EXEC) S_MOV_B32 sDst(SGPR19) src0(LITERAL_CONST) const: 0x63 # VGPR394 # Indirect branch to blade(vf3;f1;: -2532 S_GETPC_B64 sDst(SGPR20) src0(SGPR20) S_SUB_U32 sDst(SGPR20) src0(SGPR20) src1(LITERAL_CONST) const: 0x9e4 S_SUBB_U32 sDst(SGPR21) src0(SGPR21) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR20) src0(SGPR20) S_MOV_B64 sDst(EXEC) src0(SGPR54) # .lbl10 # 335: OpExtInst(FMin): Float: tmp335 << tmp321, blade(vf3;f1; V_MIN_F32 vDst(VGPR100) src0(VGPR33) src1(VGPR99) // VOP2 # 336: OpLoad: FloatVector3: tmp336 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR39) const: 0x0 V_MOVRELS_B32 vDst(VGPR158) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR159) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR160) src0(VGPR2) # 339: OpCompositeExtract: Float: tmp339 << tmp263, 0 V_MOV_B32 vDst(VGPR161) src0(VGPR90) # 340: OpCompositeExtract: Float: tmp340 << tmp263, 1 V_MOV_B32 vDst(VGPR162) src0(VGPR91) # 341: OpCompositeConstruct: FloatVector3: tmp341 << tmp339, tmp340, const55 V_MOV_B32 vDst(VGPR163) src0(VGPR161) V_MOV_B32 vDst(VGPR164) src0(VGPR162) S_MOV_B32 sDst(SGPR99) src0(LITERAL_CONST) const: 0x0 V_MOV_B32 vDst(VGPR165) src0(SGPR99) # 342: OpFAdd: FloatVector3: tmp342 << tmp336, tmp341 V_ADD_F32 vDst(VGPR166) src0(VGPR158) src1(VGPR163) // VOP2 V_ADD_F32 vDst(VGPR167) src0(VGPR159) src1(VGPR164) // VOP2 V_ADD_F32 vDst(VGPR168) src0(VGPR160) src1(VGPR165) // VOP2 # 345: OpFMul: Float: tmp345 << const343, const235 V_MOV_B32 vDst(VGPR158) src0(LITERAL_CONST) const: 0x40a00000 V_MOV_B32 vDst(VGPR159) src0(LITERAL_CONST) const: 0x3f65c8fa V_MUL_F32 vDst(VGPR160) src0(VGPR158) src1(VGPR159) // VOP2 # OpStore: : tmp342 >> param346 V_MOV_B32 vDst(VGPR54) src0(VGPR166) V_MOV_B32 vDst(VGPR55) src0(VGPR167) V_MOV_B32 vDst(VGPR56) src0(VGPR168) # OpStore: : tmp345 >> param347 V_MOV_B32 vDst(VGPR57) src0(VGPR160) # 348: OpFunctionCall: Float: blade(vf3;f1;(param346, param347) S_ADD_U32 sDst(SGPR22) src0(LITERAL_CONST) src1(0) const: 0x36 # VGPR[238:240] S_ADD_U32 sDst(SGPR23) src0(LITERAL_CONST) src1(0) const: 0x39 # VGPR241 S_MOV_B64 sDst(SGPR56) src0(EXEC) S_MOV_B32 sDst(SGPR19) src0(LITERAL_CONST) const: 0x65 # VGPR411 # Indirect branch to blade(vf3;f1;: -2688 S_GETPC_B64 sDst(SGPR20) src0(SGPR20) S_SUB_U32 sDst(SGPR20) src0(SGPR20) src1(LITERAL_CONST) const: 0xa80 S_SUBB_U32 sDst(SGPR21) src0(SGPR21) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR20) src0(SGPR20) S_MOV_B64 sDst(EXEC) src0(SGPR56) # .lbl11 # 349: OpLoad: FloatVector3: tmp349 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR39) const: 0x0 V_MOVRELS_B32 vDst(VGPR160) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR161) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR162) src0(VGPR2) # 352: OpCompositeExtract: Float: tmp352 << tmp267, 0 V_MOV_B32 vDst(VGPR158) src0(VGPR92) # 353: OpCompositeExtract: Float: tmp353 << tmp267, 1 V_MOV_B32 vDst(VGPR159) src0(VGPR93) # 354: OpCompositeConstruct: FloatVector3: tmp354 << tmp352, tmp353, const55 V_MOV_B32 vDst(VGPR163) src0(VGPR158) V_MOV_B32 vDst(VGPR164) src0(VGPR159) S_MOV_B32 sDst(SGPR99) src0(LITERAL_CONST) const: 0x0 V_MOV_B32 vDst(VGPR165) src0(SGPR99) # 355: OpFAdd: FloatVector3: tmp355 << tmp349, tmp354 V_ADD_F32 vDst(VGPR166) src0(VGPR160) src1(VGPR163) // VOP2 V_ADD_F32 vDst(VGPR167) src0(VGPR161) src1(VGPR164) // VOP2 V_ADD_F32 vDst(VGPR168) src0(VGPR162) src1(VGPR165) // VOP2 # 358: OpFMul: Float: tmp358 << const356, const235 V_MOV_B32 vDst(VGPR158) src0(LITERAL_CONST) const: 0x40c00000 V_MOV_B32 vDst(VGPR159) src0(LITERAL_CONST) const: 0x3f65c8fa V_MUL_F32 vDst(VGPR160) src0(VGPR158) src1(VGPR159) // VOP2 # OpStore: : tmp355 >> param359 V_MOV_B32 vDst(VGPR58) src0(VGPR166) V_MOV_B32 vDst(VGPR59) src0(VGPR167) V_MOV_B32 vDst(VGPR60) src0(VGPR168) # OpStore: : tmp358 >> param360 V_MOV_B32 vDst(VGPR61) src0(VGPR160) # 361: OpFunctionCall: Float: blade(vf3;f1;(param359, param360) S_ADD_U32 sDst(SGPR22) src0(LITERAL_CONST) src1(0) const: 0x3a # VGPR[242:244] S_ADD_U32 sDst(SGPR23) src0(LITERAL_CONST) src1(0) const: 0x3d # VGPR245 S_MOV_B64 sDst(SGPR58) src0(EXEC) S_MOV_B32 sDst(SGPR19) src0(LITERAL_CONST) const: 0x66 # VGPR427 # Indirect branch to blade(vf3;f1;: -2840 S_GETPC_B64 sDst(SGPR20) src0(SGPR20) S_SUB_U32 sDst(SGPR20) src0(SGPR20) src1(LITERAL_CONST) const: 0xb18 S_SUBB_U32 sDst(SGPR21) src0(SGPR21) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR20) src0(SGPR20) S_MOV_B64 sDst(EXEC) src0(SGPR58) # .lbl12 # 362: OpExtInst(FMin): Float: tmp362 << blade(vf3;f1;, blade(vf3;f1; V_MIN_F32 vDst(VGPR158) src0(VGPR101) src1(VGPR102) // VOP2 # 363: OpExtInst(FMin): Float: tmp363 << tmp335, tmp362 V_MIN_F32 vDst(VGPR159) src0(VGPR100) src1(VGPR158) // VOP2 # OpStore: : tmp363 >> d V_MOV_B32 vDst(VGPR33) src0(VGPR159) # 364: OpLoad: Float: tmp364 << d # 365: OpLoad: FloatVector3: tmp365 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR39) const: 0x0 V_MOVRELS_B32 vDst(VGPR158) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR159) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR160) src0(VGPR2) # 367: OpFAdd: Float: tmp367 << const148, const55 V_MOV_B32 vDst(VGPR161) src0(LITERAL_CONST) const: 0x3f333333 V_MOV_B32 vDst(VGPR162) src0(LITERAL_CONST) const: 0x00000000 V_ADD_F32 vDst(VGPR163) src0(VGPR161) src1(VGPR162) // VOP2 # 368: OpCompositeConstruct: FloatVector3: tmp368 << const55, const55, tmp367 S_MOV_B32 sDst(SGPR99) src0(LITERAL_CONST) const: 0x0 V_MOV_B32 vDst(VGPR164) src0(SGPR99) S_MOV_B32 sDst(SGPR99) src0(LITERAL_CONST) const: 0x0 V_MOV_B32 vDst(VGPR165) src0(SGPR99) V_MOV_B32 vDst(VGPR166) src0(VGPR163) # 369: OpFAdd: FloatVector3: tmp369 << tmp365, tmp368 V_ADD_F32 vDst(VGPR167) src0(VGPR158) src1(VGPR164) // VOP2 V_ADD_F32 vDst(VGPR168) src0(VGPR159) src1(VGPR165) // VOP2 V_ADD_F32 vDst(VGPR169) src0(VGPR160) src1(VGPR166) // VOP2 # OpStore: : tmp369 >> param370 V_MOV_B32 vDst(VGPR62) src0(VGPR167) V_MOV_B32 vDst(VGPR63) src0(VGPR168) V_MOV_B32 vDst(VGPR64) src0(VGPR169) # 371: OpFunctionCall: Float: centre(vf3;(param370) S_ADD_U32 sDst(SGPR31) src0(LITERAL_CONST) src1(0) const: 0x3e # VGPR[246:248] S_MOV_B64 sDst(SGPR60) src0(EXEC) S_MOV_B32 sDst(SGPR30) src0(LITERAL_CONST) const: 0x67 # VGPR444 # Indirect branch to centre(vf3;: -2272 S_GETPC_B64 sDst(SGPR28) src0(SGPR28) S_SUB_U32 sDst(SGPR28) src0(SGPR28) src1(LITERAL_CONST) const: 0x8e0 S_SUBB_U32 sDst(SGPR29) src0(SGPR29) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR28) src0(SGPR28) S_MOV_B64 sDst(EXEC) src0(SGPR60) # .lbl13 # 372: OpExtInst(FMin): Float: tmp372 << tmp364, centre(vf3; V_MIN_F32 vDst(VGPR158) src0(VGPR33) src1(VGPR103) // VOP2 # OpStore: : tmp372 >> d V_MOV_B32 vDst(VGPR33) src0(VGPR158) # 373: OpLoad: Float: tmp373 << d # 374: OpLoad: FloatVector3: tmp374 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR39) const: 0x0 V_MOVRELS_B32 vDst(VGPR158) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR159) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR160) src0(VGPR2) # 376: OpFAdd: Float: tmp376 << const54, const55 V_MOV_B32 vDst(VGPR161) src0(LITERAL_CONST) const: 0x00000000 V_ADD_F32 vDst(VGPR162) src0(1_0_F) src1(VGPR161) // VOP2 # 377: OpCompositeConstruct: FloatVector3: tmp377 << const55, const55, tmp376 S_MOV_B32 sDst(SGPR99) src0(LITERAL_CONST) const: 0x0 V_MOV_B32 vDst(VGPR163) src0(SGPR99) S_MOV_B32 sDst(SGPR99) src0(LITERAL_CONST) const: 0x0 V_MOV_B32 vDst(VGPR164) src0(SGPR99) V_MOV_B32 vDst(VGPR165) src0(VGPR162) # 378: OpFAdd: FloatVector3: tmp378 << tmp374, tmp377 V_ADD_F32 vDst(VGPR166) src0(VGPR158) src1(VGPR163) // VOP2 V_ADD_F32 vDst(VGPR167) src0(VGPR159) src1(VGPR164) // VOP2 V_ADD_F32 vDst(VGPR168) src0(VGPR160) src1(VGPR165) // VOP2 # OpStore: : tmp378 >> param379 V_MOV_B32 vDst(VGPR65) src0(VGPR166) V_MOV_B32 vDst(VGPR66) src0(VGPR167) V_MOV_B32 vDst(VGPR67) src0(VGPR168) # 380: OpFunctionCall: Float: concav(vf3;(param379) S_ADD_U32 sDst(SGPR35) src0(LITERAL_CONST) src1(0) const: 0x41 # VGPR[249:251] S_MOV_B64 sDst(SGPR62) src0(EXEC) S_MOV_B32 sDst(SGPR34) src0(LITERAL_CONST) const: 0x68 # VGPR459 # Indirect branch to concav(vf3;: -2152 S_GETPC_B64 sDst(SGPR32) src0(SGPR32) S_SUB_U32 sDst(SGPR32) src0(SGPR32) src1(LITERAL_CONST) const: 0x868 S_SUBB_U32 sDst(SGPR33) src0(SGPR33) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR32) src0(SGPR32) S_MOV_B64 sDst(EXEC) src0(SGPR62) # .lbl14 # 381: OpFNegate: Float: tmp381 << concav(vf3; V_MUL_F32 vDst(VGPR158) src0(M1_0_F) src1(VGPR104) // VOP2 # 382: OpExtInst(FMax): Float: tmp382 << tmp373, tmp381 V_MAX_F32 vDst(VGPR159) src0(VGPR33) src1(VGPR158) // VOP2 # OpStore: : tmp382 >> d V_MOV_B32 vDst(VGPR33) src0(VGPR159) # OpStore: : const387 >> param388 S_MOV_B32 sDst(SGPR99) src0(LITERAL_CONST) const: 0x40060a92 V_MOV_B32 vDst(VGPR68) src0(SGPR99) # 389: OpFunctionCall: FloatMatrix2x2: rot(f1;(param388) S_ADD_U32 sDst(SGPR18) src0(LITERAL_CONST) src1(0) const: 0x44 # VGPR252 S_MOV_B64 sDst(SGPR64) src0(EXEC) S_MOV_B32 sDst(SGPR13) src0(LITERAL_CONST) const: 0x69 # VGPR[463:466] # Indirect branch to rot(f1;: -3324 S_GETPC_B64 sDst(SGPR16) src0(SGPR16) S_SUB_U32 sDst(SGPR16) src0(SGPR16) src1(LITERAL_CONST) const: 0xcfc S_SUBB_U32 sDst(SGPR17) src0(SGPR17) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR16) src0(SGPR16) S_MOV_B64 sDst(EXEC) src0(SGPR64) # .lbl15 # 391: OpMatrixTimesVector: FloatVector2: tmp391 << rot(f1;, const385 V_MOV_B32 vDst(VGPR160) src0(LITERAL_CONST) const: 0x3e4ccccd V_MOV_B32 vDst(VGPR161) src0(LITERAL_CONST) const: 0x3e4ccccd V_MUL_F32 vDst(VGPR109) src0(VGPR105) src1(VGPR160) // VOP2 V_MUL_F32 vDst(VGPR110) src0(VGPR106) src1(VGPR160) // VOP2 V_MAC_F32 vDst(VGPR109) src0(VGPR107) src1(VGPR161) // VOP2 V_MAC_F32 vDst(VGPR110) src0(VGPR108) src1(VGPR161) // VOP2 # OpStore: : const387 >> param393 S_MOV_B32 sDst(SGPR99) src0(LITERAL_CONST) const: 0x40060a92 V_MOV_B32 vDst(VGPR69) src0(SGPR99) # 394: OpFunctionCall: FloatMatrix2x2: rot(f1;(param393) S_ADD_U32 sDst(SGPR18) src0(LITERAL_CONST) src1(0) const: 0x45 # VGPR253 S_MOV_B64 sDst(SGPR66) src0(EXEC) S_MOV_B32 sDst(SGPR13) src0(LITERAL_CONST) const: 0x6f # VGPR[472:475] # Indirect branch to rot(f1;: -3416 S_GETPC_B64 sDst(SGPR16) src0(SGPR16) S_SUB_U32 sDst(SGPR16) src0(SGPR16) src1(LITERAL_CONST) const: 0xd58 S_SUBB_U32 sDst(SGPR17) src0(SGPR17) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR16) src0(SGPR16) S_MOV_B64 sDst(EXEC) src0(SGPR66) # .lbl16 # 396: OpMatrixTimesVector: FloatVector2: tmp396 << rot(f1;, tmp391 V_MUL_F32 vDst(VGPR158) src0(VGPR111) src1(VGPR109) // VOP2 V_MUL_F32 vDst(VGPR159) src0(VGPR112) src1(VGPR109) // VOP2 V_MAC_F32 vDst(VGPR158) src0(VGPR113) src1(VGPR110) // VOP2 V_MAC_F32 vDst(VGPR159) src0(VGPR114) src1(VGPR110) // VOP2 # 398: OpLoad: FloatVector3: tmp398 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR39) const: 0x0 V_MOVRELS_B32 vDst(VGPR160) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR161) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR162) src0(VGPR2) # 401: OpFAdd: Float: tmp401 << const55, const55 V_MOV_B32 vDst(VGPR163) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR164) src0(LITERAL_CONST) const: 0x00000000 V_ADD_F32 vDst(VGPR165) src0(VGPR163) src1(VGPR164) // VOP2 # 402: OpCompositeExtract: Float: tmp402 << const385, 0 S_MOV_B32 sDst(SGPR99) src0(LITERAL_CONST) const: 0x3e4ccccd S_MOV_B32 sDst(SGPR100) src0(SGPR99) # 403: OpCompositeExtract: Float: tmp403 << const385, 1 S_MOV_B32 sDst(SGPR99) src0(LITERAL_CONST) const: 0x3e4ccccd S_MOV_B32 sDst(SGPR101) src0(SGPR100) # 404: OpCompositeConstruct: FloatVector3: tmp404 << tmp402, tmp403, tmp401 V_MOV_B32 vDst(VGPR166) src0(SGPR100) V_MOV_B32 vDst(VGPR167) src0(SGPR101) V_MOV_B32 vDst(VGPR168) src0(VGPR165) # 405: OpFAdd: FloatVector3: tmp405 << tmp398, tmp404 V_ADD_F32 vDst(VGPR169) src0(VGPR160) src1(VGPR166) // VOP2 V_ADD_F32 vDst(VGPR170) src0(VGPR161) src1(VGPR167) // VOP2 V_ADD_F32 vDst(VGPR171) src0(VGPR162) src1(VGPR168) // VOP2 # 406: OpExtInst(Length): Float: tmp406 << tmp405 V_MUL_F32 vDst(VGPR160) src0(VGPR169) src1(VGPR169) // VOP2 V_MAC_F32 vDst(VGPR160) src0(VGPR170) src1(VGPR170) // VOP2 V_MAC_F32 vDst(VGPR160) src0(VGPR171) src1(VGPR171) // VOP2 V_SQRT_F32 vDst(VGPR160) src0(VGPR160) # 407: OpFSub: Float: tmp407 << tmp406, const384 V_MOV_B32 vDst(VGPR161) src0(LITERAL_CONST) const: 0x3e4ccccd V_SUB_F32 vDst(VGPR162) src0(VGPR160) src1(VGPR161) // VOP2 # 408: OpLoad: FloatVector3: tmp408 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR39) const: 0x0 V_MOVRELS_B32 vDst(VGPR163) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR164) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR165) src0(VGPR2) # 411: OpFAdd: Float: tmp411 << const55, const55 V_MOV_B32 vDst(VGPR160) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR161) src0(LITERAL_CONST) const: 0x00000000 V_ADD_F32 vDst(VGPR166) src0(VGPR160) src1(VGPR161) // VOP2 # 412: OpCompositeExtract: Float: tmp412 << tmp391, 0 V_MOV_B32 vDst(VGPR160) src0(VGPR109) # 413: OpCompositeExtract: Float: tmp413 << tmp391, 1 V_MOV_B32 vDst(VGPR161) src0(VGPR110) # 414: OpCompositeConstruct: FloatVector3: tmp414 << tmp412, tmp413, tmp411 V_MOV_B32 vDst(VGPR167) src0(VGPR160) V_MOV_B32 vDst(VGPR168) src0(VGPR161) V_MOV_B32 vDst(VGPR169) src0(VGPR166) # 415: OpFAdd: FloatVector3: tmp415 << tmp408, tmp414 V_ADD_F32 vDst(VGPR170) src0(VGPR163) src1(VGPR167) // VOP2 V_ADD_F32 vDst(VGPR171) src0(VGPR164) src1(VGPR168) // VOP2 V_ADD_F32 vDst(VGPR172) src0(VGPR165) src1(VGPR169) // VOP2 # 416: OpExtInst(Length): Float: tmp416 << tmp415 V_MUL_F32 vDst(VGPR160) src0(VGPR170) src1(VGPR170) // VOP2 V_MAC_F32 vDst(VGPR160) src0(VGPR171) src1(VGPR171) // VOP2 V_MAC_F32 vDst(VGPR160) src0(VGPR172) src1(VGPR172) // VOP2 V_SQRT_F32 vDst(VGPR160) src0(VGPR160) # 417: OpFSub: Float: tmp417 << tmp416, const384 V_MOV_B32 vDst(VGPR161) src0(LITERAL_CONST) const: 0x3e4ccccd V_SUB_F32 vDst(VGPR163) src0(VGPR160) src1(VGPR161) // VOP2 # 418: OpExtInst(FMin): Float: tmp418 << tmp407, tmp417 V_MIN_F32 vDst(VGPR160) src0(VGPR162) src1(VGPR163) // VOP2 # 419: OpLoad: FloatVector3: tmp419 << p S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR39) const: 0x0 V_MOVRELS_B32 vDst(VGPR161) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR162) src0(VGPR1) V_MOVRELS_B32 vDst(VGPR163) src0(VGPR2) # 422: OpFAdd: Float: tmp422 << const55, const55 V_MOV_B32 vDst(VGPR164) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR165) src0(LITERAL_CONST) const: 0x00000000 V_ADD_F32 vDst(VGPR166) src0(VGPR164) src1(VGPR165) // VOP2 # 423: OpCompositeExtract: Float: tmp423 << tmp396, 0 V_MOV_B32 vDst(VGPR164) src0(VGPR158) # 424: OpCompositeExtract: Float: tmp424 << tmp396, 1 V_MOV_B32 vDst(VGPR165) src0(VGPR159) # 425: OpCompositeConstruct: FloatVector3: tmp425 << tmp423, tmp424, tmp422 V_MOV_B32 vDst(VGPR167) src0(VGPR164) V_MOV_B32 vDst(VGPR168) src0(VGPR165) V_MOV_B32 vDst(VGPR169) src0(VGPR166) # 426: OpFAdd: FloatVector3: tmp426 << tmp419, tmp425 V_ADD_F32 vDst(VGPR170) src0(VGPR161) src1(VGPR167) // VOP2 V_ADD_F32 vDst(VGPR171) src0(VGPR162) src1(VGPR168) // VOP2 V_ADD_F32 vDst(VGPR172) src0(VGPR163) src1(VGPR169) // VOP2 # 427: OpExtInst(Length): Float: tmp427 << tmp426 V_MUL_F32 vDst(VGPR158) src0(VGPR170) src1(VGPR170) // VOP2 V_MAC_F32 vDst(VGPR158) src0(VGPR171) src1(VGPR171) // VOP2 V_MAC_F32 vDst(VGPR158) src0(VGPR172) src1(VGPR172) // VOP2 V_SQRT_F32 vDst(VGPR158) src0(VGPR158) # 428: OpFSub: Float: tmp428 << tmp427, const384 V_MOV_B32 vDst(VGPR159) src0(LITERAL_CONST) const: 0x3e4ccccd V_SUB_F32 vDst(VGPR161) src0(VGPR158) src1(VGPR159) // VOP2 # 429: OpExtInst(FMin): Float: tmp429 << tmp418, tmp428 V_MIN_F32 vDst(VGPR158) src0(VGPR160) src1(VGPR161) // VOP2 # 430: OpLoad: Float: tmp430 << d # 432: OpFNegate: Float: tmp432 << tmp429 V_MUL_F32 vDst(VGPR159) src0(M1_0_F) src1(VGPR158) // VOP2 # 433: OpExtInst(FMax): Float: tmp433 << tmp430, tmp432 V_MAX_F32 vDst(VGPR158) src0(VGPR33) src1(VGPR159) // VOP2 # OpStore: : tmp433 >> d V_MOV_B32 vDst(VGPR33) src0(VGPR158) # 434: OpLoad: Float: tmp434 << d # OpReturnValue: : << tmp434 S_MOV_B32 sDst(M0) src0(SGPR38) V_MOVRELD_B32 vDst(VGPR0) src0(VGPR33) S_SETPC_B64 sDst(SGPR36) src0(SGPR36) # FloatVector3 estimateNormal(vf3;(FloatVector3* p) Function: FloatVector3 estimateNormal(vf3;() S_MOV_B64 sDst(SGPR100) src0(EXEC) # lb34 Label: lb34 # 437: OpAccessChain: Float*: p[0] # 438: OpLoad: Float: tmp438 << p[0] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR71) const: 0x0 V_MOVRELS_B32 vDst(VGPR158) src0(VGPR0) # 440: OpFAdd: Float: tmp440 << tmp438, const439 V_MOV_B32 vDst(VGPR159) src0(LITERAL_CONST) const: 0x3d4ccccd V_ADD_F32 vDst(VGPR160) src0(VGPR158) src1(VGPR159) // VOP2 # 441: OpAccessChain: Float*: p[1] # 442: OpLoad: Float: tmp442 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR71) const: 0x0 V_MOVRELS_B32 vDst(VGPR158) src0(VGPR1) # 443: OpAccessChain: Float*: p[2] # 444: OpLoad: Float: tmp444 << p[2] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR71) const: 0x0 V_MOVRELS_B32 vDst(VGPR159) src0(VGPR2) # 445: OpCompositeConstruct: FloatVector3: tmp445 << tmp440, tmp442, tmp444 V_MOV_B32 vDst(VGPR161) src0(VGPR160) V_MOV_B32 vDst(VGPR162) src0(VGPR158) V_MOV_B32 vDst(VGPR163) src0(VGPR159) # OpStore: : tmp445 >> param446 V_MOV_B32 vDst(VGPR115) src0(VGPR161) V_MOV_B32 vDst(VGPR116) src0(VGPR162) V_MOV_B32 vDst(VGPR117) src0(VGPR163) # 447: OpFunctionCall: Float: sceneSDF(vf3;(param446) S_ADD_U32 sDst(SGPR39) src0(LITERAL_CONST) src1(0) const: 0x73 # VGPR[535:537] S_MOV_B64 sDst(SGPR72) src0(EXEC) S_MOV_B32 sDst(SGPR38) src0(LITERAL_CONST) const: 0x85 # VGPR561 # Indirect branch to sceneSDF(vf3;: -2544 S_GETPC_B64 sDst(SGPR36) src0(SGPR36) S_SUB_U32 sDst(SGPR36) src0(SGPR36) src1(LITERAL_CONST) const: 0x9f0 S_SUBB_U32 sDst(SGPR37) src0(SGPR37) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR36) src0(SGPR36) S_MOV_B64 sDst(EXEC) src0(SGPR72) # .lbl17 # 448: OpAccessChain: Float*: p[0] # 449: OpLoad: Float: tmp449 << p[0] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR71) const: 0x0 V_MOVRELS_B32 vDst(VGPR158) src0(VGPR0) # 450: OpFSub: Float: tmp450 << tmp449, const439 V_MOV_B32 vDst(VGPR159) src0(LITERAL_CONST) const: 0x3d4ccccd V_SUB_F32 vDst(VGPR160) src0(VGPR158) src1(VGPR159) // VOP2 # 451: OpAccessChain: Float*: p[1] # 452: OpLoad: Float: tmp452 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR71) const: 0x0 V_MOVRELS_B32 vDst(VGPR158) src0(VGPR1) # 453: OpAccessChain: Float*: p[2] # 454: OpLoad: Float: tmp454 << p[2] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR71) const: 0x0 V_MOVRELS_B32 vDst(VGPR159) src0(VGPR2) # 455: OpCompositeConstruct: FloatVector3: tmp455 << tmp450, tmp452, tmp454 V_MOV_B32 vDst(VGPR161) src0(VGPR160) V_MOV_B32 vDst(VGPR162) src0(VGPR158) V_MOV_B32 vDst(VGPR163) src0(VGPR159) # OpStore: : tmp455 >> param456 V_MOV_B32 vDst(VGPR118) src0(VGPR161) V_MOV_B32 vDst(VGPR119) src0(VGPR162) V_MOV_B32 vDst(VGPR120) src0(VGPR163) # 457: OpFunctionCall: Float: sceneSDF(vf3;(param456) S_ADD_U32 sDst(SGPR39) src0(LITERAL_CONST) src1(0) const: 0x76 # VGPR[538:540] S_MOV_B64 sDst(SGPR74) src0(EXEC) S_MOV_B32 sDst(SGPR38) src0(LITERAL_CONST) const: 0x86 # VGPR570 # Indirect branch to sceneSDF(vf3;: -2664 S_GETPC_B64 sDst(SGPR36) src0(SGPR36) S_SUB_U32 sDst(SGPR36) src0(SGPR36) src1(LITERAL_CONST) const: 0xa68 S_SUBB_U32 sDst(SGPR37) src0(SGPR37) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR36) src0(SGPR36) S_MOV_B64 sDst(EXEC) src0(SGPR74) # .lbl18 # 458: OpFSub: Float: tmp458 << sceneSDF(vf3;, sceneSDF(vf3; V_SUB_F32 vDst(VGPR135) src0(VGPR133) src1(VGPR134) // VOP2 # 459: OpAccessChain: Float*: p[0] # 460: OpLoad: Float: tmp460 << p[0] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR71) const: 0x0 V_MOVRELS_B32 vDst(VGPR158) src0(VGPR0) # 461: OpAccessChain: Float*: p[1] # 462: OpLoad: Float: tmp462 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR71) const: 0x0 V_MOVRELS_B32 vDst(VGPR159) src0(VGPR1) # 463: OpFAdd: Float: tmp463 << tmp462, const439 V_MOV_B32 vDst(VGPR160) src0(LITERAL_CONST) const: 0x3d4ccccd V_ADD_F32 vDst(VGPR161) src0(VGPR159) src1(VGPR160) // VOP2 # 464: OpAccessChain: Float*: p[2] # 465: OpLoad: Float: tmp465 << p[2] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR71) const: 0x0 V_MOVRELS_B32 vDst(VGPR159) src0(VGPR2) # 466: OpCompositeConstruct: FloatVector3: tmp466 << tmp460, tmp463, tmp465 V_MOV_B32 vDst(VGPR162) src0(VGPR158) V_MOV_B32 vDst(VGPR163) src0(VGPR161) V_MOV_B32 vDst(VGPR164) src0(VGPR159) # OpStore: : tmp466 >> param467 V_MOV_B32 vDst(VGPR121) src0(VGPR162) V_MOV_B32 vDst(VGPR122) src0(VGPR163) V_MOV_B32 vDst(VGPR123) src0(VGPR164) # 468: OpFunctionCall: Float: sceneSDF(vf3;(param467) S_ADD_U32 sDst(SGPR39) src0(LITERAL_CONST) src1(0) const: 0x79 # VGPR[541:543] S_MOV_B64 sDst(SGPR76) src0(EXEC) S_MOV_B32 sDst(SGPR38) src0(LITERAL_CONST) const: 0x88 # VGPR580 # Indirect branch to sceneSDF(vf3;: -2788 S_GETPC_B64 sDst(SGPR36) src0(SGPR36) S_SUB_U32 sDst(SGPR36) src0(SGPR36) src1(LITERAL_CONST) const: 0xae4 S_SUBB_U32 sDst(SGPR37) src0(SGPR37) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR36) src0(SGPR36) S_MOV_B64 sDst(EXEC) src0(SGPR76) # .lbl19 # 469: OpAccessChain: Float*: p[0] # 470: OpLoad: Float: tmp470 << p[0] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR71) const: 0x0 V_MOVRELS_B32 vDst(VGPR158) src0(VGPR0) # 471: OpAccessChain: Float*: p[1] # 472: OpLoad: Float: tmp472 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR71) const: 0x0 V_MOVRELS_B32 vDst(VGPR159) src0(VGPR1) # 473: OpFSub: Float: tmp473 << tmp472, const439 V_MOV_B32 vDst(VGPR160) src0(LITERAL_CONST) const: 0x3d4ccccd V_SUB_F32 vDst(VGPR161) src0(VGPR159) src1(VGPR160) // VOP2 # 474: OpAccessChain: Float*: p[2] # 475: OpLoad: Float: tmp475 << p[2] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR71) const: 0x0 V_MOVRELS_B32 vDst(VGPR159) src0(VGPR2) # 476: OpCompositeConstruct: FloatVector3: tmp476 << tmp470, tmp473, tmp475 V_MOV_B32 vDst(VGPR162) src0(VGPR158) V_MOV_B32 vDst(VGPR163) src0(VGPR161) V_MOV_B32 vDst(VGPR164) src0(VGPR159) # OpStore: : tmp476 >> param477 V_MOV_B32 vDst(VGPR124) src0(VGPR162) V_MOV_B32 vDst(VGPR125) src0(VGPR163) V_MOV_B32 vDst(VGPR126) src0(VGPR164) # 478: OpFunctionCall: Float: sceneSDF(vf3;(param477) S_ADD_U32 sDst(SGPR39) src0(LITERAL_CONST) src1(0) const: 0x7c # VGPR[544:546] S_MOV_B64 sDst(SGPR78) src0(EXEC) S_MOV_B32 sDst(SGPR38) src0(LITERAL_CONST) const: 0x89 # VGPR589 # Indirect branch to sceneSDF(vf3;: -2908 S_GETPC_B64 sDst(SGPR36) src0(SGPR36) S_SUB_U32 sDst(SGPR36) src0(SGPR36) src1(LITERAL_CONST) const: 0xb5c S_SUBB_U32 sDst(SGPR37) src0(SGPR37) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR36) src0(SGPR36) S_MOV_B64 sDst(EXEC) src0(SGPR78) # .lbl20 # 479: OpFSub: Float: tmp479 << sceneSDF(vf3;, sceneSDF(vf3; V_SUB_F32 vDst(VGPR138) src0(VGPR136) src1(VGPR137) // VOP2 # 480: OpAccessChain: Float*: p[0] # 481: OpLoad: Float: tmp481 << p[0] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR71) const: 0x0 V_MOVRELS_B32 vDst(VGPR158) src0(VGPR0) # 482: OpAccessChain: Float*: p[1] # 483: OpLoad: Float: tmp483 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR71) const: 0x0 V_MOVRELS_B32 vDst(VGPR159) src0(VGPR1) # 484: OpAccessChain: Float*: p[2] # 485: OpLoad: Float: tmp485 << p[2] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR71) const: 0x0 V_MOVRELS_B32 vDst(VGPR160) src0(VGPR2) # 486: OpFAdd: Float: tmp486 << tmp485, const439 V_MOV_B32 vDst(VGPR161) src0(LITERAL_CONST) const: 0x3d4ccccd V_ADD_F32 vDst(VGPR162) src0(VGPR160) src1(VGPR161) // VOP2 # 487: OpCompositeConstruct: FloatVector3: tmp487 << tmp481, tmp483, tmp486 V_MOV_B32 vDst(VGPR163) src0(VGPR158) V_MOV_B32 vDst(VGPR164) src0(VGPR159) V_MOV_B32 vDst(VGPR165) src0(VGPR162) # OpStore: : tmp487 >> param488 V_MOV_B32 vDst(VGPR127) src0(VGPR163) V_MOV_B32 vDst(VGPR128) src0(VGPR164) V_MOV_B32 vDst(VGPR129) src0(VGPR165) # 489: OpFunctionCall: Float: sceneSDF(vf3;(param488) S_ADD_U32 sDst(SGPR39) src0(LITERAL_CONST) src1(0) const: 0x7f # VGPR[547:549] S_MOV_B64 sDst(SGPR80) src0(EXEC) S_MOV_B32 sDst(SGPR38) src0(LITERAL_CONST) const: 0x8b # VGPR599 # Indirect branch to sceneSDF(vf3;: -3032 S_GETPC_B64 sDst(SGPR36) src0(SGPR36) S_SUB_U32 sDst(SGPR36) src0(SGPR36) src1(LITERAL_CONST) const: 0xbd8 S_SUBB_U32 sDst(SGPR37) src0(SGPR37) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR36) src0(SGPR36) S_MOV_B64 sDst(EXEC) src0(SGPR80) # .lbl21 # 490: OpAccessChain: Float*: p[0] # 491: OpLoad: Float: tmp491 << p[0] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR71) const: 0x0 V_MOVRELS_B32 vDst(VGPR158) src0(VGPR0) # 492: OpAccessChain: Float*: p[1] # 493: OpLoad: Float: tmp493 << p[1] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR71) const: 0x0 V_MOVRELS_B32 vDst(VGPR159) src0(VGPR1) # 494: OpAccessChain: Float*: p[2] # 495: OpLoad: Float: tmp495 << p[2] S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR71) const: 0x0 V_MOVRELS_B32 vDst(VGPR160) src0(VGPR2) # 496: OpFSub: Float: tmp496 << tmp495, const439 V_MOV_B32 vDst(VGPR161) src0(LITERAL_CONST) const: 0x3d4ccccd V_SUB_F32 vDst(VGPR162) src0(VGPR160) src1(VGPR161) // VOP2 # 497: OpCompositeConstruct: FloatVector3: tmp497 << tmp491, tmp493, tmp496 V_MOV_B32 vDst(VGPR163) src0(VGPR158) V_MOV_B32 vDst(VGPR164) src0(VGPR159) V_MOV_B32 vDst(VGPR165) src0(VGPR162) # OpStore: : tmp497 >> param498 V_MOV_B32 vDst(VGPR130) src0(VGPR163) V_MOV_B32 vDst(VGPR131) src0(VGPR164) V_MOV_B32 vDst(VGPR132) src0(VGPR165) # 499: OpFunctionCall: Float: sceneSDF(vf3;(param498) S_ADD_U32 sDst(SGPR39) src0(LITERAL_CONST) src1(0) const: 0x82 # VGPR[550:552] S_MOV_B64 sDst(SGPR82) src0(EXEC) S_MOV_B32 sDst(SGPR38) src0(LITERAL_CONST) const: 0x8c # VGPR608 # Indirect branch to sceneSDF(vf3;: -3152 S_GETPC_B64 sDst(SGPR36) src0(SGPR36) S_SUB_U32 sDst(SGPR36) src0(SGPR36) src1(LITERAL_CONST) const: 0xc50 S_SUBB_U32 sDst(SGPR37) src0(SGPR37) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR36) src0(SGPR36) S_MOV_B64 sDst(EXEC) src0(SGPR82) # .lbl22 # 500: OpFSub: Float: tmp500 << sceneSDF(vf3;, sceneSDF(vf3; V_SUB_F32 vDst(VGPR158) src0(VGPR139) src1(VGPR140) // VOP2 # 501: OpCompositeConstruct: FloatVector3: tmp501 << tmp458, tmp479, tmp500 V_MOV_B32 vDst(VGPR159) src0(VGPR135) V_MOV_B32 vDst(VGPR160) src0(VGPR138) V_MOV_B32 vDst(VGPR161) src0(VGPR158) # 502: OpExtInst(Normalize): FloatVector3: tmp502 << tmp501 V_MUL_F32 vDst(VGPR158) src0(VGPR159) src1(VGPR159) // VOP2 V_MAC_F32 vDst(VGPR158) src0(VGPR160) src1(VGPR160) // VOP2 V_MAC_F32 vDst(VGPR158) src0(VGPR161) src1(VGPR161) // VOP2 V_RSQ_CLAMP_F32 vDst(VGPR158) src0(VGPR158) V_MUL_F32 vDst(VGPR162) src0(VGPR159) src1(VGPR158) // VOP2 V_MUL_F32 vDst(VGPR163) src0(VGPR160) src1(VGPR158) // VOP2 V_MUL_F32 vDst(VGPR164) src0(VGPR161) src1(VGPR158) // VOP2 # OpReturnValue: : << tmp502 S_MOV_B32 sDst(M0) src0(SGPR70) V_MOVRELD_B32 vDst(VGPR0) src0(VGPR162) V_MOVRELD_B32 vDst(VGPR1) src0(VGPR163) V_MOVRELD_B32 vDst(VGPR2) src0(VGPR164) S_SETPC_B64 sDst(SGPR68) src0(SGPR68) # Void mainImage(vf4;vf2;(FloatVector4* fragColor, FloatVector2* fragCoord) Function: Void mainImage(vf4;vf2;(, FloatVector2 main.fragCoord) S_MOV_B64 sDst(SGPR84) src0(EXEC) # lb42 Label: lb42 # 506: OpLoad: FloatVector2: tmp506 << fragCoord S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR12) const: 0x0 V_MOVRELS_B32 vDst(VGPR158) src0(VGPR0) V_MOVRELS_B32 vDst(VGPR159) src0(VGPR1) # 510: OpLoad: FloatVector3: tmp510 << iResolution S_LOAD_DWORDX2_IMM offset(4) sBase(SGPR[0:1]) sDst(SGPR[100:101]) S_WAITCNT 0 S_LOAD_DWORD_IMM offset(12) sBase(SGPR[0:1]) sDst(SGPR102) S_WAITCNT 0 # 511: OpVectorShuffle: FloatVector2: tmp511 << tmp510, tmp510, 0, 1 V_MOV_B32 vDst(VGPR160) src0(SGPR100) V_MOV_B32 vDst(VGPR161) src0(SGPR101) # 512: OpVectorTimesScalar: FloatVector2: tmp512 << tmp511, const507 V_MOV_B32 vDst(VGPR162) src0(0_5_F) V_MUL_F32 vDst(VGPR163) src0(VGPR162) src1(VGPR160) // VOP2 V_MUL_F32 vDst(VGPR164) src0(VGPR162) src1(VGPR161) // VOP2 # 513: OpFSub: FloatVector2: tmp513 << tmp506, tmp512 V_SUB_F32 vDst(VGPR160) src0(VGPR158) src1(VGPR163) // VOP2 V_SUB_F32 vDst(VGPR161) src0(VGPR159) src1(VGPR164) // VOP2 # OpStore: : tmp513 >> uv V_MOV_B32 vDst(VGPR158) src0(VGPR160) V_MOV_B32 vDst(VGPR159) src0(VGPR161) # 514: OpAccessChain: Float*: iResolution[1] # 515: OpLoad: Float: tmp515 << iResolution[1] S_LOAD_DWORD_IMM offset(8) sBase(SGPR[0:1]) sDst(SGPR99) S_WAITCNT 0 # 516: OpFDiv: Float: tmp516 << const110, tmp515 V_MOV_B32 vDst(VGPR160) src0(SGPR99) V_RCP_F32 vDst(VGPR161) src0(VGPR160) V_MUL_F32 vDst(VGPR161) src0(2_0_F) src1(VGPR161) // VOP2 V_DIV_FIXUP_F32 vDst(VGPR161) src0(VGPR161) src1(VGPR160) src2(2_0_F) abs(0) clamp(0) omod(0) neg(0) // VOP3a # 517: OpLoad: FloatVector2: tmp517 << uv # 518: OpVectorTimesScalar: FloatVector2: tmp518 << tmp517, tmp516 V_MUL_F32 vDst(VGPR162) src0(VGPR161) src1(VGPR158) // VOP2 V_MUL_F32 vDst(VGPR163) src0(VGPR161) src1(VGPR159) // VOP2 # OpStore: : tmp518 >> uv V_MOV_B32 vDst(VGPR158) src0(VGPR162) V_MOV_B32 vDst(VGPR159) src0(VGPR163) # 519: OpLoad: FloatVector2: tmp519 << uv # 520: OpVectorTimesScalar: FloatVector2: tmp520 << tmp519, const329 V_MOV_B32 vDst(VGPR160) src0(4_0_F) V_MUL_F32 vDst(VGPR161) src0(VGPR160) src1(VGPR158) // VOP2 V_MUL_F32 vDst(VGPR162) src0(VGPR160) src1(VGPR159) // VOP2 # OpStore: : tmp520 >> uv V_MOV_B32 vDst(VGPR158) src0(VGPR161) V_MOV_B32 vDst(VGPR159) src0(VGPR162) # 525: OpExtInst(Tan): Float: tmp525 << const522 V_MOV_B32 vDst(VGPR160) src0(LITERAL_CONST) const: 0x3e20d97c V_MUL_F32 vDst(VGPR161) src0(LITERAL_CONST) src1(VGPR160) // VOP2 const: 0x3e22f983 V_SIN_F32 vDst(VGPR160) src0(VGPR161) V_COS_F32 vDst(VGPR161) src0(VGPR161) V_RCP_F32 vDst(VGPR162) src0(VGPR161) V_MUL_F32 vDst(VGPR162) src0(VGPR160) src1(VGPR162) // VOP2 V_DIV_FIXUP_F32 vDst(VGPR162) src0(VGPR162) src1(VGPR161) src2(VGPR160) abs(0) clamp(0) omod(0) neg(0) // VOP3a # 526: OpFDiv: Float: tmp526 << const54, tmp525 V_RCP_F32 vDst(VGPR160) src0(VGPR162) V_MUL_F32 vDst(VGPR160) src0(1_0_F) src1(VGPR160) // VOP2 V_DIV_FIXUP_F32 vDst(VGPR160) src0(VGPR160) src1(VGPR162) src2(1_0_F) abs(0) clamp(0) omod(0) neg(0) // VOP3a # 527: OpFAdd: Float: tmp527 << const54, tmp526 V_ADD_F32 vDst(VGPR161) src0(1_0_F) src1(VGPR160) // VOP2 # 528: OpFMul: Float: tmp528 << const54, tmp527 V_MUL_F32 vDst(VGPR160) src0(1_0_F) src1(VGPR161) // VOP2 # 529: OpCompositeConstruct: FloatVector3: tmp529 << const55, const55, tmp528 S_MOV_B32 sDst(SGPR99) src0(LITERAL_CONST) const: 0x0 V_MOV_B32 vDst(VGPR161) src0(SGPR99) S_MOV_B32 sDst(SGPR99) src0(LITERAL_CONST) const: 0x0 V_MOV_B32 vDst(VGPR162) src0(SGPR99) V_MOV_B32 vDst(VGPR163) src0(VGPR160) # OpStore: : tmp529 >> ray V_MOV_B32 vDst(VGPR141) src0(VGPR161) V_MOV_B32 vDst(VGPR142) src0(VGPR162) V_MOV_B32 vDst(VGPR143) src0(VGPR163) # 533: OpLoad: FloatVector2: tmp533 << uv # 534: OpCompositeExtract: Float: tmp534 << tmp533, 0 V_MOV_B32 vDst(VGPR160) src0(VGPR158) # 535: OpCompositeExtract: Float: tmp535 << tmp533, 1 V_MOV_B32 vDst(VGPR164) src0(VGPR159) # 536: OpCompositeConstruct: FloatVector3: tmp536 << tmp534, tmp535, const55 V_MOV_B32 vDst(VGPR165) src0(VGPR160) V_MOV_B32 vDst(VGPR166) src0(VGPR164) S_MOV_B32 sDst(SGPR99) src0(LITERAL_CONST) const: 0x0 V_MOV_B32 vDst(VGPR167) src0(SGPR99) # 538: OpFSub: FloatVector3: tmp538 << tmp536, tmp529 V_SUB_F32 vDst(VGPR158) src0(VGPR165) src1(VGPR161) // VOP2 V_SUB_F32 vDst(VGPR159) src0(VGPR166) src1(VGPR162) // VOP2 V_SUB_F32 vDst(VGPR160) src0(VGPR167) src1(VGPR163) // VOP2 # 539: OpExtInst(Normalize): FloatVector3: tmp539 << tmp538 V_MUL_F32 vDst(VGPR161) src0(VGPR158) src1(VGPR158) // VOP2 V_MAC_F32 vDst(VGPR161) src0(VGPR159) src1(VGPR159) // VOP2 V_MAC_F32 vDst(VGPR161) src0(VGPR160) src1(VGPR160) // VOP2 V_RSQ_CLAMP_F32 vDst(VGPR161) src0(VGPR161) V_MUL_F32 vDst(VGPR151) src0(VGPR158) src1(VGPR161) // VOP2 V_MUL_F32 vDst(VGPR152) src0(VGPR159) src1(VGPR161) // VOP2 V_MUL_F32 vDst(VGPR153) src0(VGPR160) src1(VGPR161) // VOP2 # OpStore: : const55 >> shade S_MOV_B32 sDst(SGPR99) src0(LITERAL_CONST) const: 0x0 V_MOV_B32 vDst(VGPR144) src0(SGPR99) # OpStore: : const549 >> i S_MOV_B32 sDst(SGPR98) src0(0) # OpBranch: to lb550 # lb550 Label: lb550 # OpLoopMerge: (merge: lb552, continue: lb553) # CF Block: Merge: lb552, Continue: lb553 S_MOV_B64 sDst(SGPR86) src0(EXEC) S_MOV_B64 sDst(SGPR88) src0(EXEC) S_MOV_B64 sDst(SGPR90) src0(EXEC) Label: lb550Loop # OpBranch: to lb554 # lb554 Label: lb554 # 555: OpLoad: Int: tmp555 << i Decorators: RelaxedPrecision # 558: OpSLessThan: Bool: tmp558 << tmp555, const556 V_MOV_B32 vDst(VGPR158) src0(LITERAL_CONST) const: 0x00000064 V_CMP_LT_I32 dst(SGPR100) src0(SGPR98) src1(VGPR158) // VOP3a # OpBranchConditional: if(tmp558) then branch to lb551, else branch to lb552 # CF Block: Cond Branch: true: lb551, false: lb552 S_AND_B64 sDst(EXEC) src0(SGPR100) src1(EXEC) S_CBRANCH_EXECZ 130 lb552 # lb551 Label: lb551 S_MOV_B64 sDst(SGPR88) src0(EXEC) S_MOV_B64 sDst(SGPR90) src0(EXEC) # 561: OpLoad: FloatVector3: tmp561 << ray # OpStore: : tmp561 >> param560 V_MOV_B32 vDst(VGPR145) src0(VGPR141) V_MOV_B32 vDst(VGPR146) src0(VGPR142) V_MOV_B32 vDst(VGPR147) src0(VGPR143) # 562: OpFunctionCall: Float: sceneSDF(vf3;(param560) S_ADD_U32 sDst(SGPR39) src0(LITERAL_CONST) src1(0) const: 0x91 # VGPR[624:626] S_MOV_B64 sDst(SGPR92) src0(EXEC) S_MOV_B32 sDst(SGPR38) src0(LITERAL_CONST) const: 0x9a # VGPR673 # Indirect branch to sceneSDF(vf3;: -3656 S_GETPC_B64 sDst(SGPR36) src0(SGPR36) S_SUB_U32 sDst(SGPR36) src0(SGPR36) src1(LITERAL_CONST) const: 0xe48 S_SUBB_U32 sDst(SGPR37) src0(SGPR37) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR36) src0(SGPR36) S_MOV_B64 sDst(EXEC) src0(SGPR92) # .lbl23 # 565: OpFOrdLessThan: Bool: tmp565 << sceneSDF(vf3;, const564 V_MOV_B32 vDst(VGPR158) src0(LITERAL_CONST) const: 0x3ba3d70a V_CMP_LT_F32 dst(SGPR100) src0(VGPR154) src1(VGPR158) // VOP3a # OpSelectionMerge: (merge: lb567) # CF Block: Merge: lb567 S_MOV_B64 sDst(SGPR94) src0(EXEC) # OpBranchConditional: if(tmp565) then branch to lb566, else branch to lb604 # CF Block: Cond Branch: true: lb566, false: lb604 S_AND_B64 sDst(EXEC) src0(SGPR100) src1(EXEC) S_CBRANCH_EXECZ 66 lb604 # lb566 Label: lb566 # 570: OpLoad: FloatVector3: tmp570 << ray # OpStore: : tmp570 >> param569 V_MOV_B32 vDst(VGPR148) src0(VGPR141) V_MOV_B32 vDst(VGPR149) src0(VGPR142) V_MOV_B32 vDst(VGPR150) src0(VGPR143) # 571: OpFunctionCall: FloatVector3: estimateNormal(vf3;(param569) S_ADD_U32 sDst(SGPR71) src0(LITERAL_CONST) src1(0) const: 0x94 # VGPR[627:629] S_MOV_B64 sDst(SGPR96) src0(EXEC) S_MOV_B32 sDst(SGPR70) src0(LITERAL_CONST) const: 0x9b # VGPR[675:677] # Indirect branch to estimateNormal(vf3;: -1300 S_GETPC_B64 sDst(SGPR68) src0(SGPR68) S_SUB_U32 sDst(SGPR68) src0(SGPR68) src1(LITERAL_CONST) const: 0x514 S_SUBB_U32 sDst(SGPR69) src0(SGPR69) src1(LITERAL_CONST) const: 0x0 S_SWAPPC_B64 sDst(SGPR68) src0(SGPR68) S_MOV_B64 sDst(EXEC) src0(SGPR96) # .lbl24 # 575: OpDot: Float: tmp575 << const543, estimateNormal(vf3; V_MOV_B32 vDst(VGPR158) src0(LITERAL_CONST) const: 0x3ed105ec V_MOV_B32 vDst(VGPR159) src0(LITERAL_CONST) const: 0x3ed105ec V_MOV_B32 vDst(VGPR160) src0(LITERAL_CONST) const: 0x3f5105ec V_MUL_F32 vDst(VGPR161) src0(VGPR158) src1(VGPR155) // VOP2 V_MAC_F32 vDst(VGPR161) src0(VGPR159) src1(VGPR156) // VOP2 V_MAC_F32 vDst(VGPR161) src0(VGPR160) src1(VGPR157) // VOP2 # 578: OpFSub: Float: tmp578 << tmp575, const54 V_MOV_B32 vDst(VGPR158) src0(1_0_F) V_SUB_F32 vDst(VGPR159) src0(VGPR161) src1(VGPR158) // VOP2 # 581: OpFMul: Float: tmp581 << const579, tmp575 V_MOV_B32 vDst(VGPR158) src0(LITERAL_CONST) const: 0x3f4ccccd V_MUL_F32 vDst(VGPR160) src0(VGPR158) src1(VGPR161) // VOP2 # 582: OpLoad: Float: tmp582 << shade # 583: OpFAdd: Float: tmp583 << tmp582, tmp581 V_ADD_F32 vDst(VGPR158) src0(VGPR144) src1(VGPR160) // VOP2 # OpStore: : tmp583 >> shade V_MOV_B32 vDst(VGPR144) src0(VGPR158) # 585: OpFNegate: Float: tmp585 << tmp575 V_MUL_F32 vDst(VGPR158) src0(M1_0_F) src1(VGPR161) // VOP2 # 587: OpFMul: Float: tmp587 << tmp585, tmp575 V_MUL_F32 vDst(VGPR160) src0(VGPR158) src1(VGPR161) // VOP2 # 588: OpFMul: Float: tmp588 << tmp587, const209 V_MOV_B32 vDst(VGPR158) src0(LITERAL_CONST) const: 0x41200000 V_MUL_F32 vDst(VGPR161) src0(VGPR160) src1(VGPR158) // VOP2 # 589: OpExtInst(Exp): Float: tmp589 << tmp588 V_MOV_B32 vDst(VGPR158) src0(LITERAL_CONST) const: 0x3fb8aa3b V_MUL_F32 vDst(VGPR160) src0(VGPR161) src1(VGPR158) // VOP2 V_EXP_F32 vDst(VGPR160) src0(VGPR160) # 590: OpExtInst(FClamp): Float: tmp590 << tmp589, const55, const54 V_MOV_B32 vDst(VGPR158) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR161) src0(1_0_F) V_MAX_F32 vDst(VGPR162) src0(VGPR160) src1(VGPR158) // VOP2 V_MIN_F32 vDst(VGPR162) src0(VGPR162) src1(VGPR161) // VOP2 # 591: OpLoad: Float: tmp591 << shade # 592: OpFAdd: Float: tmp592 << tmp591, tmp590 V_ADD_F32 vDst(VGPR158) src0(VGPR144) src1(VGPR162) // VOP2 # OpStore: : tmp592 >> shade V_MOV_B32 vDst(VGPR144) src0(VGPR158) # 594: OpFNegate: Float: tmp594 << tmp578 V_MUL_F32 vDst(VGPR158) src0(M1_0_F) src1(VGPR159) // VOP2 # 596: OpFMul: Float: tmp596 << tmp594, tmp578 V_MUL_F32 vDst(VGPR160) src0(VGPR158) src1(VGPR159) // VOP2 # 598: OpFMul: Float: tmp598 << tmp596, const597 V_MOV_B32 vDst(VGPR158) src0(LITERAL_CONST) const: 0x461c4000 V_MUL_F32 vDst(VGPR159) src0(VGPR160) src1(VGPR158) // VOP2 # 599: OpExtInst(Exp): Float: tmp599 << tmp598 V_MOV_B32 vDst(VGPR158) src0(LITERAL_CONST) const: 0x3fb8aa3b V_MUL_F32 vDst(VGPR160) src0(VGPR159) src1(VGPR158) // VOP2 V_EXP_F32 vDst(VGPR160) src0(VGPR160) # 600: OpExtInst(FClamp): Float: tmp600 << tmp599, const55, const54 V_MOV_B32 vDst(VGPR158) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR159) src0(1_0_F) V_MAX_F32 vDst(VGPR161) src0(VGPR160) src1(VGPR158) // VOP2 V_MIN_F32 vDst(VGPR161) src0(VGPR161) src1(VGPR159) // VOP2 # 601: OpLoad: Float: tmp601 << shade # 602: OpFAdd: Float: tmp602 << tmp601, tmp600 V_ADD_F32 vDst(VGPR158) src0(VGPR144) src1(VGPR161) // VOP2 # OpStore: : tmp602 >> shade V_MOV_B32 vDst(VGPR144) src0(VGPR158) # OpBranch: to lb552 S_ANDN2_B64 sDst(SGPR88) src0(SGPR88) src1(EXEC) S_ANDN2_B64 sDst(SGPR90) src0(SGPR90) src1(EXEC) S_AND_B64 sDst(EXEC) src0(SGPR90) src1(EXEC) # lb604 Label: lb604 S_ANDN2_B64 sDst(EXEC) src0(SGPR94) src1(EXEC) S_AND_B64 sDst(EXEC) src0(EXEC) src1(SGPR90) S_CBRANCH_EXECZ 16 lb567 # 605: OpLoad: FloatVector3: tmp605 << ray # 606: OpExtInst(Length): Float: tmp606 << tmp605 V_MUL_F32 vDst(VGPR158) src0(VGPR141) src1(VGPR141) // VOP2 V_MAC_F32 vDst(VGPR158) src0(VGPR142) src1(VGPR142) // VOP2 V_MAC_F32 vDst(VGPR158) src0(VGPR143) src1(VGPR143) // VOP2 V_SQRT_F32 vDst(VGPR158) src0(VGPR158) # 608: OpFOrdGreaterThan: Bool: tmp608 << tmp606, const607 V_MOV_B32 vDst(VGPR159) src0(LITERAL_CONST) const: 0x41f00000 V_CMP_GT_F32 dst(SGPR100) src0(VGPR158) src1(VGPR159) // VOP3a # OpSelectionMerge: (merge: lb610) # CF Block: Merge: lb610 S_MOV_B64 sDst(SGPR102) src0(EXEC) # OpBranchConditional: if(tmp608) then branch to lb609, else branch to lb610 # CF Block: Cond Branch: true: lb609, false: lb610 S_AND_B64 sDst(EXEC) src0(SGPR100) src1(EXEC) S_CBRANCH_EXECZ 3 lb610 # lb609 Label: lb609 # OpBranch: to lb552 S_ANDN2_B64 sDst(SGPR88) src0(SGPR88) src1(EXEC) S_ANDN2_B64 sDst(SGPR90) src0(SGPR90) src1(EXEC) S_AND_B64 sDst(EXEC) src0(SGPR90) src1(EXEC) # lb610 Label: lb610 # CF Merge Point: Restore EXEC. S_MOV_B64 sDst(EXEC) src0(SGPR102) S_AND_B64 sDst(EXEC) src0(EXEC) src1(SGPR90) # OpBranch: to lb567 # lb567 Label: lb567 # CF Merge Point: Restore EXEC. S_MOV_B64 sDst(EXEC) src0(SGPR94) S_AND_B64 sDst(EXEC) src0(EXEC) src1(SGPR90) # 614: OpVectorTimesScalar: FloatVector3: tmp614 << tmp539, const612 V_MOV_B32 vDst(VGPR158) src0(LITERAL_CONST) const: 0x3f35c28f V_MUL_F32 vDst(VGPR159) src0(VGPR158) src1(VGPR151) // VOP2 V_MUL_F32 vDst(VGPR160) src0(VGPR158) src1(VGPR152) // VOP2 V_MUL_F32 vDst(VGPR161) src0(VGPR158) src1(VGPR153) // VOP2 # 616: OpVectorTimesScalar: FloatVector3: tmp616 << tmp614, sceneSDF(vf3; V_MUL_F32 vDst(VGPR162) src0(VGPR154) src1(VGPR159) // VOP2 V_MUL_F32 vDst(VGPR163) src0(VGPR154) src1(VGPR160) // VOP2 V_MUL_F32 vDst(VGPR164) src0(VGPR154) src1(VGPR161) // VOP2 # 617: OpLoad: FloatVector3: tmp617 << ray # 618: OpFAdd: FloatVector3: tmp618 << tmp617, tmp616 V_ADD_F32 vDst(VGPR158) src0(VGPR141) src1(VGPR162) // VOP2 V_ADD_F32 vDst(VGPR159) src0(VGPR142) src1(VGPR163) // VOP2 V_ADD_F32 vDst(VGPR160) src0(VGPR143) src1(VGPR164) // VOP2 # OpStore: : tmp618 >> ray V_MOV_B32 vDst(VGPR141) src0(VGPR158) V_MOV_B32 vDst(VGPR142) src0(VGPR159) V_MOV_B32 vDst(VGPR143) src0(VGPR160) # OpBranch: to lb553 # lb553 Label: lb553 # CF Continue Point: Restore EXEC. S_MOV_B64 sDst(EXEC) src0(SGPR88) # 619: OpLoad: Int: tmp619 << i Decorators: RelaxedPrecision # 621: OpIAdd: Int: tmp621 << tmp619, const620 Decorators: RelaxedPrecision S_MOV_B32 sDst(SGPR99) src0(1_INT) S_ADD_I32 sDst(SGPR100) src0(SGPR98) src1(SGPR99) # OpStore: : tmp621 >> i S_MOV_B32 sDst(SGPR98) src0(SGPR100) # OpBranch: to lb550 S_BRANCH -136 lb550Loop # lb552 Label: lb552 # CF Merge Point: Restore EXEC. S_MOV_B64 sDst(EXEC) src0(SGPR86) S_AND_B64 sDst(EXEC) src0(EXEC) src1(SGPR84) # 624: OpLoad: Float: tmp624 << shade # 625: OpVectorTimesScalar: FloatVector4: tmp625 << const623, tmp624 V_MOV_B32 vDst(VGPR158) src0(1_0_F) V_MOV_B32 vDst(VGPR159) src0(LITERAL_CONST) const: 0x3f666666 V_MOV_B32 vDst(VGPR160) src0(LITERAL_CONST) const: 0x00000000 V_MOV_B32 vDst(VGPR161) src0(LITERAL_CONST) const: 0x00000000 V_MUL_F32 vDst(VGPR162) src0(VGPR144) src1(VGPR158) // VOP2 V_MUL_F32 vDst(VGPR163) src0(VGPR144) src1(VGPR159) // VOP2 V_MUL_F32 vDst(VGPR164) src0(VGPR144) src1(VGPR160) // VOP2 V_MUL_F32 vDst(VGPR165) src0(VGPR144) src1(VGPR161) // VOP2 # OpStore: : tmp625 >> fragColor S_ADD_U32 sDst(M0) src0(LITERAL_CONST) src1(SGPR9) const: 0x0 V_MOVRELD_B32 vDst(VGPR0) src0(VGPR162) V_MOVRELD_B32 vDst(VGPR1) src0(VGPR163) V_MOVRELD_B32 vDst(VGPR2) src0(VGPR164) V_MOVRELD_B32 vDst(VGPR3) src0(VGPR165) # OpReturn: S_SETPC_B64 sDst(SGPR10) src0(SGPR10) Generating the final byte-code... ERROR: Code generation failed. Error log: Need 106 SGPRs, which exceeds the maximum of 102 Done.